Dell-Inspiron-7437-7537-7737_ESQUEMA

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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Cover Page
A3
1 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Cover Page
A3
1 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Cover Page
A3
1 101Friday, June 28, 2013
<Core Design>
2013-06-28
REV : A00
Hadley15" Schematics Document
Haswell ULT
www.qdzbwx.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Block Diagram
Custom
2 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Block Diagram
Custom
2 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Block Diagram
Custom
2 101Friday, June 28, 2013
<Core Design>
USB 3.0
USB3.0 Redriver
USB 3.0
USB 3.0 CONN
 TI
SN65LVPE502RGER
USB 2.0
USB 3.0
USB3.0 Redriver
USB 3.0
USB 3.0 CONN
 TI
SN65LVPE502RGER
USB 2.0
Project code : 91.47L01.001
PCB P/N : 12311-1
Revision : A00
RJ45
LAN+Card reader
Realtek
RTL8411B
(10/100/1000M)
 MMI Card Connector
 (SD/SDHC/SDXC/
 SD-UHS/MS/MS-Pro)
PCI-E
8MB
25
62
 Nuvoton
NCT7718W
26
Flash ROM
KBC
Backlight 
 Int. KB
Thermal
24
 Nuvoton
NPCE985PA0DX
Touch
 Pad
DC Fan
Module
SMBus
26
 ANPEC
APL5606AKI
DC Fan Contrroller
SMBus
P
S
2
SPI
26
LPC debug port
LPC
65
30
eDP/
LVDS 
Option
circuit
52, 53
eDP
Hadly15 Block Diagram
 Realtek 
 RTD2136R
 15.6" LCD 
FHD(1920 x 1080)
eDP
eDP to LVDS
 Converter
LVDS
53
TMDSHDMI CONN
PCI-E
58
 Mini-Card
802.11a/b/g/n
 BT
USB 2.0
Daughter board
52
54
Haswell ULT
15W/25W
Intel CPU
High Definition Audio
8 USB 2.0/1.1 ports
ACPI 4.0a
4 SATA ports
LPC I/F
2-4 USB 3.0 ports
Lynx Point-LP
8-12 PCIE ports
12
DDR3L
1600MHz
Slot ADDR3L Channel A
13
DDR3L
1600MHz
Slot BDDR3L Channel B
SATA3
SATA repeater
 TI
SN75LVCP601
SATA3
mSATA
PCI-E x4
GPU 
25W
73~77
128M x 16 x 4(1GB)
VRAM(GDDR5)
VRAM(GDDR5)
128M x 16 x4(1GB)
GDDR5 Ch A
GDDR5 Ch B
N14P-GT
USB 3.0
USB 3.0 / Power share
USB 2.0
USB PowerShare
 PERICOM
PI5USB1457AZAE
USB 2.0
35
34
USB 2.0
USB 3.0
USB 3.0 CONN
34
SATA3 TI
SN75LVCP601
SATA repeater
SATA3 HDD
USB 2.0
2M 720P
 Camera
USB 2.0 Touch Screen
52
Audio Codec
2CH SPEAKER
Universal jack
Internal Digital MIC
HDA
 Realtek
ALC3223
TLV70215DBVR
SYSTEM DC/DC
NCP81172
OUTPUTS
DCBATOUT
INPUTS
VGA_CORE
3D3V_S0
1D05V_S0
3D3V_VGA_S0
1D05V_VGA_S0
1D35V_S3 1D35V_VGA_S0
PCB LAYER
SYSTEM DC/DC
TPS51225
CPU DC/DC
TPS51622
LDO
OUTPUTSINPUTS
3D3V_S5
VCC_CORE
TPS51363
1D05V_S0
SYSTEM DC/DC
INPUTS OUTPUTS
DCBATOUT
DCBATOUT
INPUTS OUTPUTS
5V_AUX_S5
3D3V_AUX_S5
5V_CHARGER
3D3V_PWR
DCBATOUT
OUTPUTSINPUTS
SYSTEM DC/DC
TPS51216
OUTPUTS
DCBATOUT
INPUTS
1D35V_S3
0D675V_S0
CHARGER
BQ24717
OUTPUTSINPUTS
AD+
BT+ DCBATOUT
Switches
OUTPUTSINPUTS
5V_S5
3D3V_S5
5V_S0
3D3V_S0
L1 : TOP
L2 : GND
L3 : Signal
L4 : Signal
L5 : VCC
L6 : Signal
L7 : GND
L8 : Bottom
82
36, 83
45
46~47
48
51
49
44
27
31
33
56
29
29
52
52
62
SMBUS
FFS
 ST
 DE351DL
INT1 67
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SKTOCC#
H_CATERR#
H_PROCHOT#_R
H_CPUPWRGD
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
SM_DRAMRST#
DDR_PG_CTRL
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
XDP_TRST#
XDP_TCLK
XDP_BPM1
XDP_BPM0
SM_RCOMP_1
SM_RCOMP_2
SM_DRAMRST#
XDP_BPM[7:0]
SM_RCOMP_0
XDP_TDI
XDP_TDO
XDP_TMS
1D05S_VCCST
1D05S_VCCST
1D35V_S3
H_PECI[24]
H_PROCHOT#[24,42,44,46]
XDP_PREQ# [96]
XDP_PRDY# [96]
DDR_PG_CTRL[12]
DDR3_DRAMRST# [12,13]
XDP_BPM[7:0] [96]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (THERMAL/CLOCK)
A3
4 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (THERMAL/CLOCK)
A3
4 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (THERMAL/CLOCK)
A3
4 101Friday, June 28, 2013
<Core Design>
SSID = CPU
Design Guideline:
SM_RCOMP keep routing length less than 500 mils.
Layout Note:
Place close to DIMMLayout Note:
Impedance control:50 ohm
Layout Note:
X01 change to short pad
1TP403TP403
1 2R404
0R0402-PAD-2-GP
R404
0R0402-PAD-2-GP
BPM#4 K59
BPM#5 H63
BPM#6 K60
SM_RCOMP0AU60
BPM#7 J61
BPM#3 H62
BPM#1 H60
BPM#2 H61
BPM#0 J60
PROC_TDO F62
PROC_TDI F63
PROC_TMS E61
PECIN62
CATERR#K61
PROCPWRGDC61
PROCHOT#K63 PROC_TRST# E59
PROC_TCK E60
PRDY# J62
PREQ# K62
SM_PG_CNTL1AV61
SM_DRAMRST#AV15
SM_RCOMP2AU61
SM_RCOMP1AV60
PROC_DETECT#D61
DDR3L
HSW_ULT_DDR3L
MISC
THERMAL
PWR
JTAG
2 OF 19CPU1B
HASWELL-6-GP
DDR3L
HSW_ULT_DDR3L
MISC
THERMAL
PWR
JTAG
2 OF 19CPU1B
HASWELL-6-GP
1
2
R410
470R2J-2-GP
R410
470R2J-2-GP
1 2R402 51R2J-2-GP
XDPR402 51R2J-2-GPXDP
1TP402TP402
1 2R407 200R2F-L-GPR407 200R2F-L-GP
1 2R406 51R2J-2-GPR406 51R2J-2-GP
12
R405
10KR2J-3-GP
R405
10KR2J-3-GP
1 2R408 120R2F-GPR408 120R2F-GP
1
2
3
4 5
6
7
8
RN401
SRN51J-1-GP
XDP
RN401
SRN51J-1-GP
XDP
1TP401TP401
1
2
R401
62R2J-GP
R401
62R2J-GP
1 2
R403
56R2J-4-GP
R403
56R2J-4-GP
1 2R409 100R2F-L1-GP-UR409 100R2F-L1-GP-U
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ[63:0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ15
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_A_DQS4
M_A_DQS3
M_A_DQS5
M_A_DQS2
M_A_DQS1
M_A_DQS0
M_A_A7
M_A_A12
M_A_A14
M_A_A13
M_A_A9
M_A_A15
M_A_A10
M_A_A0
M_A_A6
M_A_A8
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A11
M_A_DQS#4
M_A_DQS#5
M_A_DQS#3
M_A_DQS#2
M_A_DQS#1
M_A_DQS#0
TP_M_A_DIMA_ODT0
+V_SM_VREF_CNT
M_A_DQ54
M_A_DQ53
M_A_DQ51
M_A_DQ48
M_A_DQ55
M_A_DQ52
M_A_DQ50
M_A_DQ49
M_A_DQ59
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ57
M_A_DQ62
M_A_DQ56 M_A_DQS7
M_A_DQS6
M_A_DQS#7
M_A_DQS#6
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63:0]
TP_M_B_DIMB_ODT0
M_B_DQS#3M_B_DQS#2
M_B_DQS#1
M_B_DQS#0
M_B_DQS#7
M_B_DQS#6
M_B_DQS#5
M_B_DQS#4
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
M_A_DQ[63:0][12]
M_A_DQS[7:0] [12]
M_A_A[15:0] [12]
M_A_DQS#[7:0] [12]
M_A_CAS# [12]
M_A_RAS# [12]
M_A_WE# [12]
M_A_BS0 [12]
M_A_BS1 [12]
M_A_BS2 [12]
M_A_DIMA_CS#0 [12]
M_A_DIMA_CKE0 [12]
M_A_DIMA_CLK_DDR#0 [12]
M_A_DIMA_CLK_DDR0 [12]
DDR_WR_VREF01 [12]
+V_SM_VREF_CNT [37]
M_A_DIMA_CS#1 [12]
M_A_DIMA_CKE1 [12]
M_A_DIMA_CLK_DDR#1 [12]
M_A_DIMA_CLK_DDR1 [12]
M_B_DQ[63:0][13]
M_B_DQS#[7:0] [13]
M_B_DIMB_CS#0 [13]
M_B_DIMB_CS#1 [13]
M_B_DQS[7:0] [13]
M_B_A[15:0] [13]
M_B_BS0 [13]
M_B_BS1 [13]
M_B_BS2 [13]
M_B_CAS# [13]
M_B_RAS# [13]
M_B_WE# [13]
M_B_DIMB_CKE0 [13]
M_B_DIMB_CKE1 [13]
M_B_DIMB_CLK_DDR0 [13]
M_B_DIMB_CLK_DDR#0 [13]
M_B_DIMB_CLK_DDR1 [13]
M_B_DIMB_CLK_DDR#1 [13]
DDR_WR_VREF02 [13]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (DDR)
Custom
5 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (DDR)
Custom
5 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (DDR)
Custom
5 101Friday, June 28, 2013
<Core Design>
SSID = CPU
SB_DQ14
AV25
SB_DQSN5
AV18
SB_DQSN7
AN18
SB_DQSP4
AV22
SB_DQSP5
AW18
SB_DQSP6
AM21
SB_DQSP3
AM25
SB_DQSP7
AM18
SB_DQSP2
AM28
SB_DQSP0
AV30
SB_DQSP1
AW26
SB_DQSN6
AN21
SB_DQSN2
AN28
SB_DQSN3
AN25
SB_DQSN4
AW22
SB_DQSN1
AV26
SB_DQSN0
AW30
SB_MA14
AR46
SB_MA15
AP46
SB_MA13
AK33
SB_MA9
AU46
SB_MA10
AK36
SB_MA11
AV47
SB_MA8
AY47
SB_MA12
AU47
SB_MA4
AR45
SB_MA5
AP45
SB_MA6
AW46
SB_MA3
AR42
SB_MA7
AY46
SB_MA2
AP42
SB_MA0
AP40
SB_MA1
AR40
SB_BA2
AU49
SB_WE#
AK35
SB_CAS#
AM33
SB_BA0
AL35
SB_BA1
AM36
SB_RAS#
AM35
SB_CS#1
AK32
SB_ODT0
AL32
SB_CS#0
AM32
SB_CKE1
AU50
SB_CKE2
AW49
SB_CKE3
AV50
SB_CKE0
AY49
SB_CK#1
AK38
SB_CK1
AL38
SB_CK0
AN38
SB_CK#0
AM38
SB_DQ61
AM20
SB_DQ63
AP18
SB_DQ62
AR18
SB_DQ57
AR20
SB_DQ56
AN20
SB_DQ58
AK18
SB_DQ59
AL18
SB_DQ60
AK20
SB_DQ51
AM22
SB_DQ52
AN22
SB_DQ53
AP21
SB_DQ54
AK21
SB_DQ55
AK22
SB_DQ46
AV17
SB_DQ47
AU17
SB_DQ48
AR21
SB_DQ49
AR22
SB_DQ50
AL21
SB_DQ45
AU19
SB_DQ41
AW19
SB_DQ42
AY17
SB_DQ43
AW17
SB_DQ44
AV19
SB_DQ40
AY19
SB_DQ36
AV23
SB_DQ37
AU23
SB_DQ38
AV21
SB_DQ39
AU21
SB_DQ35
AW21
SB_DQ31
AL25
SB_DQ32
AY23
SB_DQ33
AW23
SB_DQ30
AK25
SB_DQ34
AY21
SB_DQ26
AR25
SB_DQ25
AR26
SB_DQ27
AP25
SB_DQ28
AK26
SB_DQ29
AM26
SB_DQ20
AR29
SB_DQ21
AN29
SB_DQ22
AR28
SB_DQ23
AP28
SB_DQ24
AN26
SB_DQ15
AU25
SB_DQ16
AM29
SB_DQ17
AK29
SB_DQ18
AL28
SB_DQ19
AK28
SB_DQ10
AY25
SB_DQ11
AW25
SB_DQ13
AU27
SB_DQ5
AU31
SB_DQ7
AU29
SB_DQ8
AY27
SB_DQ9
AW27
SB_DQ0
AY31
SB_DQ1
AW31
SB_DQ2
AY29
SB_DQ3
AW29
SB_DQ4
AV31
SB_DQ12
AV27
SB_DQ6
AV29
HSW_ULT_DDR3L
DDR CHANNEL B
4 OF 19CPU1D
HASWELL-6-GP
HSW_ULT_DDR3L
DDR CHANNEL B
4 OF 19CPU1D
HASWELL-6-GP
1 TP503TP503
1 TP501TP501
SM_VREF_DQ0
AR51
SM_VREF_DQ1
AP51
SM_VREF_CA
AP49
SA_DQSP7
AL49
SA_DQSP5
AW53
SA_DQSP6
AL42
SA_DQSP2
AN58
SA_DQSP3
AN55
SA_DQSP4
AW57
SA_DQSP0
AJ62
SA_DQSP1
AN61
SA_DQSN6
AL43
SA_DQSN7
AL48
SA_DQSN4
AV57
SA_DQSN5
AV53
SA_DQSN3
AM55
SA_DQSN1
AN62
SA_DQSN2
AM58
SA_DQSN0
AJ61
SA_MA15
AU42
SA_MA13
AR35
SA_MA14
AV42
SA_MA10
AP35
SA_MA12
AU41
SA_MA11
AW41
SA_MA8
AY39
SA_MA9
AU40
SA_MA6
AV40
SA_MA7
AW39
SA_MA5
AR36
SA_MA4
AU39
SA_MA3
AP36
SA_MA2
AR38
SA_MA0
AU36
SA_MA1
AY37
SA_BA2
AY41
SA_BA1
AV35
SA_BA0
AU35
SA_WE#
AW34
SA_CAS#
AU34
SA_RAS#
AY34
SA_ODT0
AP32
SA_CS#0
AP33
SA_CS#1
AR32
SA_CKE3
AY43
SA_CKE0
AU43
SA_CKE1
AW43
SA_CKE2
AY42
SA_DQ15
AP60
SA_DQ63
AK51
SA_DQ62
AM51
SA_DQ61
AK48
SA_DQ60
AM48
SA_DQ59
AK49
SA_DQ58
AM49
SA_DQ57
AK46
SA_DQ56
AM46
SA_DQ55
AM42
SA_DQ54
AM40
SA_DQ53
AK43
SA_DQ52
AK45
SA_DQ51
AM45
SA_DQ50
AM43
SA_DQ49
AK42
SA_DQ48
AK40
SA_DQ47
AU52
SA_DQ46
AV52
SA_DQ45
AU54
SA_DQ44
AV54
SA_DQ43
AW52
SA_DQ42
AY52
SA_DQ41
AW54
SA_DQ40
AY54
SA_DQ39
AU56
SA_DQ38
AV56
SA_DQ37
AU58
SA_DQ36
AV58
SA_DQ35
AW56
SA_DQ34
AY56
SA_DQ33
AW58
SA_DQ32
AY58
SA_DQ31
AN54
SA_DQ30
AR54
SA_DQ29
AK55
SA_DQ26
AM54
SA_DQ27
AK54
SA_DQ24
AP55
SA_DQ23
AN57
SA_DQ22
AR57
SA_DQ21
AK58
SA_DQ20
AL58
SA_DQ19
AK57
SA_DQ18
AM57
SA_DQ17
AR58
SA_DQ16
AP58
SA_DQ14
AP61
SA_DQ13
AM60
SA_DQ12
AM61
SA_DQ11
AP62
SA_DQ10
AP63
SA_DQ9
AM62
SA_DQ8
AM63
SA_DQ7
AK60
SA_DQ6
AK61
SA_DQ5
AH60
SA_DQ3
AK62
SA_DQ2
AK63
SA_DQ1
AH62
SA_DQ0
AH63
SA_CLK#0
AU37
SA_CLK0
AV37
SA_CLK#1
AW36
SA_CLK1
AY36
SA_DQ28
AL55
SA_DQ25
AR55
SA_DQ4
AH61
HSW_ULT_DDR3L
DDR CHANNEL A
3 OF 19CPU1C
HASWELL-6-GP
HSW_ULT_DDR3L
DDR CHANNEL A
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG3
CFG4
CFG_RCOMP
EDP_SPARE
PROC_OPI_COMP
HVM_CLK#
HVM_CLK
TD_IREF
CFG0
CFG[19:0]
CFG1
CFG2
CFG3
CFG7
CFG5
CFG4
CFG6
CFG11
CFG9
CFG8
CFG10
CFG12
CFG13
CFG14
CFG15
CFG16
CFG19
PROC_OPI_COMP3
CFG18
CFG17
CFG[19:0][96]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (RESERVED)
A3
6 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (RESERVED)
A3
6 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (RESERVED)
A3
6 101Friday, June 28, 2013
<Core Design>
SSID = CPU
1 : DISABLED
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
0 : ENABLED
CFG[3]
0 : ENABLED
DISPLAY PORT PRESENCE STRAP
1 : DISABLED
CFG[4]
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT
NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT
Layout Note:
1.Referenced "continuous" VSS plane only.
2.Avoid routing next to clock pins or noisy 
 signals.
3.Trace width: 12~15mil
4.Isolation Spacing: 12mil
5.Max length: 500mil
CFG4AA60
CFG5Y62
CFG17AA61
CFG18U63
CFG7Y60
CFG11U60
RSVD_TP#AU63 AU63
RSVD_TP#C63 C63
RSVD_TP#C62 C62
RSVD_TP#L60 L60
RSVD_TP#B51 B51
RSVD_TP#A51 A51
CFG10V60
CFG9V61
CFG8V62
RSVD#N60 N60
RSVD#Y22 Y22
RSVD#W23 W23
RSVD#D58 D58
RSVD#AV62 AV62
RSVD_TP#AV63 AV63
VSS N21
VSS P22
CFG19U62
RSVD#R20 R20
RSVD#P20 P20
RSVD#J20J20
CFG3AA63
CFG2AC63
CFG1AC62
CFG16AA62
CFG15T60
CFG14T61
CFG_RCOMPV63
RSVD#A5A5
RSVD#E1E1
RSVD#D1D1
TD_IREFB12
RSVD#H18H18
PROC_OPI_RCOMP AY15
CFG12T63
CFG13T62
CFG0AC60
CFG6Y61 RSVD#B43 B43
RESERVED
HSW_ULT_DDR3L 19 OF 19CPU1S
RESERVED
HSW_ULT_DDR3L 19 OF 19CPU1S
1
TP619TP619
1
TP605TP605
1
2
R605
1KR2J-1-GP
R605
1KR2J-1-GP
1 2R602 49D9R2F-GPR602 49D9R2F-GP
1 2R606 49D9R2F-GPDYR606 49D9R2F-GPDY
1 2
R601
49D9R2F-GP
R601
49D9R2F-GP
1
TP620TP620
1
2
R604
1KR2J-1-GP
DY
R604
1KR2J-1-GP
DY
1 2
R603
8K2R2F-1-GP
R603
8K2R2F-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDALRT#
VR_SVID_ALERT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
H_CPU_SVIDDAT
H_VCCST_PWRGD
TP_VCCIO_OUT
PWR_DEBUG
H_VCCST_PWRGD
IMVP_PWRGD_R
IMVP_PWRGD_L IMVP_PWRGD_R
H_VR_ENABLE
1D35V_S3
VCC_CORE
+VCCIOA_OUT
1D05S_VCCST
1D05S_VCCST
VCC_CORE
VCC_CORE
VCC_CORE
3D3V_S5
1D05S_VCCST1D05V_S0
1D05S_VCCST
1D05S_VCCST
VCC_SENSE[46]
H_CPU_SVIDCLK[46]
H_CPU_SVIDDAT[46]
H_VR_ENABLE[46]
1D05V_VTT_PWRGD[36,48]
IMVP_PWRGD[24,46]
VR_SVID_ALERT#[46]
Title
Size Document Number Rev
Date: Sheet of
WistronCorporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VCC_CORE)
A3
7 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VCC_CORE)
A3
7 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VCC_CORE)
A3
7 101Friday, June 28, 2013
<Core Design>
SSID = CPU
Layout Note:
1. Place close to CPU
2. VCC_SENSE/ VSS_SENSE 
 impedance=50 ohm
3. Lwngth match<25mil
A00 0619
1 2
R713
100KR2F-L1-GP
R713
100KR2F-L1-GP
1
2
C
7
0
1
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
C
7
0
1
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
KA
PD701
BAT54LPS-7-GP
DY
PD701
BAT54LPS-7-GP
DY
1 2
R707
100KR2F-L1-GP
R707
100KR2F-L1-GP
1 2C705
SCD1U25V2KX-GP
DYC705
SCD1U25V2KX-GP
DY
1
2
R709
51KR2J-1-GP
R709
51KR2J-1-GP
1
2
C704S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
C704S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
PC706
SCD047U10V2KX-2GPDY
PC706
SCD047U10V2KX-2GPDY
1 2R703 75R2F-2-GPR703 75R2F-2-GP
1 2
R711
0R0805-PAD-2-GP-U
R711
0R0805-PAD-2-GP-U
VCCIO_OUTA59
VCCIOA_OUTE20
RSVD#AD23AD23
RSVD#AB23AB23
RSVD#AC58AC58
VCCF59
VDDQAY44
VDDQAY40
VDDQAY35
RSVD#AA59AA59
RSVD#U59U59
RSVD#V59V59
RSVD#AG58AG58
RSVD#AC59AC59
RSVD#AE60AE60
RSVD#AD59AD59
VCCSTAC22
VDDQAY50
RSVD#N58N58
VCC_SENSEE63
RSVD#AA23AA23
RSVD#AE59AE59
VCCST_PWRGDB59
VR_READYC59
VR_ENF60
VDDQAR48
VDDQAP43
VDDQAN33
VDDQAJ37
VDDQAJ33
VDDQAJ31
VDDQAH26
RSVD#J58J58
RSVD#L59L59
VCCC24
VCCC28
VCCC32
VCCAG57
VCC W57
VCC U57
VCC M23
VCC M57
VCC P57
VCC L22
VCC K57
VCC H23
VCC J23
VCC G55
VCC G57
VCC G49
VCC G51
VCC G53
VCC G45
VCC G47
VCC G43
VCC G39
VCC G41
VCC G37
VCC G35
VCC G33
VCC G29
VCC G31
VCC G27
VCC G25
VCC G23
VCC F52
VCC F56
VCC F48
VCC F44
VCC F40
VCC F28
VCC F32
VCC F36
VCC F24
VCC E57
VCC E51
VCC E53
VCC E55
VCC E47
VCC E49
VCC E41
VCC E43
VCC E45
VCC E37
VCC E39
VCC E31
VCC E33
VCC E35
VCC E27
VCC E29
VCC C56
VCC E23
VCC E25
VCC C48
VCC C52
VCC C36
VCC C40
VCC C44
VCC K23
VCCAD57
VCCAB57
VCCSTAE23
VCCSTAE22
VIDSOUTL63
VIDSCLKN63
VIDALERT#L62
VSSP62
RSVD_TP#P60P60
RSVD_TP#P61P61
RSVD_TP#N59N59
RSVD_TP#N61N61
RSVD#T59T59
RSVD#AD60AD60
VSSD63
PWR_DEBUG#H59
HSW_ULT_DDR3L
HSW ULT POWER
12 OF 19CPU1L
HASWELL-6-GP
HSW_ULT_DDR3L
HSW ULT POWER
12 OF 19CPU1L
HASWELL-6-GP
1 2
PR714
0R2J-2-GP
PR714
0R2J-2-GP
1 2R704 130R2F-1-GPR704 130R2F-1-GP
1
2
R706
10KR2J-3-GPDY
R706
10KR2J-3-GPDY
1
2
EC701S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
EC701S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1 2
R701
43R2J-GP
R701
43R2J-GP
1
2
C702
SCD1U10V2KX-5GP
DYC702
SCD1U10V2KX-5GP
DY
1 2
R710
10KR2J-3-GPDY R710
10KR2J-3-GPDY
NC#11
A2
GND3 Y 4
VCC 5
U701
74LVC1G07GW-GP
73.01G07.0HG
DY
U701
74LVC1G07GW-GP
73.01G07.0HG
DY
1
2
C
7
0
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
7
0
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1 2R705 150R2J-L1-GP-UR705 150R2J-L1-GP-U
1
2
R712
47KR2F-GP
R712
47KR2F-GP
1
2
PR715
10KR2F-2-GPDY
PR715
10KR2F-2-GPDY
1TP701TP701
1
2
R702
100R2F-L1-GP-U
R702
100R2F-L1-GP-U
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EDP_BRIGHTNESS
EDP_COMP
+VCCIOA_OUT
HDMI_DATA0[54]
HDMI_DATA0#[54]
HDMI_DATA2[54]
HDMI_DATA2#[54]
HDMI_CLK[54]
HDMI_DATA1[54]
HDMI_CLK#[54]
HDMI_DATA1#[54]
EDP_TX1_DP [53]
EDP_AUX_DP [53]
EDP_AUX_DN [53]
EDP_TX0_DN [53]
EDP_TX0_DP [53]
EDP_TX1_DN [53]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (DDI/EDP)
A3
8 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (DDI/EDP)
A3
8 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (DDI/EDP)
A3
8 101Friday, June 28, 2013
<Core Design>
SSID = CPU
HDMI
Design Guideline:
EDP_COMP keep routing length max 100 mils.
Trace Width:20 mils.
X01 remove
DDI1_TXN0C54
DDI1_TXP0C55
DDI1_TXN1B58
DDI1_TXP1C58
DDI1_TXN2B55
DDI1_TXP2A55
DDI1_TXN3A57
EDP_TXP0 B46
EDP_TXN0 C45
EDP_TXN1 A47
EDP_TXP1 B47
EDP_TXN2 C47
EDP_TXP2 C46
EDP_TXN3 A49
EDP_TXP3 B49
EDP_AUXP B45
EDP_AUXN A45
DDI1_TXP3B57
DDI2_TXP1B54
DDI2_TXP0C50
DDI2_TXN0C51
DDI2_TXN1C53
DDI2_TXN2C49
DDI2_TXP2B50
DDI2_TXN3A53
DDI2_TXP3B53
EDP_RCOMP D20
EDP_DISP_UTIL A43
HSW_ULT_DDR3L
EDPDDI
1 OF 19CPU1A
HASWELL-6-GP
HSW_ULT_DDR3L
EDPDDI
1 OF 19CPU1A
HASWELL-6-GP
1
2
R801
24D9R2F-L-GP
R801
24D9R2F-L-GP
1 TP801
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS_SENSE VSS_SENSE [46]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VSS)
A3
9 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VSS)
A3
9 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VSS)
A3
9 101Friday, June 28, 2013
<Core Design>
SSID = CPU
Layout Note:
1. Place close to CPU
2. VCC_SENSE/ VSS_SENSE 
 impedance=50 ohm
3. Lwngth match<25mil
VSSD59
VSS Y63
VSS Y59
VSS Y10
VSS V10
VSS U9
VSS U22
VSS U61
VSS U20
VSS T58
VSS T1
VSS R22
VSS R8
VSS R10
VSS P63
VSS P59
VSS N3
VSS N10
VSS M22
VSS L61
VSS L58
VSS L20
VSS L18
VSS L17
VSS L15
VSS L13
VSS K12
VSS K1
VSS J63
VSS J59
VSS J22
VSS H17
VSSF38
VSSF50
VSS AH16
VSSF42
VSSF34
VSSE17
VSSG22
VSSG6
VSSD39
VSSD38
VSSD37
VSSD35
VSSD34
VSSD43
VSSD45
VSSD46
VSSD47
VSSD5
VSSD50
VSSD51
VSSD53
VSSD54
VSSD55
VSSD57
VSSD62
VSSD8
VSSE11
VSSF46
VSSF54
VSSF58
VSSF61
VSSG18
VSSG3
VSSG5
VSSG8
VSSH13
VSSD42
VSSD41
VSS H57
VSS L7
VSSD33
VSS J10
VSS V58
VSS AH46
VSS V23
VSS_SENSE E62
VSS W22
VSS W20
VSS V7
VSS V3
VSSD49
VSSF30
VSSF26
VSSF20
HSW_ULT_DDR3L 16 OF 19CPU1P
HASWELL-6-GP
HSW_ULT_DDR3L 16 OF 19CPU1P
HASWELL-6-GP
1
2
R
9
0
1
1
0
0
R
2
F
-L
1
-G
P
-U
R
9
0
1
1
0
0
R
2
F
-L
1
-G
P
-U
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1D35V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU(Power CAP1)
A3
10 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU(Power CAP1)
A3
10 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU(Power CAP1)
A3
10 101Friday, June 28, 2013
<Core Design>
SSID = CPU
Layout Note:
As close to CPU as possible
Layout Note:
Direct tie to CPU VccIn/Vss balls
1
2
C
1
0
0
5
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
0
0
5
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
0
1
9
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
C
1
0
1
9
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
1
2
C
1
0
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
0
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
0
0
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
0
0
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
0
0
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
0
0
2
S
C
1
0
U
6
D
3
V
3M
X
-G
P
1
2
C
1
0
1
8
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
C
1
0
1
8
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
1
2
C
1
0
1
7
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
C
1
0
1
7
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
1
2
C
1
0
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
0
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
0
2
0
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
C
1
0
2
0
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
1
2
C
1
0
0
6
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
0
0
6
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V1.05S_APLLOPI
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
+V1.05S_AXCK_DCB
1D05V_HSIO +V1.05DX_MODPHY_PCH
+V1.05S_APLLOPI1D05V_S0
3D3V_S5_PCH +V3.3A_PSUS
1D05V_S0 +V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL1D05V_S0
1D05V_S0 +1.05M_ASW 1D05V_S0
RTC_AUX_S5
+V1.05S_AUSB3PLL1D05V_HSIO
1D05V_HSIO +V1.05S_ASATA3PLL
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU(Power CAP2)
A3
11 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU(Power CAP2)
A3
11 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU(Power CAP2)
A3
11 101Friday, June 28, 2013
<Core Design>
CAP need close to pin K9 L10
MAX: 1.92A
CAP need close to pin AA21 CAP need close to pin AC9 CAP need close to pin J18
CAP need close to pin A20 CAP need close to pin AE9 CAP need close to pin AE8 J11
CAP need close to pin B18 CAP need close to pin B11
CAP need close to pin AG10
1205 Add
1205 Add
1205 Add
1.838A 41mA 42mA
200mA62mA57mA
31mA 658mA 1.632A 1mA
SSID = CPU
1
2
C
1
1
0
6
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
1
0
6
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
1
1
7
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
1
7
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
1
0
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
0
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
1
1
0
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
1
1
0
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
1
0
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
0
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2L1103 IND-2D2UH-196-GP
68.2R21D.10R
L1103 IND-2D2UH-196-GP
68.2R21D.10R
1
2
C
1
1
2
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
2
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
1
2
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
1
2
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
1
2
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
1
2
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
1
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2
R1103
0R0603-PAD-2-GP-U
R1103
0R0603-PAD-2-GP-U
1
2
C
1
1
2
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
1
2
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1 2L1102 IND-2D2UH-196-GP
68.2R21D.10R
L1102 IND-2D2UH-196-GP
68.2R21D.10R
1
2
C
1
1
1
9
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
1
1
9
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
1
1
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
1
1
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
1
1
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
C
1
1
1
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
C
1
1
1
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
1
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
1
2
5
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
1
2
5
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1 2L1101 IND-2D2UH-196-GP
68.2R21D.10R
L1101 IND-2D2UH-196-GP
68.2R21D.10R
1
2
C
1
1
2
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
1
2
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2
R1104
0R0603-PAD-2-GP-U
R1104
0R0603-PAD-2-GP-U
1
2
C
1
1
1
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
1
1
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
1
0
9
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
0
9
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2
R1102
0R0603-PAD-2-GP-U
R1102
0R0603-PAD-2-GP-U
1
2
C
1
1
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
1
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
1
0
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
1
0
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
1
0
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
0
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
1
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
1
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
1
1
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
1
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2
R1101
0R0805-PAD-2-GP-U
R1101
0R0805-PAD-2-GP-U
1
2
C
1
1
1
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
1
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
1
0
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
1
0
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2
L1104
IND-2D2UH-196-GP
68.2R21D.10R
L1104
IND-2D2UH-196-GP
68.2R21D.10R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DIMA_ODT0
M_A_DIMA_ODT1
SA0_DIMA
SA1_DIMA
SA0_DIMA
SA1_DIMA
DDR_PG_CTRL_R
M_A_B_DIMM_ODT
M_A_DIMA_ODT1
DDR_VTT_PG_CTRL
M_A_DIMA_ODT0
+V_VREF_PATH1
M_A_DQS#5
M_A_DQS#6
M_A_DQ43
M_A_DQ14
M_A_DQ26
M_A_DQ32
M_A_DQ35
M_A_DQ39
M_A_DQ17
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ20
M_A_DQ21
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ58
M_A_DQ59
M_A_DQ3
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ25
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ28
M_A_DQ42
M_A_DQ15
M_A_DQS5
M_A_DQS6
M_A_DQ47
M_A_DQ22
M_A_DQ23
M_A_DQ10
M_A_DQ44
M_A_DQS#0
M_A_DQS#7
M_A_DQS#2
M_A_DQS#4
M_A_DQ13
M_A_DQ24
M_A_DQ30
M_A_DQS4
M_A_DQS0
M_A_DQS7
M_A_DQS2
M_A_DQ46
M_A_DQS3
M_A_DQS#1
M_A_DQS1
M_A_DQS#3
M_A_DQ11
M_A_DQ45
M_A_DQ9
M_A_DQ41
M_A_DQ33
M_A_DQ34
M_A_DQ8
M_A_DQ27
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A6
M_A_DQ31
M_A_A13
M_A_A14
M_A_A15
M_A_A12
M_A_A0
M_A_DQ51
M_A_DQ16
M_A_DQ18
M_A_DQ19
M_A_DQ29
M_A_DQ40
M_A_DQ56
M_A_DQ57
M_A_DQ12
3D3V_S0
0D675V_S0
M_VREF_DQ_DIMMA
M_VREF_CA_DIMMA
1D35V_S3
0D675V_S0
M_VREF_CA_DIMMA
M_VREF_DQ_DIMMA
1D35V_S3
5V_S5
1D35V_S3
1D35V_S3
M_VREF_DQ_DIMMA
1D35V_S30D675V_VTTREF
DDR3_DRAMRST#[4,13]
PCH_SMBCLK [13,18,58,62,67]
PCH_SMBDATA [13,18,58,62,67]
M_A_WE# [5]
M_A_DIMA_CS#0 [5]
M_A_DIMA_CKE0 [5]
M_A_CAS# [5]
M_A_DIMA_CKE1 [5]
M_A_DIMA_CS#1 [5]
M_A_DIMA_CLK_DDR0 [5]
M_A_DIMA_CLK_DDR#0 [5]
M_A_DIMA_CLK_DDR1 [5]
M_A_DIMA_CLK_DDR#1 [5]
M_A_RAS# [5]
DDR_VTT_PG_CTRL [49]DDR_PG_CTRL[4]
M_B_DIMB_ODT0 [13]
M_B_DIMB_ODT1 [13]
DDR_WR_VREF01[5]
M_A_BS2[5]
M_A_BS0[5]
M_A_BS1[5]
M_A_DQ[63:0][5]
M_A_DQS#[7:0][5]
M_A_DQS[7:0][5]
M_A_A[15:0][5]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DDR3L-SODIMM1
Custom
12 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DDR3L-SODIMM1
Custom
12 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DDR3L-SODIMM1
Custom
12 101Friday, June 28, 2013
<Core Design>
SSID = MEMORY
Layout Note:
Place these caps
close to VREF_DQ
Note:
SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
Layout Note:
Layout Note:
Place these caps
close to VREF_CA
All VREF traces should
have width=20mil; 
spacing=20 mil 
Layout Note:
Place these Caps near SO-DIMMA.
Layout Note:
Place these caps
close to VTT1 and
VTT2.
close to dimm
Q1201 Need check Vth=1V
Layout Note:
Place Close SO-DIMMA.
X01 change to short pad
1
2
C
1
2
1
4
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
2
1
4
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
2
17
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
2
1
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1 2
R1205
0R0402-PAD-2-GP
R1205
0R0402-PAD-2-GP
G S
D
Q1202
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q1202
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
1
2
C
1
2
2
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
2
2
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C
1
2
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
2
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
1
2
1
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
2
1
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
R1211
1K8R2F-GP
R1211
1K8R2F-GP
1
2
C
1
2
1
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
2
1
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2R1207 66D5R2F-GPR1207 66D5R2F-GP
1
2
C
1
2
2
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
2
2
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C1219
SCD022U16V2JX-GP
C1219
SCD022U16V2JX-GP
1
2
C
1
2
1
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
2
1
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2R1206 66D5R2F-GPR1206 66D5R2F-GP
1
2
C
1
2
1
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
1
2
1
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
R1213
1K8R2F-GP
R1213
1K8R2F-GP
1
2
R1202
0R0402-PAD-2-GP
R1202
0R0402-PAD-2-GP
1
2
C
1
2
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
PDY
C
1
2
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
PDY
1
2
C
1
2
1
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
2
1
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R1215
0R2J-2-GP
DY
R1215
0R2J-2-GP
DY
1
2
C
1
2
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
C
1
2
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
1 2R1203 66D5R2F-GPR1203 66D5R2F-GP
1 2R1209 66D5R2F-GPR1209 66D5R2F-GP
1
2
R1201
0R0402-PAD-2-GP
R1201
0R0402-PAD-2-GP
1
2
R1204
2MR2-GP
DY
R1204
2MR2-GP
DY
1
2
C
1
2
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
1
2
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
C
1
2
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
2
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
R1212
24D9R2F-L-GP
R1212
24D9R2F-L-GP
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
SKT_DDR 204P SMD
DM1
DDR3-204P-122-GP-U1
62.10017.Z51
SKT_DDR 204P SMD
DM1
DDR3-204P-122-GP-U1
62.10017.Z51
1
2
R1208
220KR2J-L2-GP
R1208
220KR2J-L2-GP
1
2
C
1
2
1
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
2
1
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C1203
SCD1U10V2KX-5GP DY
C1203
SCD1U10V2KX-5GP DY
G
DS
Q1201
DMN5L06K-7-GP
84.05067.031
Q1201
DMN5L06K-7-GP
84.05067.031
1
2
C
1
2
0
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
2
0
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1 2
R1210
2R2F-GP
R1210
2R2F-GP
1
2
C
1
2
0
9
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
2
0
9
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
2
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
PDY
C
1
2
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
PDY
1
2
C
1
2
2
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
2
2
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C
1
2
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
2
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SA1_DIMB
SA0_DIMBSA0_DIMB
SA1_DIMB
+V_VREF_PATH2
M_B_DQ23
M_B_DQ22
M_B_DQS#3
M_B_DQS3
M_B_DQS5
M_B_DQS#5
M_B_DQ11
M_B_DQ10
M_B_DQ12
M_B_DQ29
M_B_DQ28
M_B_A4
M_B_A5
M_B_A7
M_B_A6
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A12
M_B_A15
M_B_A14
M_B_A13
M_B_A0
M_B_DQ21
M_B_DQ20
M_B_DQ1
M_B_DQ53
M_B_DQ52
M_B_DQ24
M_B_DQ55
M_B_DQ54
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ2
M_B_DQ59
M_B_DQ58
M_B_DQ31
M_B_DQ30
M_B_DQ3
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ33
M_B_DQ32
M_B_DQ35
M_B_DQ34
M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ6
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ8
M_B_DQ9
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ43
M_B_DQ14
M_B_DQ13
M_B_DQ15
M_B_DQ0
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_A1
M_B_A2
M_B_DQS#7
M_B_DQS7
M_B_A3
M_B_DQ56
M_B_DQ57
M_B_DQS#1
M_B_DQS1
M_B_DQS#2
M_B_DQS#4
M_B_DQS#0
M_B_DQS#6
M_B_DQS6
M_B_DQS0
M_B_DQS2
M_B_DQS4
3D3V_S0
3D3V_S0
M_VREF_CA_DIMMB
M_VREF_DQ_DIMMB
0D675V_S0
1D35V_S3
1D35V_S3
0D675V_S0
M_VREF_CA_DIMMB
M_VREF_DQ_DIMMB
1D35V_S3
M_VREF_DQ_DIMMB
0D675V_VTTREF
M_B_DIMB_ODT0[12]
M_B_DIMB_ODT1[12]
DDR3_DRAMRST#[4,12]
PCH_SMBCLK [12,18,58,62,67]
PCH_SMBDATA [12,18,58,62,67]
M_B_WE# [5]
M_B_DIMB_CS#0 [5]
M_B_CAS# [5]
M_B_DIMB_CKE0 [5]
M_B_DIMB_CKE1 [5]
M_B_DIMB_CS#1 [5]
M_B_DIMB_CLK_DDR0 [5]
M_B_DIMB_CLK_DDR#0 [5]
M_B_DIMB_CLK_DDR1 [5]
M_B_DIMB_CLK_DDR#1 [5]
M_B_RAS# [5]
DDR_WR_VREF02[5]
M_B_BS0[5]
M_B_BS2[5]
M_B_BS1[5]
M_B_DQ[63:0][5]
M_B_A[15:0] [5]
M_B_DQS[7:0] [5]
M_B_DQS#[7:0] [5]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DDR3L-SODIMM2
Custom
13 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DDR3L-SODIMM2
Custom
13 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DDR3L-SODIMM2
Custom
13 101Friday, June 28, 2013
<Core Design>
Layout Note:
Layout Note:
Place these caps
close to VREF_DQ
Layout Note:
Place these caps
close to VTT1 and
VTT2.
Layout Note:
SSID = MEMORY
All VREF traces should
have width=20mil; 
spacing=20 mil 
Place these caps
close to VREF_CA
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
Layout Note:
Place these Caps near SO-DIMMA.
close to dimm
Layout Note:
Place Close SO-DIMMA.
1
2
C1303
SCD1U10V2KX-5GP
DYC1303
SCD1U10V2KX-5GP
DY
1
2
R1301
10KR2J-3-GP
R1301
10KR2J-3-GP
1
2
C
1
3
1
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
3
1
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
3
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
3
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
E
C
1
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
E
C
1
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R1302
0R0402-PAD-2-GPR1302
0R0402-PAD-2-GP
1
2
R1308
0R2J-2-GP
DYR1308
0R2J-2-GP
DY
1 2
R1304
2R2F-GP
R1304
2R2F-GP
1
2
E
C
1
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
E
C
1
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
1
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
1
3
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
3
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
1
3
0
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
1
3
0
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C
1
3
1
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
3
1
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R1303
1K8R2F-GP
R1303
1K8R2F-GP
1
2
C
1
3
1
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
3
1
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
3
1
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
3
1
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R1306
1K8R2F-GP
R1306
1K8R2F-GP
1
2
C
1
3
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
1
3
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C
1
3
1
7
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
1
3
1
7
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
1
3
1
0
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
3
1
0
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
3
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
1
3
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
C
1
3
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
C
1
3
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
1
2
C
1
3
0
9
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
3
0
9
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C
1
3
1
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
1
3
1
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
SKT_DDR 204P SMD
DM2
DDR3-204P-122-GP-U1
62.10017.Z51
SKT_DDR 204P SMD
DM2
DDR3-204P-122-GP-U1
62.10017.Z51
1
2
C1320
SCD022U16V2JX-GP
C1320
SCD022U16V2JX-GP
1
2
R1307
24D9R2F-L-GP
R1307
24D9R2F-L-GP
1
2
C
1
3
1
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
3
1
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
1
3
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
3
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
1
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
1
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
L_BKLT_CTRL_R
PCI_PME#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
DGPU_PWR_EN
DGPU_HOLD_RST#
DGPU_PWROK
DGPU_HOLD_RST#
PCH_SD_CD#
DGPU_PWROK
DGPU_PWR_EN
PIRQD#
PIRQA#
PIRQB#
PIRQC#
MCP_GPIO55
3D3V_S0
3D3V_S0
L_BKLT_CTRL[53]
L_BKLT_EN[24]
EDP_HPD [52,53]
PCH_HDMI_CLK [54]
PCH_HDMI_DATA [54]
HDMI_PCH_DET [54]
EDP_VDD_EN[52]
DGPU_PWR_EN[82,83]
DGPU_HOLD_RST#[73]
DGPU_PWROK[24,82,83]
HDD_FALL_INT[67]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU ( EDP SIDEBAND/GPIO/DDI )
A3
15 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU ( EDP SIDEBAND/GPIO/DDI )
A3
15 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU ( EDP SIDEBAND/GPIO/DDI )
A3
15 101Friday, June 28, 2013
<Core Design>
SSID = CPU
A00 change to PIRQB#
1TP1501TP1501
1 2
34
RN1501
SRN2K2J-1-GP
RN1501
SRN2K2J-1-GP
1 2R1503
0R0402-PAD-2-GP
R1503
0R0402-PAD-2-GP
1
2 3
4
RN1504
SRN10KJ-5-GP
OPS
RN1504
SRN10KJ-5-GP
OPS
1TP1503TP1503
1TP1502TP1502
1 2
R1509
100KR2J-1-GP
R1509
100KR2J-1-GP
1
2
3
45
6
7
8
RN1505
SRN10KJ-6-GP
RN1505
SRN10KJ-6-GP
1 2R1501
0R0402-PAD-2-GP
R1501
0R0402-PAD-2-GP
DDPC_AUXN B6
DDPC_AUXP A6
DDPB_AUXP B5
EDP_BKLENA9
GPIO53L4
GPIO51R5
GPIO54L3
GPIO52L1
GPIO55U7
PME#AD4
PIRQD#/GPIO80N2
PIRQC#/GPIO79N4
DDPB_CTRLCLK B9
DDPB_CTRLDATA C9
DDPC_CTRLCLK D9
DDPC_CTRLDATA D11
DDPB_HPD C8
EDP_HPD D6
DDPC_HPD A8
DDPB_AUXN C5
EDP_VDDENC6
EDP_BKLCTLB8
PIRQA#/GPIO77U6
PIRQB#/GPIO78P4
HSW_ULT_DDR3L
eDP SIDEBAND
PCIE
DISPLAY
9 OF 19CPU1I
HASWELL-6-GP
HSW_ULT_DDR3L
eDP SIDEBAND
PCIE
DISPLAY
9 OF 19CPU1I
HASWELL-6-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_PTX_WLANRX_P3
PCIE_PTX_WLANRX_N3
PCIE_RCOMP
USB_COMP
USB_OC#2_3
USB_OC#6_7
USB_OC#4_5
USB_OC#0_1
USB_OC#2_3
USB_OC#4_5
USB_OC#0_1
PCIE_PTX_LANRX_P4
PCIE_PTX_LANRX_N4
USB_OC#6_7
USB_PN7
USB_PP7
dGPU_RXN_CPU_TXN1
dGPU_RXP_CPU_TXP3
dGPU_RXN_CPU_TXN0
dGPU_RXP_CPU_TXP1
dGPU_RXP_CPU_TXP2
dGPU_RXN_CPU_TXN3
dGPU_RXN_CPU_TXN2
dGPU_RXP_CPU_TXP0
+V1.05S_AUSB3PLL
3D3V_S5_PCH
PCIE_PRX_WLANTX_N3[58]
PCIE_PRX_WLANTX_P3[58]
PCIE_PTX_WLANRX_N3_C[58]
PCIE_PTX_WLANRX_P3_C[58]
USB_PN0 [34]
USB3_PRX_CTX_N0 [34]
USB3_PTX_CRX_P0 [34]
USB_OC#0_1 [35]
USB_PP0 [34]
USB_PP1 [35]
USB_PN1 [35]
USB_PN4 [52]
USB_PP4 [52]
USB_PN5 [58]
USB_PP5 [58]
USB_PN6 [52]
USB_PP6 [52]
USB3_PRX_CTX_P0 [34]
USB3_PTX_CRX_N0 [34]
USB3_PTX_CRX_N1 [34]
USB3_PRX_CTX_N1 [34]
USB3_PTX_CRX_P1 [34]
USB3_PRX_CTX_P1 [34]
USB_PP2 [63]
USB_PN2 [63]
USB3_PTX_DRX_N2[63]
USB3_PRX_DTX_N2[63]
USB3_PTX_DRX_P2[63]
USB3_PRX_DTX_P2[63]
USB_OC#2_3 [35]
PCIE_PRX_LANTX_N4[30]
PCIE_PRX_LANTX_P4[30]
PCIE_PTX_LANRX_N4_C[30]
PCIE_PTX_LANRX_P4_C[30]
USB3_PRX_DTX_N3[63]
USB3_PTX_DRX_P3[63]
USB3_PRX_DTX_P3[63]
USB3_PTX_DRX_N3[63]
USB_PP3 [63]
USB_PN3 [63]
CPU_RXP_C_dGPU_TXP0[73]
CPU_RXN_C_dGPU_TXN0[73]
dGPU_RXP_C_CPU_TXP0[73]
dGPU_RXN_C_CPU_TXN0[73]
CPU_RXP_C_dGPU_TXP1[73]
CPU_RXN_C_dGPU_TXN1[73]
dGPU_RXP_C_CPU_TXP1[73]
dGPU_RXN_C_CPU_TXN1[73]
CPU_RXP_C_dGPU_TXP2[73]
CPU_RXN_C_dGPU_TXN2[73]
dGPU_RXP_C_CPU_TXP2[73]
dGPU_RXN_C_CPU_TXN2[73]
CPU_RXP_C_dGPU_TXP3[73]
CPU_RXN_C_dGPU_TXN3[73]
dGPU_RXP_C_CPU_TXP3[73]
dGPU_RXN_C_CPU_TXN3[73]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (PCIE/USB)
A3
16 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1,Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (PCIE/USB)
A3
16 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (PCIE/USB)
A3
16 101Friday, June 28, 2013
<Core Design>
SSID = CPU
USB 2.0 Table
WLAN
0
Pair
4
5
2
3
1
Device
6
7
CAMERA
USB3.0 port1
(with Power Share)
USB3.0 Port2
Touch Panel
1. USB_COMP using 50 ohm
 single-ended impedance
2. Isolation Spacing :15mil
3. Total trace length<500mil
Layout Note:
1. PCIE_RCOMP/ PCIE_IREF trace width=12~15mil
2. Isolation Spacing: 12mil
3. Total trace length<500mil
Layout Note:
USB3.0 Port3
WLAN
LAN+Card reader
USB3.0 Port4
N/A
PCIE Table
Port
4
2
3
1
Device
6(4lane)
WLAN
LAN+
Card reader
N/A
Share BUS
USB3.0_3
USB3.0_4
N/A
N/A
SATA0~3
5(4lane) GPU
1 2
C1602
SCD1U10V2KX-5GP
C1602
SCD1U10V2KX-5GP
1 2C1601
SCD1U10V2KX-5GP
C1601
SCD1U10V2KX-5GP
1 2
C1609
SCD1U10V2KX-5GP
OPS
C1609
SCD1U10V2KX-5GP
OPS
1 2C1610
SCD1U10V2KX-5GP
OPSC1610
SCD1U10V2KX-5GP
OPS
1 TP1602TP1602
1 2
C1607
SCD1U10V2KX-5GP
OPS
C1607
SCD1U10V2KX-5GP
OPS
RSVD#AM10 AM10
RSVD#AN10 AN10
USB2P1 AT7
USB2P0 AM8
PERN3G11
PETN5_L0C23
USBRBIAS# AJ10
USBRBIAS AJ11
PETN5_L1B23
PETP5_L1A23
USB2N7 AR13
USB2P7 AP13
USB2N6 AP11
USB2P5 AN13
USB2N5 AM13
USB2P6 AN11
USB2P4 AL15
USB2N4 AM15
USB2P3 AT10
USB2N3 AR10
USB2P2 AP8
USB2N2 AR8
USB2N1 AR7
USB2N0 AN8
PETP4A29
PERP4G13
PERN5_L3E6
PERP5_L3F6
PETN5_L2B21
PERP5_L2G10
PERN5_L2H10
OC0/GPIO40# AL3
OC1/GPIO41# AT1
OC2/GPIO42# AH2
OC3/GPIO43# AV3
PETN3C29
PERP3F11
PERN5_L1F8
PETN5_L3B22
PETP5_L3A21
PERP5_L1E8
PETN4B29
PETP5_L0C22
PERP5_L0E10
PERN5_L0F10
PERN4F13
PETP3B30
PCIE_IREFB27
PCIE_RCOMPA27
RSVD#E13E13
PETP5_L2C21
PERP1/USB3RP3F17
PERN1/USB3RN3G17
RSVD#E15E15
PETP1/USB3TP3C31
PETN1/USB3TN3C30
PERN2/USB3RN4F15
PETP2/USB3TP4A31
PETN2/USB3TN4B31
PERP2/USB3RP4G15
USB3RN1 G20
USB3RP1 H20
USB3TN1 C33
USB3TP1 B34
USB3RN2 E18
USB3RP2 F18
USB3TN2 B33
USB3TP2 A33
HSW_ULT_DDR3L
PCIE USB
11 OF 19CPU1K
HASWELL-6-GP
HSW_ULT_DDR3L
PCIE USB
11 OF 19CPU1K
HASWELL-6-GP
1 2
C1604
SCD1U10V2KX-5GP
C1604
SCD1U10V2KX-5GP
1 2C1606
SCD1U10V2KX-5GP
OPSC1606
SCD1U10V2KX-5GP
OPS
1 2C1608
SCD1U10V2KX-5GP
OPSC1608
SCD1U10V2KX-5GP
OPS
1 2
C1611
SCD1U10V2KX-5GP
OPS
C1611
SCD1U10V2KX-5GP
OPS
1 2C1603
SCD1U10V2KX-5GP
C1603
SCD1U10V2KX-5GP
1 2
C1605
SCD1U10V2KX-5GP
OPS
C1605
SCD1U10V2KX-5GP
OPS
1 2
R1602
22D6R2F-L1-GP
R1602
22D6R2F-L1-GP
1 2C1612
SCD1U10V2KX-5GP
OPSC1612
SCD1U10V2KX-5GP
OPS
1
2
3
4 5
6
7
8
RN1601
SRN10KJ-6-GP
RN1601
SRN10KJ-6-GP
1 2
R1601
3KR2F-GP
R1601
3KR2F-GP
1 TP1601TP1601
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_SUSACK#_R
XDP_DBRESET#
SYS_PWROK
SYS_PWROK
PM_PCH_PWROK
PCI_PLTRST#
PCI_PLTRST#
PM_RSMRST#
PCH_DPWROK PM_RSMRST#
PM_PWRBTN#
AC_PRESENT
BATLOW#
BATLOW#
PCH_SLP_S0#
PCH_SLP_WLAN#
DSWODVREN
PCH_WAKE#
PM_SLP_LAN#
PM_SLP_A#
PM_SLP_SUS#
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
SUS_CLK
PM_SUS_STAT#
PM_CLKRUN#
PCH_SUSCLK_KBC
PM_PCH_PWROK
DSWODVREN
MPWROK
PM_SUS_STAT#
PCH_DPWROK
3V_5V_POK# 3V_5V_POK_C
PM_RSMRST#
PM_SLP_SUS#
PM_SUSWARN#_R
PM_SUSACK#_R
AC_PRESENT
PM_SUSWARN#_R
PM_RSMRST#
XDP_DBRESET#
PM_CLKRUN#
PM_SUSWARN#
3D3V_S0
3D3V_S5
RTC_AUX_S5
3D3V_S5_PCH
3D3V_AUX_S5
3D3V_S5
SYS_PWROK[24,96]
PCH_PWROK[24,26,36]
PLT_RST#[24,30,58,65,73]
PM_PWRBTN#[24,96]
AC_PRESENT[24,76]
PM_SLP_S4# [24,49]
PM_SLP_S3# [24,36,48,49,51]
PCH_SUSCLK_KBC [24]
PM_CLKRUN#_EC [24]
PCH_SLP_S0#[48] PM_SLP_SUS# [24,38]
KBC_DPWROK [24]
RSMRST#_KBC [24]
3V_5V_POK [45]
PM_SUSWARN#[24]
PM_SUSACK#[24]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (PM)
A3
17 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (PM)
A3
17 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (PM)
A3
17 101Friday, June 28, 2013
<Core Design>
SSID = CPU
DSWODVREN
Low = Disable
High = Enable (default)
On Die DSW VR Enable
*
PCH strap pin:
0311 PCH WAKE# pin PH 1K
A00 0618
A00 0618
A00 0618
A00 0618
1
2
EC1701
SC4D7P50V2CN-1GP DY
EC1701
SC4D7P50V2CN-1GP DY
1
2 3
4
RN1701
SRN10KJ-5-GP
RN1701
SRN10KJ-5-GP
1
2
R1725
100KR2F-L1-GP DS3
R1725
100KR2F-L1-GP DS3
1 2
R1727 10KR2J-3-GPR1727 10KR2J-3-GP
1 2R1706 0R0402-PAD-2-GPR1706 0R0402-PAD-2-GP
1
2
R1726
10KR2J-3-GP
R1726
10KR2J-3-GP
1
2 3
4
RN1704
SRN8K2J-3-GP
RN1704
SRN8K2J-3-GP
1 TP1702TP1702
1 2R1728
0R2J-2-GP
NON DS3
R1728
0R2J-2-GP
NON DS3
1 2R1707
0R0402-PAD-2-GP
R1707
0R0402-PAD-2-GP
1 2
R1702
1KR2J-1-GP
R1702
1KR2J-1-GP
1 2
R1729
0R0402-PAD-2-GP
R1729
0R0402-PAD-2-GP
1 TP1707TP17071
TP1705TP1705
1
2 3
4
RN1703
SRN10KJ-5-GP
RN1703
SRN10KJ-5-GP
1 2
R1713
0R0402-PAD-2-GP
R1713
0R0402-PAD-2-GP
1 TP1703TP1703
1
2
C1701
SC220P50V2KX-3GPDY
C1701
SC220P50V2KX-3GPDY
1 2
R1721
330KR2J-L1-GP
DY
R1721
330KR2J-L1-GP
DY
1 2
R1717 10KR2J-3-GPDYR1717 10KR2J-3-GPDY
1 2
R1720
330KR2J-L1-GP
R1720
330KR2J-L1-GP
1
2
R1715
100KR2J-1-GP DY
R1715
100KR2J-1-GP DY
1
2 3
4
R
N
0R4P2R-PAD
RN1702
R
N
0R4P2R-PAD
RN1702
1
2
34
5
6
Q1701
2N7002KDW-GP
Q1701
2N7002KDW-GP
1 2R1703 1KR2J-1-GPR1703 1KR2J-1-GP
1 2
R1724 10KR2J-3-GPDYR1724 10KR2J-3-GPDY
1 2R1710
0R0402-PAD-2-GP
R1710
0R0402-PAD-2-GP
SLP_A# AL5
SLP_SUS# AP4
SLP_LAN# AJ7
SLP_S3# AT4
SLP_S5#/GPIO63 AP5
SLP_S4# AJ6
SUSCLK/GPIO62 AE6
CLKRUN#/GPIO32 V5
SUS_STAT#/GPIO61 AG4
WAKE# AJ5
DSWVRMEN AW7
DPWROK AV5
SLP_WLAN#/GPIO29AM5
SLP_S0#AF3
SUSWARN#/SUSPWRDNACK#/GPIO30AV4
PWRBTN#AL7
BATLOW#/GPIO72AN4
ACPRESENT/GPIO31AJ8
RSMRST#AW6
PCH_PWROKAY7
SUSACK#AK2
PLTRST#AG7
APWROKAB5
SYS_PWROKAG2
SYS_RESET#AC3
HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT
8 OF 19CPU1H
HASWELL-6-GP
HSW_ULT_DDR3L
SYSTEM POWER MANAGEMENT
8 OF 19CPU1H
HASWELL-6-GP
1 2
R1704
0R2J-2-GP
NON DS3
R1704
0R2J-2-GP
NON DS3
1 2R1718
0R0402-PAD-2-GP
R1718
0R0402-PAD-2-GP
1 2
R1708
100KR2J-1-GP
NON DS3
R1708
100KR2J-1-GP
NON DS3
1 2R1709
0R0402-PAD-2-GP
R1709
0R0402-PAD-2-GP
1 TP1704TP1704
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCIE_REQ#
CLK_PCIE_REQ#
CLK_PCIE_REQ#
XTAL24_OUT
XTAL24_IN
XTAL24_IN
XTAL24_OUT
MCP_TESTLOW1
MCP_TESTLOW2
MCP_TESTLOW3
MCP_TESTLOW4
XCLK_BIASREF
CLK_PCI_KBC_R
CLK_PCI_LPC_R
LPC_AD[3..0]
LPC_AD0
LPC_AD3
LPC_LAD0_PCH
LPC_LAD3_PCH
LPC_LFRAME#_PCH
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_CS0#
PCH_SPI_SO
TP_CL_CLK
TP_CL_DATA
TP_CL_RST#
MCP_GPIO73
CARD_PWR_EN
SMB_DATA
SML0_CLK
SMB_CLK
SML0_DATA
MCP_GPIO11
SML0_DATA
SML0_CLK
SML1_DATA
SML1_CLK
SMB_DATA
SMB_CLK
MCP_GPIO11
XTAL24_IN_R
PCH_SPI_DQ2
PCH_SPI_DQ3
PCH_SPI_DQ3
PCH_SPI_DQ2
LPC_LAD1_PCH
LPC_LAD2_PCH
LPC_AD1
LPC_AD2
CLK_PCIE_WLAN_REQ3#
MCP_GPIO73
CARD_PWR_EN
SML1_CLK
SML1_DATA
CLK_PCIE_LAN_REQ4#
PEG_CLKREQ#
SMB_CLK
SMB_DATA
CLK_PCIE_REQ#
3D3V_S0
3D3V_S5_PCH
3D3V_S0
+V1.05S_AXCK_LCPLL
3D3V_S5
3D3V_S0
3D3V_S5_PCH
CLK_PCI_LPC [65]
CLK_PCI_KBC [24]
LPC_AD[3..0][24,65]
LPC_FRAME#[24,65]
SPI_CS0#_R[24,25]
SPI_SO_R[24,25]
SPI_SI_R[24,25]
SPI_CLK_R[24,25]
PCH_SMBDATA [12,13,58,62,67]
PCH_SMBCLK [12,13,58,62,67]
PCIE_CLK_XDP_N [96]
PCIE_CLK_XDP_P [96]
SPI_WP#[25]
SPI_HOLD#[25]
SML0_CLK [53]
SML0_DATA [53]
SML1_CLK [24,26,76]
SML1_DATA [24,26,76]
PEG_CLKREQ#[73]
CLK_PCIE_LAN_REQ4#[30]
CLK_PCIE_WLAN_REQ3#[58]
CLK_PCIE_WLAN_N3[58]
CLK_PCIE_WLAN_P3[58]
CLK_PCIE_LAN_N4[30]
CLK_PCIE_LAN_P4[30]
CLK_PCIE_VGA#[73]
CLK_PCIE_VGA[73]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, HsinTai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (CLK/SMB/LPC/SPI)
A3
18 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (CLK/SMB/LPC/SPI)
A3
18 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (CLK/SMB/LPC/SPI)
A3
18 101Friday, June 28, 2013
<Core Design>
SSID = CPU
WLAN
LAN/
Card reader
GPU
X01 0321
X01 0321
A00 0618
A00 0618
1 2R18070R0402-PAD-2-GP R18070R0402-PAD-2-GP
1 2
C1802
SC15P50V2JN-2-GP
C1802
SC15P50V2JN-2-GP
1 2R1805
0R0402-PAD-2-GP
R1805
0R0402-PAD-2-GP
1
2
3
4 5
6
7
8
RN1807
SRN2K2J-4-GP
RN1807
SRN2K2J-4-GP
1
2
3
4 5
6
7
8
RN1809
SRN10KJ-6-GP
RN1809
SRN10KJ-6-GP
1 2R1810
0R0402-PAD-2-GP
R1810
0R0402-PAD-2-GP
1 2R18010R0402-PAD-2-GP R18010R0402-PAD-2-GP
4
1 2
3
X1801
XTAL-24MHZ-86-GP
82.30004.891
X1801
XTAL-24MHZ-86-GP
82.30004.891
1 2
C1801
SC15P50V2JN-2-GP
C1801
SC15P50V2JN-2-GP
1 TP1805TP1805
CLKOUT_PCIE_N1B41
CLKOUT_PCIE_P1A41
PCIECLKRQ1#/GPIO19Y5
PCIECLKRQ0#/GPIO18U2
CLKOUT_PCIE_P0C42
CLKOUT_ITPXDP# B35
CLKOUT_LPC_0 AN15
CLKOUT_LPC_1 AP15
PCIECLKRQ4#/GPIO22U5
CLKOUT_PCIE_P4B39
CLKOUT_PCIE_N4A39
PCIECLKRQ3#/GPIO21N1
CLKOUT_PCIE_N0C43
XTAL24_OUT B25
XTAL24_IN A25
PCIECLKRQ5#/GPIO23T2
CLKOUT_PCIE_P5A37
CLKOUT_PCIE_N5B37
CLKOUT_PCIE_P3C37
CLKOUT_PCIE_N3B38
PCIECLKRQ2#/GPIO20AD1
CLKOUT_PCIE_N2C41
CLKOUT_PCIE_P2B42
DIFFCLK_BIASREF C26
RSVD#K21 K21
RSVD#M21 M21
TESTLOW_C35 C35
TESTLOW_C34 C34
TESTLOW_AK8 AK8
TESTLOW_AL8 AL8
CLKOUT_ITPXDP_P A35
CLOCK
SIGNALS
HSW_ULT_DDR3L 6 OF 19CPU1F
HASWELL-6-GP
CLOCK
SIGNALS
HSW_ULT_DDR3L 6 OF 19CPU1F
HASWELL-6-GP
CL_RST# AF4
CL_DATA AD2
CL_CLK AF2
SML1CLK/GPIO75 AU3
SML1DATA/GPIO74 AH3
SML1ALERT#/PCHHOT#/GPIO73 AU4
SML0DATA AK1
SML0CLK AN1
SMBDATA AH1
SML0ALERT#/GPIO60 AL2
SMBCLK AP2
SMBALERT#/GPIO11 AN2
SPI_IO3AF1
SPI_IO2Y6
SPI_MISOAA4
SPI_MOSIAA2
SPI_CS2#AC2
SPI_CS1#Y4
SPI_CLKAA3
SPI_CS0#Y7
LFRAME#AV12
LAD3AW11
LAD2AY12
LAD1AW12
LAD0AU14
HSW_ULT_DDR3L
LPC
SMBUS
C-LINKSPI
7 OF 19CPU1G
HASWELL-6-GP
HSW_ULT_DDR3L
LPC
SMBUS
C-LINKSPI
7 OF 19CPU1G
HASWELL-6-GP
1
2 3
4
RN1804
SRN2K2J-1-GP
RN1804
SRN2K2J-1-GP
1 2R18120R0402-PAD-2-GP R18120R0402-PAD-2-GP
1
2
R1802
1M1R2J-GP
R1802
1M1R2J-GP
1
2
E
C
1
8
0
1
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
E
C
1
8
0
1
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
1 2R18110R0402-PAD-2-GP R18110R0402-PAD-2-GP
1
2
34
5
6
Q1801
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
Q1801
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
1
2
3
45
6
7
8
RN
0R8P4R-PAD-1-GP
RN1806
RN
0R8P4R-PAD-1-GP
RN1806
1 2 R180633R2J-2-GP R180633R2J-2-GP
1
2 3
4
RN1808
SRN10KJ-5-GP
RN1808
SRN10KJ-5-GP
1 2R18090R0402-PAD-2-GP R18090R0402-PAD-2-GP
1 2R18080R0402-PAD-2-GP R18080R0402-PAD-2-GP
1 2R1803
3KR2F-GP
R1803
3KR2F-GP
1
2
3
4 5
6
7
8
RN1801
SRN10KJ-6-GP
RN1801
SRN10KJ-6-GP
1 2R1804 0R2J-2-GPLPCR1804 0R2J-2-GPLPC
1
2 3
4
RN1803
SRN10KJ-5-GP
RN1803
SRN10KJ-5-GP
1 TP1803TP1803
1
2
E
C
1
8
0
2
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
E
C
1
8
0
2
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
1 2
34
RN1802
SRN1KJ-11-GP-U
RN1802
SRN1KJ-11-GP-U
1
2 3
4
RN1805
SRN2K2J-1-GP
RN1805
SRN2K2J-1-GP
1 TP1804TP1804
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTC_X1
RTC_X2
SM_INTRUDER#
PCH_INTVRMEN
RTC_RST#
SRTC_RST#
HDA_BITCLK
HDA_SYNC
HDA_RST#
HDA_SDIN0
HDA_SDOUT
PCH_INTVRMEN
TP_HDA_DOCK_EN#
PCH_JTAG_TRST#
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
XDP_TCK_JTAGX
XDP_TCK_JTAGX
SATA_IREF
SATA_RCOMP
RTC_X2
RTC_X1
HDA_BITCLK
PCH_JTAG_TCK
HDA_SDOUT
EC_SMI#
EC_SMI#
MSATA_DET#
MCP_GPIO35
SATA_ODD_PRSNT#
MCP_GPIO35
SATA_ODD_PRSNT#
HDA_SYNC
HDA_RST#
SATA_LED#
RTC_AUX_S5
1D05S_VCCST
+V1.05S_ASATA3PLL
3D3V_S0
RTC_AUX_S5
RTCRST_ON[24]
ME_UNLOCK[24]
HDA_CODEC_BITCLK[27]
HDA_CODEC_SDOUT[27]
EC_SMI# [24]
SATA3_PRX_DTX_N0 [56]
SATA3_PRX_DTX_P0 [56]
SATA3_PTX_DRX_N0 [56]
SATA3_PTX_DRX_P0 [56]
HDA_CODEC_SYNC[27]
HDA_CODEC_RST#[27,29]
HDA_SDIN0[27]
MSATA_DET# [63]
SATA_LED# [61]
SATA3_PRX_DTX_P1 [63]
SATA3_PRX_DTX_N1 [63]
SATA3_PTX_DRX_N1 [63]
SATA3_PTX_DRX_P1 [63]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (RTC/SATA/HDA/JTAG)
A3
19 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (RTC/SATA/HDA/JTAG)
A3
19 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (RTC/SATA/HDA/JTAG)
A3
19 101Friday, June 28, 2013
<Core Design>
HDA_SDOUT
Low = Default
High = Enable
Flash Descriptor Security Overide/
Intel ME Debug Mode
*
*
Low = External VRs
High = Internal VRsINTVRMEN
Integrated SUS 1V VRM Enable
SSID = CPU
HDD1
4mil trace at break-out and 3
12-15mil trace with <0.2 ohms 
and length total <= 500mils.
Layout Note:
The internal pull-down is disabled after 
PLTRST# deasserts
mSATA
X02 0502 change C1903 C1904 from 18pF to 15 pF 
1
2
C1903S
C
1
5
P
5
0
V
2
J
N
-2
-G
P
C1903S
C
1
5
P
5
0
V
2
J
N
-2
-G
P
1 2R1908 0R0402-PAD-2-GPR1908 0R0402-PAD-2-GP
12
R1918 51R2J-2-GPDYR1918 51R2J-2-GPDY
12
R1917 51R2J-2-GPDYR1917 51R2J-2-GPDY
1
2
C1904S
C
1
5
P
5
0
V
2
J
N
-2
-G
P
C1904S
C
1
5
P
5
0
V
2
J
N
-2
-G
P
RSVD#L11 L11
RSVD#K10 K10
PCH_TMSAD62
PCH_TDOAE61
PCH_TDIAD61
PCH_TCKAE62
PCH_TRST#AU62
HDA_DOCK_RST#/I2S1_SFRM#AV10
HDA_DOCK_EN#/I2S1_TXD#AW10
HDA_SDI1/I2S1_RXDAU12
HDA_SDO/I2S0_TXDAU11
HDA_SDI0/I2S0_RXDAY10
HDA_RST#/I2S_MCLK#AU8
HDA_SYNC/I2S0_SFRMAV11
HDA_BCLK/I2S0_SCLKAW8
RSVD#AC4AC4
RSVD#AL11AL11
RSVD#AV2AV2
I2S1_SCLKAY8
SATALED# U3
JTAGXAE63
RTCX2AY5
SATA_RCOMP C12
SATA_IREF A12
SATA3GP/GPIO37 AC1
SATA2GP/GPIO36 V6
SATA1GP/GPIO35 U1
SATA0GP/GPIO34 V1
SATA_TP3/PETP6_L0 D17
SATA_TN3/PETN6_L0 C17
SATA_RP3/PERP6_L0 E5
SATA_RN3/PERN6_L0 F5
SATA_TP2/PETP6_L1 C15
SATA_TN2/PETN6_L1 B14
SATA_RN2/PERN6_L1 J6
SATA_RP2/PERP6_L1 H6
SATA_TP1/PETP6_L2 B17
SATA_TN1/PETN6_L2 A17
SATA_RN1/PERN6_L2 J8
SATA_RP1/PERP6_L2 H8
SATA_TP0/PETP6_L3 A15
SATA_TN0/PETN6_L3 B15
SATA_RP0/PERP6_L3 H5
SATA_RN0/PERN6_L3 J5
RTCX1AW5
RTCRST#AU7
SRTCRST#AV6
INTVRMENAV7
INTRUDER#AU6
HSW_ULT_DDR3L
JTAG
RTC
AUDIO SATA
5 OF 19CPU1E
HASWELL-6-GP
HSW_ULT_DDR3L
JTAG
RTC
AUDIO SATA
5 OF 19CPU1E
HASWELL-6-GP
1 2
R1909 1KR2J-1-GPR1909 1KR2J-1-GP
1
2
R1902
10KR2J-3-GP
R1902
10KR2J-3-GP
1 2R1904
0R0402-PAD-2-GP
R1904
0R0402-PAD-2-GP
12
R1916 51R2J-2-GP
DY
R1916 51R2J-2-GP
DY
41
2 3
X1901
X-32D768KHZ-65-GP
82.30001.A41
2nd = 82.30001.841
X1901
X-32D768KHZ-65-GP
82.30001.A41
2nd = 82.30001.841
G
S
D
Q1901
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
Q1901
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
1 2R1907 33R2J-2-GPR1907 33R2J-2-GP
1
2
C1901S
C
1
U
6
D
3
V
2
K
X
-G
P
C1901S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
R1903
330KR2J-L1-GP
R1903
330KR2J-L1-GP
12
R1919 1KR2J-1-GPDYR1919 1KR2J-1-GPDY
1 2R1905 0R0402-PAD-2-GPR1905 0R0402-PAD-2-GP
1 2
R1906
3KR2F-GP
R1906
3KR2F-GP
2
1
G1901
G
A
P
-O
P
E
N
G1901
G
A
P
-O
P
E
N
1
2
3
4 5
6
7
8
RN1902
SRN10KJ-6-GP
RN1902
SRN10KJ-6-GP
1 2R1910 0R0402-PAD-2-GPR1910 0R0402-PAD-2-GP
1 2
R1920 51R2J-2-GPDYR1920 51R2J-2-GPDY
1
TP1902TP1902
1 2
R1913
330KR2J-L1-GP
DY
R1913
330KR2J-L1-GP
DY
1 2
R1915 10MR2J-L-GPR1915 10MR2J-L-GP
1 2
34
RN1901
SRN20KJ-1-GPRN1901
SRN20KJ-1-GP
1TP1901TP1901
1
2
R1901
1M1R2J-GP
R1901
1M1R2J-GP
1
2
C1902
SC1U6D3V2KX-GP
C1902
SC1U6D3V2KX-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTC_DET#
EC_SCI#
BOARD_ID2
INT_SERIRQ
H_RCIN#
PCH_THERMTRIP
PCH_OPIRCOMP
LPSS_GSPI0_MOSI_BBS0_R
BOARD_ID1
WLAN_PLT_RST#
LPSS_SDIO_D0_CMNHDR
LPSS_GSPI0_MOSI_BBS0_R
SATA_ODD_PWRGT
HSIOPC
MCP_GPIO58
MCP_GPIO57
MCP_GPIO56
DRAM_SEL3
DRAM_SEL1
MCP_GPIO26
MCP_GPIO27
MCP_GPIO28
MCP_GPIO15
MCP_GPIO14
MCP_GPIO13
MCP_GPIO12
EC_SWI#
MCP_GPIO8
I2C0_SCL
I2C0_SDA
I2C0_SDA
MCP_GPIO12
MCP_GPIO15
HDA_SPKR
LPSS_SDIO_D0_CMNHDR
CAMERA_PWR_EN
FFS_INT2
DRAM_SEL1
MCP_GPIO27
MCP_GPIO56
I2C1_SDA
MCP_GPIO8
MCP_GPIO13
DRAM_SEL3
MCP_GPIO57
MCP_GPIO28
MCP_GPIO14
RTC_DET#
DRAM_SEL0
DRAM_SEL2
SATA_ODD_DA#
DRAM_SEL0
DRAM_SEL2
MCP_GPIO26
WLAN_PLT_RST#
MCP_GPIO16
HDD_DEVSLP
MSATA_DEVSLP
MCP_GPIO50
MCP_GPIO65
MCP_GPIO67
MCP_GPIO68
MCP_GPIO69
MCP_GPIO70
MCP_GPIO83
MCP_GPIO84
MCP_GPIO87
MCP_GPIO88
TOUCH_PWR_EN
MCP_GPIO93
MCP_GPIO94
MCP_GPIO0
MCP_GPIO1
MCP_GPIO2
BOARD_ID2
MCP_GPIO58
MCP_GPIO_PH
KB_DET#
H_RCIN#
DBC_EN
INT_SERIRQ
BLUETOOTH_EN
SATA_ODD_DA#
FFS_INT2
BOARD_ID1 I2C0_SCL
I2C1_SCL
COLOR_ENGINE
I2C1_SCL
I2C1_SDA
EC_SWI#
EC_SCI#
MCP_GPIO39
3D3V_S0
1D05S_VCCST
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5
3D3V_S5_PCH
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5_PCH
3D3V_S5_PCH
3D3V_S0
3D3V_S0
RTC_DET#[25]
EC_SCI#[24]
INT_SERIRQ [24]
H_RCIN# [24]
HDA_SPKR[27]
BLUETOOTH_EN [58]
DBC_EN [52]
KB_DET# [62]
EC_SWI#[24]
HSIOPC[21]
KB_LED_BL_DET [62]
HDD_DEVSLP[56]
FFS_INT2[67]
COLOR_ENGINE [52]
MSATA_DEVSLP[63]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (GPIO)
A3
20 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (GPIO)
A3
20 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (GPIO)
A3
20 101Friday, June 28, 2013
<Core Design>
SSID = CPU
0
1
BOARD_ID2BOARD_ID1
1
0 0
0
1
1
Layout Note:
1.Referenced "continuous" VSS plane only.
2.Avoid routing next to clock pins or noisy 
 signals.
3. Trace width: 12~15mil
4. Isolation Spacing: 12mil
5. Max length: 500mil
Boot BIOS 
Destination
Low = SPI
High = LPC
Boot BIOS Strap Bit BBS
*
The internal pull-down is disabled after 
PLTRST# deasserts
GPIO15
Low = Disable Intel ME Crypto TLS
High = Enable Intel ME Crypto TLS
TLS Confidentiality
*
The internal pull-down is disabled after
 RSMRST# deasserts.
BIOS strap pin:
PX(AMD)
DIS
UMA
Optimus(NV)
BIOS UMA/DIS Strap pin
The internal pull-down is disabled after 
PLTRST# deasserts
High = Enable "Top-Block swap" 
 mode (Default)
Low = Disable "Top-Block swap" mode
Top-Block Swap Override mode
SDIO_D0
 / GPIO66 
HDA_SPKR
Low = Disable (Default)
High = Enable
NO REBOOT
*
PCH strap pin:
The internal pull-down is disabled after 
PLTRST# deasserts
*
GPIO[47:44]=[1,1,1,1] for SODIMM configuration
A00 0618
1 2R20230R0402-PAD-2-GP R20230R0402-PAD-2-GP
1 2R20170R0402-PAD-2-GP R20170R0402-PAD-2-GP
1 2R20020R0402-PAD-2-GP R20020R0402-PAD-2-GP
1
2
R2012
1KR2J-1-GP
DY R2012
1KR2J-1-GP
DY
1 TP2013TP2013
1 TP2014TP2014
1TP2009TP2009
1 2
R2006
1KR2J-1-GP
DY
R2006
1KR2J-1-GP
DY
1
2 3
4
RN2006
SRN10KJ-5-GP
RN2006
SRN10KJ-5-GP
1 TP2006TP2006
1 2R20190R0402-PAD-2-GP R20190R0402-PAD-2-GP
1
2
R2011
1KR2J-1-GP
DY R2011
1KR2J-1-GP
DY
1 2R20040R0402-PAD-2-GP R20040R0402-PAD-2-GP
1
2
3
4 5
6
7
8
RN2014
SRN10KJ-6-GP
RN2014
SRN10KJ-6-GP
1TP2004TP2004
1
2
R2008
10KR2J-3-GPUMA
R2008
10KR2J-3-GPUMA
1 TP2011TP2011
1 2R20200R0402-PAD-2-GP R20200R0402-PAD-2-GP
1
2
3
4 5
6
7
8
RN2012
SRN10KJ-6-GP
RN2012
SRN10KJ-6-GP
1 2R20070R0402-PAD-2-GP R20070R0402-PAD-2-GP
1 TP2021TP2021
1TP2002TP2002
1 TP2018TP2018
1 TP2010TP2010
1 2
R2024
100KR2J-1-GP
R2024
100KR2J-1-GP
1 2R2010
10KR2J-3-GPDY
R2010
10KR2J-3-GPDY
1 2R20210R0402-PAD-2-GP R20210R0402-PAD-2-GP
1 TP2008TP2008
1 2R20150R0402-PAD-2-GP R20150R0402-PAD-2-GP
1
2
R2018
1KR2J-1-GP
R2018
1KR2J-1-GP
1 TP2016TP2016
1TP2003TP2003
1 TP2005TP2005
1TP2020TP2020
1 TP2012TP2012
1
2
R2005
10KR2J-3-GPOPS
R2005
10KR2J-3-GPOPS
1 2R20010R0402-PAD-2-GP R20010R0402-PAD-2-GP
1 2
R2003
49D9R2F-GP
R2003
49D9R2F-GP
1
2
R2014
1KR2J-1-GP
DY R2014
1KR2J-1-GP
DY
1
2
3
4 5
6
7
8
RN2005
SRN10KJ-6-GP
RN2005
SRN10KJ-6-GP
1 2R20220R0402-PAD-2-GP R20220R0402-PAD-2-GP
1 2R20160R0402-PAD-2-GP R20160R0402-PAD-2-GP
1 2R2009
10KR2J-3-GP
DYR2009
10KR2J-3-GP
DY
RSVD#AB21 AB21
RSVD#AF20 AF20
SERIRQ T4LAN_PHY_PWR_CTRL/GPIO12AM7
GPIO58AL4
GPIO44AK4
BMBUSY#/GPIO76P1
GPIO8AU2
GPIO15AD6
GPIO17T3
GPIO16Y1
GPIO59AT5
GPIO48U4
GPIO47AB6
GPIO49Y3
GPIO50P3
HSIOPC/GPIO71Y2
GPIO13AT3
GPIO25AM4
GPIO14AH4
GPIO46AG3
GPIO10AM2
GPIO9AM3
DEVSLP0/GPIO33P2
SDIO_POWER_EN/GPIO70C4
DEVSLP1/GPIO38L2
SPKR/GPIO81V2
DEVSLP2/GPIO39N5
THRMTRIP# D60
RCIN#/GPIO82 V4
GSPI0_CS#/GPIO83 R6
GSPI0_MISO/GPIO85 N6
GSPI0_CLK/GPIO84 L6
GSPI0_MOSI/GPIO86 L8
GSPI1_CS#/GPIO87 R7
GSPI1_CLK/GPIO88 L5
GSPI_MOSI/GPIO90 K2
GSPI1_MISO/GPIO89 N7
UART0_RXD/GPIO91 J1
UART0_RTS#/GPIO93 J2
UART0_TXD/GPIO92 K3
UART0_CTS#/GPIO94 G1
UART1_TXD/GPIO1 G2
UART1_RXD/GPIO0 K4
I2C0_SCL/GPIO5 F3
I2C1_SDA/GPIO6 G4
I2C1_SCL/GPIO7 F1
SDIO_CMD/GPIO65 F4
SDIO_CLK/GPIO64 E3
SDIO_D0/GPIO66 D3
SDIO_D3/GPIO69 E2
SDIO_D2/GPIO68 C3
SDIO_D1/GPIO67 E4
GPIO28AD7
GPIO57AP1
GPIO56AG6
GPIO45AG5
GPIO24AD5
GPIO27AN5
GPIO26AN3
UART1_RST#/GPIO2 J3
I2C0_SDA/GPIO4 F2
UART1_CTS#/GPIO3 J4
PCH_OPI_RCOMP AW15
HSW_ULT_DDR3L
SERIAL IO
GPIO
MISC
CPU/
10 OF 19CPU1J
HASWELL-6-GP
HSW_ULT_DDR3L
SERIAL IO
GPIO
MISC
CPU/
10 OF 19CPU1J
HASWELL-6-GP
1 TP2007TP2007
1 TP2015TP2015
1 TP2017TP2017
1
2
3
45
6
7
8
RN2007
SRN10KJ-6-GP
RN2007
SRN10KJ-6-GP
1 TP2019TP2019
1
2
R2013
10KR2J-3-GP
R2013
10KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V1.05A_VCCUSB3SUS
+VCCRTCEXT
+V3.3A_1.5A_HDA
+V1.05S_AIDLE
+PCH_VCCDSW PCH_VCCDSW_R
TP_V1.05S_AXCK_DCB
+V1.05A_AOSCSUS
+3.3A_DSW_PRTCSUS
TP_V1.05S_SSCF100
+V1.05DX_MODPHY_PCH
TP_VCCAPLLOPI_VAL
+V3.3S_PCORE
+V1.05A_USB2SUS
TP_V1.05S_SSCFF
TP_V1.05S_APLLOPI
+V1.05A_SUS_PCH
HSIOPC_R
HSIO_OUT
1D05V_S0
3D3V_S5
1D05V_S0
3D3V_S0
1D5V_S0
1D05V_S0
3D3V_S5_PCH
3D3V_S5
3D3V_S0
+V3.3A_1.5A_HDA3D3V_S5_PCH
3D3V_S0
1D05V_S0
1D05V_S0 1D05V_HSIO
1D05V_S0
+V3.3A_DSW_P
+V1.05S_SSCF100
+V1.05DX_MODPHY_PCH
+V1.05S_AUSB3PLL
+V1.05S_ASATA3PLL
+V1.05S_APLLOPI
+V3.3A_PSUS
+V3.3A_PSUS
+V1.05S_AXCK_DCB
+V1.05S_AXCK_LCPLL
+V1.05S_SSCFF
+V1.05S_SSCF100
+V1.05S_SSCFF
+V3.3A_DSW_P
+V3.3S_1.8S_LPSS_SDIO
+V3.3S_1.8S_LPSS_SDIO
+1.05M_ASW
RTC_AUX_S5
1D05V_S0
5V_S5
1D05V_S0
1D05V_HSIO
HSIOPC[20]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (POWER2)
Custom
21 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (POWER2)
Custom
21 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (POWER2)
Custom
21 101Friday, June 28, 2013
<Core Design>
SSID = CPU
X02 remove C2103
A00 0618
A00 0618
1 2
R2114
0R5J-5-GP
HSIO
R2114
0R5J-5-GP
HSIO
1 2R2102
0R0402-PAD-2-GP
R2102
0R0402-PAD-2-GP
1 2
R2101
0R0402-PAD-2-GP
R2101
0R0402-PAD-2-GP
VCCHDA
AH14
VCCTS1_5
J15
DCPSUS1#AD8
AD8
DCPSUS1#AD10
AD10
DCPSUSBYP#AG20
AG20
DCPSUSBYP#AG19
AG19
DCPSUS4AB8
VCCASW
AE9
VCCASW
AF9
VCCASW
AG8
VCCSUS3_3
AH11
VCCRTC
AG10
DCPRTC
AE7
VCCSPI
Y8
VCCASW
AG14
VCCASW
AG13
VCC3_3
K16
VCC3_3
K14
VCCSDIO
T9
VCCSDIO
U8
DCPSUS3
J13
VCCAPLL
W21
VCCHSIO
K9
VCCHSIO
L10
VCCHSIO
M9
VCCAPLL
AA21
RSVD#Y20
Y20
VCCSATA3PLL
B11
VCCUSB3PLL
B18
VCC1_05
N8
VCC1_05
P9
VCC1_05
J11
VCC1_05
H11
VCC1_05
H15
VCC1_05
AE8
VCC1_05
AF22
VCCSUS3_3
AE21
VCCSUS3_3
AE20
RSVD#V21
V21
RSVD#M20
M20
RSVD#K18
K18
VCCCLK
T21
VCCCLK
R21
VCCCLK
J17
VCCACLKPLL
A20
VCC3_3
W9
VCC3_3
V8
VCCDSW3_3
AH10
VCCSUS3_3
AC9
RSVD#AC20
AC20
VCCSUS3_3
AA9
DCPSUS2
AH13
VCC1_05
AG16
VCC1_05
AG17
VCCCLK
J18
VCCCLK
K19
USB2
THERMAL SENSOR
HSIO
HSW_ULT_DDR3L
USB3
OPI
RTC
GPIO/LPC
VRM
HDA
SERIAL IO
SUS OSCILLATOR
SPI
LPT LP POWER
CORE
13 OF 19CPU1M
HASWELL-6-GP
USB2
THERMAL SENSOR
HSIO
HSW_ULT_DDR3L
USB3
OPI
RTC
GPIO/LPC
VRM
HDA
SERIAL IO
SUS OSCILLATOR
SPI
LPT LP POWER
CORE
13 OF 19CPU1M
HASWELL-6-GP
1 TP2105TP2105
VDD
1
D#2
2
D#3
3
D#4
4
S#5
5
S#6
6
S#7
7
GND
8O
N
9
U2101
SLG59M1470VTR-GP
HSIO
74.59147.093
U2101
SLG59M1470VTR-GP
HSIO
74.59147.093
1 2
R2106
0R0402-PAD-2-GP
R2106
0R0402-PAD-2-GP
1
2
C2147
SCD1U10V2KX-5GP
C2147
SCD1U10V2KX-5GP
1TP2107TP2107
1
2
C
2
1
3
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
2
1
3
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
2
1
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
2
1
1
6
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C2123
SC10U6D3V3MX-GP
C2123
SC10U6D3V3MX-GP
1
2
C
2
1
0
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C
2
1
0
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1 2C2110
SCD1U10V2KX-5GP
C2110
SCD1U10V2KX-5GP
1 2
R2105
0R0402-PAD-2-GP
R2105
0R0402-PAD-2-GP
1
2
C
2
1
2
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
2
1
2
8
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 TP2106TP2106
1 2
R2122
0R5J-5-GP
Non-HSIO
R2122
0R5J-5-GP
Non-HSIO
1TP2102TP2102
1
2
C
2
1
3
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
2
1
3
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
TP2103TP2103
1 2
R2103
0R0402-PAD-2-GP
R2103
0R0402-PAD-2-GP
1 2
C2114
SC1U6D3V2KX-GP
C2114
SC1U6D3V2KX-GP
1 TP2109TP2109
1 2
R2123
0R2J-2-GP
HSIO
R2123
0R2J-2-GP
HSIO
1
TP2104TP2104
1
2
C2109
SC1U6D3V2KX-GP
C2109
SC1U6D3V2KX-GP
1
2
C2102
SC4D7U6D3V3KX-GP
HSIO C2102
SC4D7U6D3V3KX-GP
HSIO
1
2
C
2
1
3
7
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
2
1
3
7
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2
R2104
0R0402-PAD-2-GP
R2104
0R0402-PAD-2-GP
1
2
C
2
1
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
HSIO
C
2
1
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
HSIO
1
TP2101TP2101
1TP2108TP2108 1 2
R2110
5D1R2F-GP
R2110
5D1R2F-GP
1 2
R2117
0R0402-PAD-2-GP
R2117
0R0402-PAD-2-GP
1
2
C
2
1
3
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
2
1
3
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1 2
R2118
0R0402-PAD-2-GP
R2118
0R0402-PAD-2-GP
1
2
C2104
SC1U6D3V2KX-GP
C2104
SC1U6D3V2KX-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_DC_TEST_AY60
DC_TEST_A61_B61
TP_DC_TEST_A62TP_DC_TEST_B2
DC_TEST_AY61_AW61
DC_TEST_AY62_AW62
TP_DC_TEST_AV1
TP_DC_TEST_AW1
DC_TEST_B62_B63
DC_TEST_A3_B3
DC_TEST_A61_B61
DC_TEST_AY2_AW2
DC_TEST_AY3_AW3
DC_TEST_AY61_AW61DC_TEST_C1_C2
DC_TEST_AY2_AW2
DC_TEST_AY62_AW62
TP_DC_TEST_AW63
TP_DC_TEST_A60
DC_TEST_A3_B3
TP_DC_TEST_A4DC_TEST_AY3_AW3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RSVD
A3
22 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RSVD
A3
22 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RSVD
A3
22 101Friday, June 28, 2013
<Core Design>
SSID = CPU
1 TP2203TP2203
1TP2204TP2204
RSVD#AY14 AY14
RSVD#AW14 AW14
RSVD#AT2AT2
RSVD#AU44AU44
RSVD#AV44AV44
RSVD#D15D15
RSVD#F22F22
RSVD#H22H22
RSVD#J21J21
RSVD#T23 T23
RSVD#N23 N23
RSVD#R23 R23
RSVD#AU15 AU15
RSVD#AU10 AU10
RSVD#AM11 AM11
RSVD#AL1 AL1
RSVD#U10 U10
RSVD#AP7 AP7
HSW_ULT_DDR3L 18 OF 19CPU1R
HASWELL-6-GP
HSW_ULT_DDR3L 18 OF 19CPU1R
HASWELL-6-GP
1 TP2205TP2205
DAISY_CHAIN_NCTF_AY2AY2
DAISY_CHAIN_NCTF_AY60AY60
DAISY_CHAIN_NCTF_AY61AY61
DAISY_CHAIN_NCTF_B2B2
DAISY_CHAIN_NCTF_A3 A3
DAISY_CHAIN_NCTF_A4 A4
DAISY_CHAIN_NCTF_A61 A61
DAISY_CHAIN_NCTF_A60 A60
DAISY_CHAIN_NCTF_AW1 AW1
DAISY_CHAIN_NCTF_AV1 AV1
DAISY_CHAIN_NCTF_A62 A62
DAISY_CHAIN_NCTF_AW2 AW2
DAISY_CHAIN_NCTF_AW3 AW3
DAISY_CHAIN_NCTF_AW61 AW61
DAISY_CHAIN_NCTF_AW63 AW63
DAISY_CHAIN_NCTF_AW62 AW62
DAISY_CHAIN_NCTF_C1C1
DAISY_CHAIN_NCTF_B62B62
DAISY_CHAIN_NCTF_B3B3
DAISY_CHAIN_NCTF_AY3AY3
DAISY_CHAIN_NCTF_AY62AY62
DAISY_CHAIN_NCTF_B61B61
DAISY_CHAIN_NCTF_B63B63
DAISY_CHAIN_NCTF_C2C2
HSW_ULT_DDR3L 17 OF 19CPU1Q
HASWELL-6-GP
HSW_ULT_DDR3L 17 OF 19CPU1Q
HASWELL-6-GP
1 TP2208TP2208
1 TP2207TP2207
1 TP2202TP2202
1 TP2206TP2206
1TP2201
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VSS)
A3
23 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VSS)
A3
23 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU (VSS)
A3
23 101Friday, June 28, 2013
<Core Design>
SSID = CPU
VSSAH44
VSSAH49
VSSAH51
VSSAH38
VSS AP10
VSS AN49
VSS AN40
VSS AN23
VSS AM1
VSS AL51
VSSA28
VSSA11
VSSA14
VSSA18
VSSA24
VSSA32
VSSA36
VSSA40
VSSA44
VSSA48
VSSA52
VSSA56
VSSAA1
VSSAA58
VSSAB10
VSSAB20
VSSAB22
VSSAB7
VSSAC61
VSSAD21
VSSAD3
VSSAD63
VSSAE10
VSSAE5
VSSAE58
VSSAF11
VSSAF12
VSSAF14
VSSAF17
VSSAG1
VSSAG11
VSSAG23
VSSAG60
VSSAG62
VSSAG63
VSSAH19
VSSAH24
VSSAH28
VSSAH30
VSSAH32
VSSAH40
VSSAH42
VSSAH53
VSSAH55
VSSAH57
VSSAJ13
VSSAJ14
VSSAJ23
VSSAJ25
VSSAJ27
VSSAJ29
VSS AJ43
VSS AJ45
VSS AJ50
VSS AJ52
VSS AJ56
VSS AJ58
VSS AJ60
VSS AJ63
VSS AK23
VSS AK3
VSS AK52
VSS AL10
VSS AL13
VSS AL17
VSS AL20
VSS AL22
VSS AL23
VSS AL26
VSS AL29
VSS AL31
VSS AL33
VSS AL36
VSS AL39
VSS AL40
VSS AL45
VSS AL46
VSS AL52
VSS AL54
VSS AL57
VSS AL60
VSS AL61
VSS AM17
VSS AM23
VSS AM31
VSS AM52
VSS AN17
VSS AN31
VSS AN32
VSS AN35
VSS AN36
VSS AN39
VSS AN42
VSS AN43
VSS AN45
VSS AN46
VSS AN48
VSS AN51
VSS AN52
VSS AN60
VSS AN63
VSS AN7
VSS AP17
VSS AP20
VSSAF18
VSSAF15
VSS AJ54
VSS AJ47
VSS AJ35
VSS AJ41
VSS AJ39
VSSAH36
VSSAH34
VSSAH22
VSSAH20
VSSAH17
VSSAG61
VSSAG21
HSW_ULT_DDR3L 14 OF 19CPU1N
HASWELL-6-GP
HSW_ULT_DDR3L 14 OF 19CPU1N
HASWELL-6-GP
VSSAV16
VSSAV24
VSSAV33
VSSAV28
VSSAV20
VSSAR11
VSSAU33
VSSAU55
VSS D26
VSS D27
VSS D25
VSS D23
VSSAV55
VSSAP38
VSSAP29
VSSAP31
VSSAP39
VSSAP52
VSSAP54
VSSAP57
VSSAR15
VSSAR17
VSSAR23
VSSAR31
VSSAR33
VSSAR39
VSSAR43
VSSAR49
VSSAR5
VSSAR52
VSSAT13
VSSAT35
VSSAT37
VSSAT40
VSSAT42
VSSAT43
VSSAT46
VSSAT49
VSSAT61
VSSAT62
VSSAT63
VSSAU1
VSSAU18
VSSAU22
VSSAU30
VSSAU51
VSSAU53
VSSAU57
VSSAU59
VSSAV14
VSSAV36
VSSAV39
VSSAV41
VSSAV43
VSSAV46
VSSAV49
VSSAV51
VSS AW24
VSS AW33
VSS AW35
VSS AW37
VSS AW4
VSS AW42
VSS AW44
VSS AW47
VSS AW50
VSS AW51
VSS AW59
VSS AY11
VSS AY16
VSS AY18
VSS AY22
VSS AY24
VSS AY26
VSS AY30
VSS AY33
VSS AY4
VSS AY51
VSS AY53
VSS AY57
VSS AY59
VSS AY6
VSS B20
VSS B24
VSS B26
VSS B28
VSS B32
VSS B36
VSS B4
VSS B40
VSS B44
VSS B48
VSS B52
VSS B56
VSS B60
VSS C18
VSS C20
VSS C25
VSS C27
VSS C38
VSSC39
VSS C57
VSS D12
VSS D14
VSS D18
VSS D2
VSS D21
VSS D29
VSS D30
VSS D31
VSSAV34
VSS AV59
VSS AV8
VSS AW16
VSS AW40
VSS AW60
VSS C11
VSS C14
VSSAU28
VSSAU26
VSSAU24
VSSAU20
VSSAU16
VSSAP48
VSSAP26
VSSAP22
VSSAP23
VSSAP3
HSW_ULT_DDR3L 15 OF 19CPU1O
HASWELL-6-GP
HSW_ULT_DDR3L 15 OF 19CPU1O
HASWELL-6-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3D3V_AUX_KBC_VCC
PSL_IN1#
MODEL_ID_DET
PCB_VER_AD
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
FAN_TACH1
BAT_SCL
BAT_SDA
BAT_IN#
ECRST#
USB_DET#
PSL_OUT#
KBC_VCORF
PCB_VER_AD
PSL_IN2#
H_PROCHOT#_EC
PROCHOT_EC
EC_VTT
EC_SPI_DO_C
EC_SPI_CLK_C
EC_SPI_CS#_C
ECSCI#_KBC
ECSMI#_KBC
LCD_TST_EN
PROCHOT_EC
PSL_OUT#
KCOL0
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
USB_DET#
LPC_AD0
LPC_AD3
LPC_AD2
LPC_AD1
ECSMI#_KBC
PSL_IN1#
ECRST#
LID_CLOSE#
S5_ENABLE
USB_DET#
AC_IN#
ECSWI#_KBC
ECSWI#_KBC
AMB_TEMP
AMB_TEMP
KBC_ON#_GATE_L
KBC_ON#_GATEKBC_ON#_GATE_L
EC_VTT
PLT_RST#_EC
ECSCI#_KBC
PSL_IN2#
PECI
L_BKLT_EN_EC
EC_SPI_DI_C
EC_VBKUP
ECRST#
OVER_CURRENT_P8#
AC_IN_KBC#
MODEL_ID_DET
VBAT
EC_AGND
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_S0
EC_AGND EC_AGND
3D3V_AUX_KBC
3D3V_AUX_KBC
3D3V_S0
EC_AGND
EC_AGND
RTC_AUX_S5
3D3V_AUX_S5
3D3V_AUX_S5
3D3V_AUX_S5 3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_S5
3D3V_AUX_KBC
VBAT
VBAT
VBAT
3D3V_AUX_KBC
VBAT
EC_AGND
1D05V_S0
EC_AGND
PURE_HW_SHUTDOWN#[26,36,76]H_PROCHOT# [4,42,44,46]
EC_SCI# [20]
EC_SMI# [19]
USBDET_CON#[34]
L_BKLT_EN[15]
AD_IA[44]
PSID_EC[42]
PM_SLP_S3#[17,36,48,49,51]
KBC_BEEP[27]
PWRLED#[61]
KCOL[0..16] [62]
KROW[0..7] [62]
E51_TxD[58]
AMP_MUTE#[27]
PCH_SUSCLK_KBC [17]
PLT_RST# [17,30,58,65,73]
LPC_FRAME# [18,65]
LPC_AD[3..0] [18,65]
INT_SERIRQ [20]
PM_CLKRUN#_EC[17]
SPI_CLK_R [18,25]
SPI_CS0#_R [18,25]
PM_PWRBTN#[17,96]
S5_ENABLE [36]
CAP_LED# [62]
BAT_IN# [42,43,44]
LID_CLOSE# [61]
PM_SLP_S4# [17,49]
RSMRST#_KBC [17]
WIFI_RF_EN[58]
SYS_PWROK[17,96]
AC_PRESENT[17,76]
H_RCIN# [20]
TPCLK[62]
TPDATA[62]
AD_IA_HW2[44]
BLON_OUT[52]
BAT_SDA[43,44,53]
SML1_DATA[18,26,76]
SML1_CLK[18,26,76]
ME_UNLOCK [19]
IMVP_PWRGD[7,46]
LCD_TST_EN[52]
PWR_CHG_AD_OFF[42]
USB_PWR_EN#[35]
RTCRST_ON[19]
LCD_TST[52]
AD_IA_HW[44]
KBC_PWRBTN#[61]
AC_IN#[44]
USBCHG_EN[35]
AOAC_WLAN_EN[58]
FAN_TACH1[26]
EC_SWI# [20]
WIFI_WAKE# [58]
BOOST_MON[44]
USBCHARGER_CB0[35]
DIS_DTM[44]
H_PECI [4]
SPI_SI_R [18,25]
SPI_SO_R [18,25]
CLK_PCI_KBC [18]
FAN1_DAC_1[26]
PCH_PWROK[17,26,36]
EC_BRIGHTNESS[52]
KB_BL_CTRL[62]
PM_LAN_ENABLE[30]
PM_SLP_SUS#[17,38]
PM_SUSWARN#[17]
PM_SUSACK# [17]
KBC_DPWROK[17]
LVDS_R2136_BKLT_EN[53]
AC_IN_KBC#[42]
BAT_SCL[43,44,53]
EC_FB_CLAMP_TGL_REQ#[76]
EC_FB_CLAMP[75,76,83]
OVER_CURRENT_P8# [76]
CHG_AMBER_LED#[61]
LAN_WAKE#[30]
DGPU_PWROK[15,82,83]
ALL_SYS_PWRGD[36]
TOUCH_PANEL_INTR# [52]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
KBC Nuvoton NPCE985
A2
24 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
KBC Nuvoton NPCE985
A2
24 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
KBC Nuvoton NPCE985
A2
24 101Friday, June 28, 2013
<Core Design>
SSID = KBC
Layout Note:
Need very close to EC
143.0K
Connect GND and AGND planes via either 
0R resistor or connect directly.
Layout Note:
100.0K 1.358V
Layout Note:
Need very close to EC
C2422 PDG is 47p
Reserved
Layout Note:
Need very close to EC
174.0KReserved 100.0K
Reserved
47.0K
1.65VReserved
64.9K
76.8
100.0K
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
100.0KX00
X01
3.0V
2.75V
X02
100.0K
2.48V
A00
100.0K
100.0K
100.0K
100.0K
10.0K
2.24V
20.0K
2.0V
33.0K
1.87V
1.204V
Reserved 100.0K 215.0K 1.048V
EC_GPIO47 High Active
2.304V
154K(64.15435.6DL)
MODEL_ID_DET(GPIO07)
64.9K(64.64925.6DL)
57.6K(64.57625.6DL)
1.299V
107K(64.10735.6DL)
100.0K
1.594V
137K(64.13735.6DL)
100.0K
PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
100.0K 3.0V
2.801V
100.0K
2.598V
100.0K
100.0K
100.0K
100.0K
100.0K
10.0K(64.10025.6DL)
2.402V
2.093V
27.0K(64.27025.6DL)
1.392V
100.0K
200K(64.20035.6DL) 1.099V
82.5K(64.82525.6DL) 1.808V
(DOH50)UMA/eDP
2.001V
(DOH70)UMA
TBD
TBD
TBD
TBD
TBD
TBD
TBD
(DOH50)DIS/LVDS
TBD
TBD
TBD
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
TBD
232K(64.23236.6DL)
73.2K(64.73225.6DL) 1.905V
13.7K(64.13725.6DL)
TBD
TBD
TBD
17.8K(64.17825.6DL)
2.902V
(DOH50)DIS/eDP
93.1K(64.93125.6DL)
22.1K(64.22125.6DL)
1.709V
(DOH50)UMA/LVDS
2.702V
120K(64.12035.6DL)
32.4K(64.32425.6DL)
37.4K(64.37425.6DL)
0.994V
1.499V
2.492V
43.2K(64.43225.6DL)
2.201V49.9K(64.49925.6DL)
AOAC Ambient temperature detect
X03
100.0K
LVDS backlight Control from PS8625
Don't PD
ALL_SYS_PWRGD assert, delay 10ms;
PCH_PWROK assert.
ALL_SYS_PWRGD assert, delay 100ms;
SYS_PWROK assert.
eDP backlight Control from PCH
Backlight Control from LVDS Converter
(DOH70)DIS
X01 0321
X01 0321
A00 0618
A00 0618
1
2
R2439
10KR2J-3-GP
R2439
10KR2J-3-GP
1 2R2413 100KR2J-1-GPDYR2413 100KR2J-1-GPDY
LAD3/GPIOF4
1
LCLK/GPIOF5
2
LFRAME#/GPIOF6
3
VDD
4
LRESET#/GPIOF7
7
VTT
12
PECI
13
ECSCI#/GPIO54
29
VCORF
44
VSBY
75
EXT_RST#
85
VBKUP
114
KBRST#/GPIO86
122
SERIRQ/GPIOF0
125
LAD0/GPIOF1
126
LAD1/GPIOF2
127
LAD2/GPIOF3
128
VCC
19
VCC
46
VCC
76
VCC
88
AVCC
102
VCC
115
GPIO24
6
GPIO36/TB3
15
GPIO42/TCK
17
GPIO43/TMS
20
GPIO44/TDI
21
GPIO46/CIRRXM/TRST#
23
GPIO56/TA1
31
GPIO57/KBSOUT17
33
GPIO60/KBSOUT16
34
GPIO7/AD7/VD_IN2
94
GPIO3/EXT_PURST#/AD6
95
GPIO4/AD5
96
GPIO90/AD0
97
GPIO91/AD1
98
GPIO92/AD2
99
GPIO93/AD3
100
GPIO94/DA0
101
GPIO95/DA1
105
GPIO96/DA2
106
GPIO97/DA3
107
GPIO5/AD4
108
GPIO20/TA2/IOX_DIN_DIO
117
GND
5
GND
18
GND
45
GND
78
GND
89
AGND
103
GND
116
KBSOUT14/GPI/O62/XORTR#
36
KBSOUT13/GPI/O63/TRIST#
37
KBSOUT12/GPO64/TEST#
38
KBSOUT11/P80_DAT/GPIOC3
39
KBSOUT10/P80_CLK/GPIOC2
40
KBSOUT9/GPOC1/SDP_VIS#
41
KBSOUT8/GPIOC0
42
KBSOUT7/GPIOB7
43
KBSOUT6/GPIOB6/RDY#
47
KBSOUT5/GPIOB5/TDO
48
KBSOUT4/GPOB4/JEN0#
49
KBSOUT3/GPIOB3/TDI
50
KBSOUT2/GPIOB2/TMS
51
KBSOUT1/GPIOB1/TCK
52
KBSOUT0/GPOB0/SOUT_CR/JENK#
53
KBSIN0/GPIOA0/N2TCK
54
KBSIN1/GPIOA1/N2TMS
55
KBSIN2/GPIOA2
56
KBSIN3/GPIOA3
57
KBSIN4/GPIOA4
58
KBSIN5/GPIOA5
59
KBSIN6/GPIOA6
60
KBSIN7/GPIOA7
61
F_CS0#
90
F_SCK
92
PSL_IN1#/GPI70
73
PSL_IN2#/GPI6/EXT_PURST#
93
GPIO17/SCL1/N2TCK
70
GPIO22/SDA1/N2TMS
69
GPIO73/SCL2/N2TCK
67
GPIO74/SDA2/N2TMS
68
GPIO23/SCL3/N2TCK
119
GPIO31/SDA3/N2TMS
120
GPIO47/SCL4/N2TCK
24
GPIO53/SDA4/N2TMS
28
GPIO37/PSCLK1
72
GPIO35/PSDAT1
71
GPIO26/PSCLK2
10
GPIO27/PSDAT2
11
GPIO50/PSCLK3/TDO
25
GPIO52/PSDAT3/RDY#
27
F_SDIO/F_SDIO0
87
F_SDI/F_SDIO1
86
GPIO81/F_WP#/F_SDIO2
91
GPIO0/EXTCLK/F_SDIO3
77
GPIO1/TB2
64
GPIO14/TB1
63
GPIO21/B_PWM
118
GPIO66/G_PWM
81
GPIO32/D_PWM
65
GPIO13/C_PWM
62
GPIO15/A_PWM
32
GPIO45/E_PWM
22
KBSOUT15/GPIO61/XOR_OUT
35
PSL_OUT#/GPIO71
74
GPIO82/IOX_LDSH/VD_OUT1
110
GPIO84/IOX_SCLK/VD_OUT2
112
GPIO80/VD_IN1
104
GPO33/H_PWM/VD1_EN#
66
GPIO10/LPCPD#
124
GPIO67/N2TMS
123
GPIO85/GA20
121
GPIO87/CIRRXM/SIN_CR
113
GPIO83/SOUT_CR
111
GPIO30/F_WP#
109
GPIO77/SPI_MISO
84
GPIO76/SPI_MOSI
83
GPIO75/SPI_SCK
82
GPIO41/F_WP#
80
GPIO2/SPI_CS#
79
GPIO55/CLKOUT/IOX_DIN_DIO
30
GPIO51/TA3/N2TCK
26
GPIO40/F_PWM/1_WIRE
16
GPIO34/CIRRXL
14
GPIO65/SMI#
9
GPIO11/CLKRUN#
8
KBC24
NPCE985PA0DX-1-GP
71.00985.C0G
KBC24
NPCE985PA0DX-1-GP
71.00985.C0G
1 2R2418 10KR2J-3-GPR2418 10KR2J-3-GP
G
S
D
Q2401
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I314th = 84.2N702.W31
Q2401
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
1 2R2411 100KR2J-1-GPR2411 100KR2J-1-GP
1 2R2401
0R0402-PAD-2-GP
R2401
0R0402-PAD-2-GP
1 2
R2434
0R2J-2-GP
DY
R2434
0R2J-2-GP
DY
C
B
E
Q2404
MMBT3906-4-GP
2nd = 84.03906.F11
84.T3906.A11
Q2404
MMBT3906-4-GP
2nd = 84.03906.F11
84.T3906.A11
1 2
C2417
SCD1U10V2KX-5GP
C2417
SCD1U10V2KX-5GP
1 2R2426 100KR2J-1-GPR2426 100KR2J-1-GP
1 2
R2433
20KR2J-L2-GP
R2433
20KR2J-L2-GP
1
2
C2412
SCD1U10V2KX-5GP
C2412
SCD1U10V2KX-5GP
1 2C2414 SCD1U10V2KX-5GPDYC2414 SCD1U10V2KX-5GPDY
G
S
D
Q2403
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
Q2403
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
1
2
R2425
330KR2J-L1-GP
R2425
330KR2J-L1-GP
1 2R2416
0R0402-PAD-2-GP
R2416
0R0402-PAD-2-GP
1
2
C2402
SCD1U10V2KX-5GP DY
C2402
SCD1U10V2KX-5GP DY
1 2R24100R0402-PAD-2-GP R24100R0402-PAD-2-GP
1
2
C
2
4
0
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
2
4
0
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
2
4
1
3
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
C
2
4
1
3
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
1
2
C2420
S
C
1
0
0
P
5
0
V
2
JN
-3
G
P
C2420
S
C
1
0
0
P
5
0
V
2
JN
-3
G
P1
2
R2441
NTC-10K-26-GP
69.60037.011
R2441
NTC-10K-26-GP
69.60037.011
1
2
C
2
4
0
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C
2
4
0
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
3
D2401
BAT54CPT-2-GP
75.00054.K7D
D2401
BAT54CPT-2-GP
75.00054.K7D
1 2
R2432
1KR2J-1-GP
R2432
1KR2J-1-GP
12
R2402
0R0603-PAD-2-GP-U
R2402
0R0603-PAD-2-GP-U
12 R2412 33R2J-2-GPR2412 33R2J-2-GP
1 2R2419 0R0402-PAD-2-GPR2419 0R0402-PAD-2-GP
21
D2402
CH751H-40PT-GP
83.R0304.A8F
D2402
CH751H-40PT-GP
83.R0304.A8F
1
2
R2437
10KR2F-2-GP
R2437
10KR2F-2-GP
1
2
C2422
SC100P50V2JN-3GPDY
C2422
SC100P50V2JN-3GPDY
1
2
C
2
4
1
1
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
C
2
4
1
1
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
1 2R2430
0R0402-PAD-2-GP
R2430
0R0402-PAD-2-GP
1 2R2421 100KR2J-1-GPR2421 100KR2J-1-GP
1
2
C2415
SC220P50V2KX-3GP
DY C2415
SC220P50V2KX-3GP
DY
1 2R24080R0402-PAD-2-GP R24080R0402-PAD-2-GP
1
2
C2419
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C2419
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R2404
64K9R2F-1-GP
R2404
64K9R2F-1-GP
1
2
C
2
4
1
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
4
1
0
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2R2428 0R0402-PAD-2-GPR2428 0R0402-PAD-2-GP
1
2
C
2
4
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
4
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2
R2417 0R0402-PAD-2-GPR2417 0R0402-PAD-2-GP
1 2
C2416 SC1U6D3V2KX-GPC2416 SC1U6D3V2KX-GP
1 2R2444
0R2J-2-GP eDP
R2444
0R2J-2-GP eDP
1
2
C2421
SC47P50V2JN-3GP
C2421
SC47P50V2JN-3GP
1 2R24090R0402-PAD-2-GP R24090R0402-PAD-2-GP
1
2
R24071
0
0
K
R
2
F
-L
1
-G
P
R24071
0
0
K
R
2
F
-L
1
-G
P
1 2R2422 0R0402-PAD-2-GPR2422 0R0402-PAD-2-GP
1
2
C2403
SCD1U10V2KX-5GPDY
C2403
SCD1U10V2KX-5GPDY
1
2
R2403
2D2R3-1-U-GP
R2403
2D2R3-1-U-GP
1
2
R2442
100KR2J-1-GPDY
R2442
100KR2J-1-GPDY
1 2R2446
0R2J-2-GP LVDS
R2446
0R2J-2-GP LVDS
1
2
C
2
4
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
4
0
4
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2R2420 0R0402-PAD-2-GPR2420 0R0402-PAD-2-GP
1
2
R2431
330KR2J-L1-GP
R2431
330KR2J-L1-GP
1 2R2427
0R0402-PAD-2-GP
R2427
0R0402-PAD-2-GP
1
2
R2436
10KR2J-3-GP
R2436
10KR2J-3-GP
1
2
C
2
4
0
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
4
0
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
S
D
G G
DQ2402
DMP2130L-7-GP
2ND = 84.03413.A31
84.02130.031
G
DQ2402
DMP2130L-7-GP
2ND = 84.03413.A31
84.02130.031
1
2
C2418
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C2418
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
R
2
4
0
5
4
9
K
9
R
2
F
-L
-G
P
R
2
4
0
5
4
9
K
9
R
2
F
-L
-G
P
1
2
C
2
4
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
4
0
6
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R2406
100KR2F-L1-GP
R2406
100KR2F-L1-GP
1 2R2414 100KR2J-1-GPR2414 100KR2J-1-GP
1
23
4
RN2401
SRN4K7J-8-GP
RN2401
SRN4K7J-8-GP
1
2
C
2
4
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
C
2
4
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
DY
1 2R2440
0R0402-PAD-2-GP
R2440
0R0402-PAD-2-GP
1 2R2424 100KR2J-1-GPDYR2424 100KR2J-1-GPDY
1
2
R2445
100KR2J-1-GP
R2445
100KR2J-1-GP
1 2
R2438
0R2J-2-GP
DY
R2438
0R2J-2-GP
DY
1 2R2415 10KR2J-3-GPR2415 10KR2J-3-GP
1
2
R2435
0R0402-PAD-2-GP
R2435
0R0402-PAD-2-GP
1 2
R2429
43R2J-GP
R2429
43R2J-GP
www.qdzbwx.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+RTC_VCC
RTC_PWR
3D3V_S5
3D3V_S5
3D3V_S5
RTC_AUX_S5+RTC_VCC 3D3V_AUX_S5
SPI_CLK_R [18,24]
SPI_SO_R[18,24]
SPI_SI_R [18,24]
SPI_CS0#_R[18,24]
RTC_DET# [20]
SPI_WP#[18]
SPI_HOLD# [18]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Flash/RTC
A3
25 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Flash/RTC
A3
25 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Flash/RTC
A3
25 101Friday, June 28, 2013
<Core Design>
SSID = Flash.ROM
SSID = RBATT
SPI Flash ROM(8M) for PCH
Single SPI shared flash connection (SPI Quad I/O mode)
Refer to "NCPE985x/ NPCE995x board design reference guide" 
72.25647.00A O O
72.25Q64.K01
QUAD/DUAL fast read DUAL fast readSource
O O
A00 0619
1
2
EC2501
SC4D7P50V2CN-1GPDY
EC2501
SC4D7P50V2CN-1GPDY
1 AFTP2501AFTP2501
1AFTP2502AFTP2502
1
2
EC2502
SC4D7P50V2CN-1GP
DYEC2502
SC4D7P50V2CN-1GP
DY
1
2
C2503
SC1U6D3V2KX-GP
C2503
SC1U6D3V2KX-GP
1
2
R2504
10MR2J-L-GP
R2504
10MR2J-L-GP
1
2
3
D2501
BAS40CW-GP
83.00040.E81
D2501
BAS40CW-GP
83.00040.E81
1
2
C2502
SCD1U10V2KX-5GP
C2502
SCD1U10V2KX-5GP
1
2
C
2
5
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
2
5
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
G
S
D
Q2505
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
Q2505
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
1
2
EC2503
SC10P50V2JN-4GPDY
EC2503
SC10P50V2JN-4GPDY
1 2
34
RN2501
SRN4K7J-8-GPDY
RN2501
SRN4K7J-8-GPDY
CS#1
DO/IO12
WP#/IO23
GND4
VCC 8
HOLD#/IO3 7
CLK 6
DI/IO0 5
SPI25
W25Q64FVSSIQ-GP
72.25Q64.K01
SPI25
W25Q64FVSSIQ-GP
72.25Q64.K01
1
2
R2501
4K7R2J-2-GP
R2501
4K7R2J-2-GP
PWR 1
GND 2
NP1 NP1
NP2 NP2
RTC1
BAT-AAA-BAT-054-P06-GP-U
62.70001.061
RTC1
BAT-AAA-BAT-054-P06-GP-U
62.70001.061
12
R2502
1KR2J-1-GP
R2502
1KR2J-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
T_CRIT#
THM_SML1_CLK
NCT7718_DXP
ALERT#
T_CRIT#
ALERT#
NCT7718_DXN
THM_SML1_DATA
THM_SML1_DATA
THM_SML1_CLK
THERM_SYS_SHDN#
FAN_VCC_1
FON#
FAN_VCC_1
FAN_TACH1_C
FAN_VCC_1
FAN_TACH1
3D3V_S0
3D3V_S0
3D3V_S0 3D3V_S0
5V_S0
5V_S0
PURE_HW_SHUTDOWN# [24,36,76]
SML1_DATA[18,24,76]
SML1_CLK[18,24,76]
FAN1_DAC_1[24]
FAN_TACH1[24]
PCH_PWROK[17,24,36]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Thermal NCT7718W/Fan
A3
26 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Thermal NCT7718W/Fan
A3
26 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Thermal NCT7718W/Fan
A3
26 101Friday, June 28, 2013
<Core Design>
SSID = Thermal
Layout Note:
Both DXN and DXP routing 10 mil tracewidth and 10 mil spacing.
Layout Note:
C2812 close U2801
2.System Sensor, Put on palm rest 
Fan controller1
Layout Note:
Need 10 mil trace width.
Layout Note:
Signal Routing Guideline:
Trace width = 15mil
1204 change to PCH_PWROK
A00 0618
G
S
D
Q2602
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
Q2602
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31
1
2
C
2
6
0
3
S
C
2
2
0
0
P
5
0
V
2
K
X
-2
G
P
DY
C
2
6
0
3
S
C
2
2
0
0
P
5
0
V
2
K
X
-2
G
P
DY
1
2
C2610
SCD1U10V2KX-5GP
DY C2610
SCD1U10V2KX-5GP
DY
1
2
C2606
SC470P50V3JN-2GP
DY
C2606
SC470P50V3JN-2GP
DY
1
2
C
2
6
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
2
6
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
2
C2604
SC4D7U6D3V3KX-GPDY
C2604
SC4D7U6D3V3KX-GPDY
1
2
C
2
6
0
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
6
0
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
2
1
D2601
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
DY
D2601
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
DY
FSM#1
VIN2
VOUT3
VSET4 GND 5
GND 6
GND 7
GND 8
FAN261
APL5606AKI-TRG-GP
74.05606.A71
2nd = 74.02113.0E1
FAN261
APL5606AKI-TRG-GP
74.05606.A71
2nd = 74.02113.0E1
1
2
34
5
6
Q2601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3FQ2601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
1 2
R2605
0R2J-2-GP
DY
R2605
0R2J-2-GP
DY
1 AFTP2602AFTP2602
1
2
C2607
SC2200P50V2KX-2GP
C2607
SC2200P50V2KX-2GP
1
2
C
2
6
0
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY C2
6
0
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C
2
6
1
1
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
C
2
6
1
1
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
1
2
R2601
0R0402-PAD-2-GP
R2601
0R0402-PAD-2-GP
1 2R2603 18K7R2F-GPR2603 18K7R2F-GP
3
1
2
Q2603
PMBS3904-1-GP
84.03904.L06
2ND = 84.03904.P11
Q2603
PMBS3904-1-GP
84.03904.L06
2ND = 84.03904.P11
1
2
C
2
6
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
6
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
3
4
5
FAN1
ETY-CON3-8-GP
20.F1841.003
FAN1
ETY-CON3-8-GP
20.F1841.003
1
2
C
2
6
0
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY C2
6
0
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1 2R2606
0R0402-PAD-2-GP
R2606
0R0402-PAD-2-GP
1 2
34
RN2602
SRN2K2J-1-GP
RN2602
SRN2K2J-1-GP
VDD1
D+2
D-3
T_CRIT#4 GND 5
ALERT# 6
SDA 7
SCL 8
THM26
NCT7718W-GP
74.07718.0B9
THM26
NCT7718W-GP
74.07718.0B9
1 2R2604 2KR2F-3-GPR2604 2KR2F-3-GP
1 AFTP2601AFTP2601
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MIC_CAP
C
P
V
E
E
AUD_SPK_L-
AUD_SPK_L+
AUD_SPK_R-
A
U
D
_
V
R
E
F
L
D
O
3
_
C
A
P
AUD_SPK_R+
AUD_SENSECOMBO-GPI
HDA_CODEC_SYNC
HDA_CODEC_RST#
C
B
N
AUD_SENSE_A
AUD_PC_BEEP
LDO2_CAP
HDA_CODEC_BITCLK
JDREF
EAPD#
CBP
PCH_AZ_CODEC_SDOUT1 HDA_CODEC_SDOUT
HDA_CODEC_BITCLK_C
L
D
O
1
_
C
A
P
DMIC_DATA_R
DMIC_CLK_R
HDA_CODEC_SDIN0
AUD_PC_BEEP
KBC_BEEP_R
HDA_SPKR_R
AUD_PC_BEEP_C
+3V_AVDD
AUD_AGND
+5V_PVDD
5V_S0+5V_AVDD
1D5V_S0
AUD_AGND
AUD_AGND
+3V_1D5V_AVDD
5V_S0 +5V_PVDD
+3V_AVDD
AUD_AGND
AUD_AGND
3D3V_S0 +3V_AVDD
AUD_AGND
AUD_AGND
+5V_AVDD
AUD_AGND
+3V_1D5V_AVDD
+5V_PVDD
+3V_AVDD
AUD_AGND
3D3V_S0
AUD_AGND
KBC_BEEP[24]
HDA_SPKR[20]
AUD_SPK_R-[29]
AUD_SPK_L-[29]
AUD_SPK_L+[29]
HDA_CODEC_SDOUT[19]
AUD_SPK_R+[29]
AUD_SENSE [29]
AMP_MUTE#[24]
HDA_SDIN0[19]
HDA_CODEC_SYNC[19]
HDA_CODEC_RST#[19,29]
HDA_CODEC_BITCLK[19]
RING2 [29]
DMIC_DATA[52]
DMIC_CLK[52]
MIC2_VREFO [29]
AUD_HP1_JACK_L[29]
AUD_HP1_JACK_R[29]
SLEEVE [29]
LINE1_L [29]
LINE1_R [29]
LINE1_VREFO_R[29]
LINE1_VREFO_L[29]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Audio Codec ALC3223
Custom
27 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Audio Codec ALC3223
Custom
27 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Audio Codec ALC3223
Custom
27 101Friday, June 28, 2013
<Core Design>
SSID = AUDIO
Close pin36
Close pin40
1.5A
25mA
Close pin46
Close pin3
Layout Note:
Layout Note:
Place close to Pin 13
Layout Note:
Place close to Pin 26
Azalia I/F EMI
Close pin41
Layout Note:
Layout Note:
Tied at point only under
Codec or near the Codec
Layout Note:
Width>40mil, to improve 
Headpohone Crosstalk noise
remove D2702 R2710 R2711 Add R2708_0R(PDB pin)
Tied at point only under
Codec or near the Codec
Layout Note:
0109 Add
Close pin2
DGND
AGND
AGND DGND
AGND DGND
AGND DGND
AGNDDGND
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
1 2R2711 0R0603-PAD-2-GP-UR2711 0R0603-PAD-2-GP-U
1 2
C2720
SCD1U10V2KX-5GP
C2720
SCD1U10V2KX-5GP
1
2
C2716
SC4D7U6D3V3KX-GP
C2716
SC4D7U6D3V3KX-GP
1 2C2713 SC10U6D3V3MX-GPC2713 SC10U6D3V3MX-GP
1
2
C2706
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
C2706
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
1
2
C2710
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C2710
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C2717
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C2717
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2EC2707 SCD1U10V2KX-5GPEC2707 SCD1U10V2KX-5GP
1 2
R2701
0R0402-PAD-2-GP
R2701
0R0402-PAD-2-GP
1
2
3
D2701
BAT54CPT-2-GP
75.00054.K7D
2nd=75.00054.J7D
D2701
BAT54CPT-2-GP
75.00054.K7D
2nd=75.00054.J7D
1 2EC2705 SCD1U10V2KX-5GPEC2705 SCD1U10V2KX-5GP
1 2R2708
0R0402-PAD-2-GP
R2708
0R0402-PAD-2-GP
D
V
D
D
1
G
P
IO
0
/D
M
IC
_
D
A
T
A
2
G
P
IO
1
/D
M
IC
_
C
L
K
3
D
V
S
S
4
S
D
A
T
A
_
O
U
T
5
B
IT
_
C
L
K
6
L
D
O
3
_
C
A
P
7
S
D
A
T
A
_
IN
8
D
V
D
D
_
IO
9
S
Y
N
C
1
0
R
E
S
E
T
#
1
1
P
C
B
E
E
P
1
2
SENSE_A
13
SENSE_B
14
JDREF
15
MONO_OUT
16
MIC2_L/RING2
17
MIC2_R/SLEEVE
18
MIC_CAP
19
CPVREF
20
LINE1_R
21
LINE1_L
22
LINE2_R
23
LINE2_L
24
A
V
S
S
1
2
5
A
V
D
D
1
2
6
L
D
O
1
_
C
A
P
2
7
V
R
E
F
2
8
M
IC
2
_
V
R
E
F
O
2
9
L
IN
E
1
_
V
R
E
F
O
_
R
3
0
L
IN
E
1
_
V
R
E
F
O
_
L
3
1
H
P
_
O
U
T
_
L
3
2
H
P
_
O
U
T
_
R
3
3
C
P
V
E
E
3
4
C
B
N
3
5
C
P
V
D
D
3
6
CBP
37
AVSS2
38
LDO2_CAP
39
AVDD2
40
PVDD1
41
SPK_L+
42
SPK_L-
43
SPK_R-
44
SPK_R+
45
PVDD2
46
PDB
47
SPDIFO/GPIO2
48
GND
49
HDA27
ALC3223-CG-GP
HDA27
ALC3223-CG-GP
1
2
C2723
SC22P50V2JN-4GP
DYC2723
SC22P50V2JN-4GP
DY
12 R2704
0R0805-PAD-2-GP-U
R2704
0R0805-PAD-2-GP-U
1 2C2712 SC10U6D3V3MX-GPC2712 SC10U6D3V3MX-GP
1 2
ER2702
47R2J-2-GP
DY
ER2702
47R2J-2-GP
DY
1 2R2707 20KR2F-L-GPR2707 20KR2F-L-GP
1
2
C2702
SC4D7U6D3V3KX-GP
C2702
SC4D7U6D3V3KX-GP
1 2R2706 0R0603-PAD-2-GP-UR2706 0R0603-PAD-2-GP-U
1
2
C2703
SC1U6D3V2KX-GP
C2703
SC1U6D3V2KX-GP
1 2EC2708 SCD1U10V2KX-5GPDYEC2708 SCD1U10V2KX-5GPDY
1
2
R2717
1KR2J-1-GP
R2717
1KR2J-1-GP
1 2EC2703 SCD1U10V2KX-5GPEC2703 SCD1U10V2KX-5GP
1
2
C
2
7
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
C
2
7
0
5
S
C
2
D
2
U
6
D
3
V
2
M
X
-G
P
1
2
C
2
7
1
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
2
7
1
9
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2R2714
0R0402-PAD-2-GP
R2714
0R0402-PAD-2-GP
1
2 3
4
R
N
0R4P2R-PAD
RN2701
R
N
0R4P2R-PAD
RN2701
1
2
C2715
SC4D7U6D3V3KX-GP
C2715
SC4D7U6D3V3KX-GP
1 2
C2704
SC1U6D3V2KX-GP
C2704
SC1U6D3V2KX-GP
1
2
C2707
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C2707
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C
2
7
1
8
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
C
2
7
1
8
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
1
2
C2709
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C2709
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2R2710 0R2J-2-GPDYR2710 0R2J-2-GPDY
1 2
C2724
SC22P50V2JN-4GP
DY
C2724
SC22P50V2JN-4GP
DY
1 2
R2703
0R0603-PAD-2-GP-U
R2703
0R0603-PAD-2-GP-U
1 2R2718
0R0402-PAD-2-GPR2718
0R0402-PAD-2-GP
1 2EC2706 SCD1U10V2KX-5GPEC2706 SCD1U10V2KX-5GP
12
ER2701
47R2J-2-GP
DY
ER2701
47R2J-2-GP
DY
1
2
C2708
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
C2708
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
1 2R2716
0R0402-PAD-2-GP
R2716
0R0402-PAD-2-GP
12 R2702
0R0805-PAD-2-GP-U
R2702
0R0805-PAD-2-GP-U
1 2R2705
0R0402-PAD-2-GP
R2705
0R0402-PAD-2-GP
12
EC2702
SC22P50V2JN-4GP
DY
EC2702
SC22P50V2JN-4GP
DY
1
2
C2711
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
C2711
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
12
EC2701
SCD1U10V2KX-5GP
DY
EC2701
SCD1U10V2KX-5GP
DY
1
TP2702TP2702
1 2EC2704 SCD1U10V2KX-5GPDYEC2704 SCD1U10V2KX-5GPDY
1
2
C2701
SC4D7U6D3V3KX-GP
C2701
SC4D7U6D3V3KX-GP
1 2
R2709
39K2R2F-L-GP
R2709
39K2R2F-L-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_SPK_L-_C
RING2_R
RING2_R
AUD_PORTA_L_R_B
AUD_SPK_R+_C
AUD_SPK_L+_C
AUD_HP1_JACK_L1
SLEEVE_R
AUD_PORTA_R_R_B
AUD_SPK_R-_C
AUD_PORTA_R_R_B
AUD_SENSE
AUD_SPK_R+_C
AUD_PORTA_L_R_B
AUD_SPK_L-_C
AUD_SPK_R-_C
AUD_SPK_L+_C
AUD_PORTA_L_R_B
AUD_PORTA_R_R_B
AUD_SENSE
SLEEVE_R
POP_G2POP_G1
AUD_HP1_JACK_R1
LINE1_R_C
LINE1_L_C
AUD_AGND
AUD_AGNDAUD_AGND
AUD_AGND
+3V_AVDD
AUD_AGND
5V_PWR_2
LINE1_L[27]
LINE1_VREFO_L[27]
AUD_SENSE[27]
LINE1_R[27]
LINE1_VREFO_R[27]
SLEEVE[27]
AUD_HP1_JACK_R[27]
AUD_HP1_JACK_L[27]
RING2[27]
MIC2_VREFO[27]
AUD_SPK_L-[27]
AUD_SPK_R+[27]
AUD_SPK_R-[27]
AUD_SPK_L+[27]
HDA_CODEC_RST# [19,27]
SLEEVE [27]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Speaker/HPMIC CONN
A3
29 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Speaker/HPMIC CONN
A3
29 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Speaker/HPMIC CONN
A3
29 101Friday, June 28, 2013
<Core Design>
Speaker
Universal jack
SPK_R+
CONN Pin
Pin1
SPK_R-
SPK_L+
Net name
SPK_L_
Pin2
Pin3
Pin4
SSID = AUDIO
GG
S
S
D
D
A00 0618
A00 0618
1 2R2910 10R2F-L-GPR2910 10R2F-L-GP
1
2 3
4
RN2901
SRN2K2J-1-GP
RN2901
SRN2K2J-1-GP
1 AFTP2901AFTP2901
1
2
E
D
2
9
0
4
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
E
D
2
9
0
4
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
12 R29040R0603-PAD-2-GP-U R29040R0603-PAD-2-GP-U
1 AFTP2902AFTP2902
1
2
E
D
2
9
0
3
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
E
D
2
9
0
3
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
1
2
E
C
2
9
0
2
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
E
C
2
9
0
2
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
12 R29010R0603-PAD-2-GP-U R29010R0603-PAD-2-GP-U
1
2
E
D
2
9
0
5
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
E
D
2
9
0
5
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
1 2C2908
SC4D7U6D3V3KX-GP
C2908
SC4D7U6D3V3KX-GP
1 AFTP2906AFTP2906
1 2R2908 10R2F-L-GPR2908 10R2F-L-GP
12 R29110R0603-PAD-2-GP-U R29110R0603-PAD-2-GP-U
1
2
R
2
9
1
9
1
0
K
R
2
J
-3
-G
P
R
2
9
1
9
1
0
K
R
2
J
-3
-G
P
1
2
R2915
220KR2J-L2-GP
R2915
220KR2J-L2-GP
1
2
E
C
2
9
0
3
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
E
C
2
9
0
3
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
1 2C2907
SC4D7U6D3V3KX-GP
C2907
SC4D7U6D3V3KX-GP
1
2
34
5
6
U2901
2N7002KDW-GP
U2901
2N7002KDW-GP
1
2
E
D
2
9
0
2
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
E
D
2
9
0
2
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
12 R29060R0603-PAD-2-GP-U R29060R0603-PAD-2-GP-U
1
2
E
C
2
9
0
7
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
E
C
2
9
0
7
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
1 2R2921 1KR2J-1-GPR2921 1KR2J-1-GP
12 R29090R0603-PAD-2-GP-U R29090R0603-PAD-2-GP-U
4
3
2
1
5
6
SPK1
ACES-CON4-7-GP-U
20.F0772.004
SPK1
ACES-CON4-7-GP-U
20.F0772.004
1 AFTP2907AFTP2907
1
2
E
D
2
9
0
1
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
E
D
2
9
0
1
A
Z
2
0
2
5
-0
1
H
-R
7
G
-G
P
DY
75.02025.077
1
2
3
4
5
6
MS
HPMIC1
AUDIO-JK404-GP
22.10270.V01
HPMIC1
AUDIO-JK404-GP
22.10270.V01
1 AFTP2909AFTP2909
1 AFTP2903AFTP2903
12 R29030R0603-PAD-2-GP-U R29030R0603-PAD-2-GP-U
1
2
R2918
100KR2J-1-GP DY
R2918
100KR2J-1-GP DY
1 2R2913 2K2R2J-2-GPR2913 2K2R2J-2-GP
12 R29070R0603-PAD-2-GP-U R29070R0603-PAD-2-GP-U
1
2
E
C
2
9
0
4
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
E
C
2
9
0
4
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
1 2R2922 1KR2J-1-GPR2922 1KR2J-1-GP
1
2
R
2
9
2
0
1
0
K
R
2
J
-3
-G
P
R
2
9
2
0
1
0
K
R
2
J
-3
-G
P
1
2
E
C
2
9
0
8
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
E
C
2
9
0
8
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
1
2
E
C
2
9
0
6
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
E
C
2
9
0
6
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
12 R29020R0603-PAD-2-GP-U R29020R0603-PAD-2-GP-U
1 AFTP2904AFTP2904
1 2R2917
0R0402-PAD-2-GP
R2917
0R0402-PAD-2-GP
1
2
E
C
2
9
0
1
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
E
C
2
9
0
1
S
C
2
K
2
P
5
0
V
3
K
X
-G
P
DY
1
2
C2901
SC1U6D3V2KX-GP
DY C2901
SC1U6D3V2KX-GP
DY
1 2R2912 2K2R2J-2-GPR2912 2K2R2J-2-GP
1
2
E
C
2
9
0
5
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
DY
E
C
2
9
0
5
S
C
1
0
0
P
5
0
V
2
J
N
-3
G
P
DY
1 AFTP2908AFTP2908
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LANXIN
LANXOUT
VDD10
VDD10
VDD10
VDD10
EVDD10
3D3V_LAN_S5
3D3V_LAN_S5
3D3V_LAN_S5
CARD_3D3V
VDDREGVDD10REGOUT
EVDD10
PCIE_PTX_LANRX_N4_C
PCIE_PTX_LANRX_P4_C
CLK_PCIE_LAN_P4
CLK_PCIE_LAN_N4
LAN_TXP_C_PCH_RXP4
LAN_TXN_C_PCH_RXN4
PCIE_PTX_LANRX_N4_C
LAN_TXP_C_PCH_RXP4
LAN_TXN_C_PCH_RXN4
PCIE_PTX_LANRX_P4_C
LAN_WAKE#
PM_LAN_ENABLE_R
L
A
N
_
E
N
A
B
L
E
_
R
_
C
Q
4
0
2
_
1
PLT_RST#_LAN
PLT_RST#_LAN
SP2
SP1
SP6
SP5
SP3
SP4
SP7
ISOLATE#
ISOLATE#
LANXOUT
LANXIN
ENSWREG
ENSWREG
REGOUT
RSETVDD33/18
CARD_3D3V
VDD33/18
LED3
LED1
LED0
LED_CR
LAN_WAKE#
3D3V_S0
3D3V_LAN_S5 VDDREG
3D3V_S5 3D3V_LAN_S5
3D3V_LAN_S5
3D3V_S0
3D3V_LAN_S5
CARD_3D3V_S0
3D3V_LAN_S5
LAN_MDI1P [31]
LAN_MDI0P [31]
LAN_MDI0N [31]
LAN_MDI1N [31]
LAN_MDI2P [31]
LAN_MDI2N [31]
LAN_MDI3P [31]
LAN_MDI3N [31]
PCIE_PTX_LANRX_N4_C [16]
PCIE_PRX_LANTX_P4 [16]
PCIE_PRX_LANTX_N4 [16]
PCIE_PTX_LANRX_P4_C [16]
CLK_PCIE_LAN_P4 [18]
CLK_PCIE_LAN_N4 [18]
LAN_WAKE#[24]
PM_LAN_ENABLE[24]
CLK_PCIE_LAN_REQ4#[18]
PLT_RST#[17,24,58,65,73]
SD_CD# [33]
MS_CD# [33]
SP2/SD_D0/MS_D1 [33]
SP1/SD1 [33]
SP6/SD_D2/MS_CLK [33]
SP5/SD_D3/MS_D3 [33]
SP3/SD_CLK/MS_D0 [33]
SP4/SD_CMD/MS_D2 [33]
SP7/SD_WP/MS_BS [33]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LOM(RTL8411B)
A3
30 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LOM(RTL8411B)
A3
30 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LOM(RTL8411B)
A3
30 101Friday, June 28, 2013
<Core Design>
X5R
X5R
main: 84.00102.031
2nd: 84.03403.031
Close To Pin 13
Close To Pin 27
Pin12 Pull VCC33 (3D3V_S0)
 Supported RTD3
0110 add CAP
need close to chip
SSID = LOM
0311 modify power railA00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
1 2R3006 0R0603-PAD-2-GP-UR3006 0R0603-PAD-2-GP-U
1
2
C3014
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LAN_SW
C3014
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LAN_SW
1 TP3002 TPAD14-OP-GPTP3002 TPAD14-OP-GP
1 TP3003 TPAD14-OP-GPTP3003 TPAD14-OP-GP
1
2
R3015
15KR2F-GP DY
R3015
15KR2F-GP DY
1
2
C3012
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3012
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
G
S
D
Q3001
2N7002K-2-GP
Q3001
2N7002K-2-GP1 2
R3007
0R0603-PAD-2-GP-U
R3007
0R0603-PAD-2-GP-U
1 2
C3025 SCD1U10V2KX-5GPC3025 SCD1U10V2KX-5GP
1 2
R3022
20KR2F-L-GP
R3022
20KR2F-L-GP
12 R3020 0R0402-PAD-2-GPR3020 0R0402-PAD-2-GP
12 R3017 0R0402-PAD-2-GPR3017 0R0402-PAD-2-GP
12 R3016
0R0402-PAD-2-GP
R3016
0R0402-PAD-2-GP
1
2
C3019
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3019
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C3007
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3007
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
G
DS
Q3004
PA102FMG-GP-U
Q3004
PA102FMG-GP-U
1 TP3004 TPAD14-OP-GPTP3004 TPAD14-OP-GP
4
1 2
3
X3001
XTAL-25MHZ-155-GP
X3001
XTAL-25MHZ-155-GP
1
2
C3017
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3017
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2
C3011
SC15P50V2JN-2-GP
C3011
SC15P50V2JN-2-GP
1
2
C3008
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3008
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C3021
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3021
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C3016
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3016
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R3037
0R0402-PAD-2-GP
R3037
0R0402-PAD-2-GP
12 R3018 0R0402-PAD-2-GPR3018 0R0402-PAD-2-GP
1
2
R3039
10KR2J-3-GP
R3039
10KR2J-3-GP
3
1
2
Q3003
PMBS3904-1-GP
DY
Q3003
PMBS3904-1-GP
DY
12 R3035 0R0402-PAD-2-GPR3035 0R0402-PAD-2-GP
1
2
R3021
10KR2J-3-GP
R3021
10KR2J-3-GP
1
2
C3010
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
LAN_SW
C3010
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
LAN_SW
12
R3038
2K49R2F-GP
R3038
2K49R2F-GP
1
2
C3027
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
DY
C3027
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
DY
1 2
L3010
IND-4D7UH-242-GP
LAN_SW
68.4R71E.10G
L3010
IND-4D7UH-242-GP
LAN_SW
68.4R71E.10G
1
2
R3036
0R2J-2-GPLAN_SW
R3036
0R2J-2-GPLAN_SW
1
2
C3023
S
C
1
U
6
D
3
V
2
K
X
-G
P
C3023
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
3
0
2
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
0
2
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
R3023
100KR2J-1-GPDY
R3023
100KR2J-1-GPDY
1
2
C3018
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C3018
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C3020
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3020
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2
C3026 SCD1U10V2KX-5GPC3026 SCD1U10V2KX-5GP
1 2
R3008
0R0603-PAD-2-GP-U
R3008
0R0603-PAD-2-GP-U
1
2
C3003
SC1U6D3V2KX-GP
C3003
SC1U6D3V2KX-GP
1 2
R3014
1KR2J-1-GP
R3014
1KR2J-1-GP
1
2
C3024
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
LAN_SW
C3024
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
LAN_SW
12 R3019 0R0402-PAD-2-GPR3019 0R0402-PAD-2-GP
1
2
C
3
0
1
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
3
0
1
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
12 R3032 0R0402-PAD-2-GPR3032 0R0402-PAD-2-GP
1
2
C3022
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3022
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 TP3001 TPAD14-OP-GPTP3001 TPAD14-OP-GP
1 2R3034 0R0603-PAD-2-GP-UR3034 0R0603-PAD-2-GP-U
1
2
C3015
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C3015
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
C3005S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DYC3005S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1 2
C3001
SC15P50V2JN-2-GP
C3001
SC15P50V2JN-2-GP
GND 49
AVDD103
AVDD108
AVDD3311
DVDD3312
CARD_3V313
SD_D1 14
SD_D0/MS_D1 15
SD_CLK/MS_D0 16
SD_SMD/MS_D2 17
SD_D3/MS_D3 18
SD_D2/MS_CLK 19
EVDD1020
HSIP21
HSIN22
REFCLK_P23
REFCLK_N24
HSOP25
HSON26
VDD33/1827
SD_WP/MS_BS 28
CLKREQ#29
PERST#30
ISOLATE#31
DVDD3332
DVDD1033
ENSWREG_H 34
VDDREG35
REGOUT 36
LED3 37
LED1/GPO 38LANWAKE#39
LED_CR 40
LED0 41
SD_CD# 42
MS_CD# 43
CKXTAL1 44
CKXTAL2 45
AVDD1046
RSET 47
AVDD3348
MDIP0 1
MDIN0 2
MDIP1 4
MDIN1 5
MDIP2 6
MDIN2 7
MDIP3 9
MDIN3 10
U3001
RTL8411B-CGT-GP
71.08411.D03
U3001
RTL8411B-CGT-GP
71.08411.D03
12 R3033 0R0402-PAD-2-GPR3033 0R0402-PAD-2-GP
1
2
C3009
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LAN_SW
C3009
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LAN_SW
12
3 4
RN3001
SRN10KJ-5-GP
DY
RN3001
SRN10KJ-5-GP
DY
www.qdzbwx.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDO0-
MDO1+
MDO2+
MDO2-
MDO0+
MDO1-
MDO3+
MDO3-
MDO0-
MDO1+
MDO3-
MDO2+
MDO3+
MDO2-
MDO1-
MDO0+
LAN_MDI2P
LAN_MDI2N
LAN_MDI3PM
C
T
MDO0+
MDO0-
MDO1+
MDO1-
MDO2+
MDO2-
MDO3+
MDO3-
MCT1
MCT0
MCT2
MCT3
LAN_MDI3N
L
O
M
_
T
C
T
LAN_MDI0P LAN_MDI0P
LAN_MDI0N LAN_MDI0N
LAN_MDI1P LAN_MDI1P
LAN_MDI1N LAN_MDI1N
LAN_MDI2P
LAN_MDI2N
LAN_MDI3P
LAN_MDI3N
MCT3
MCT2
MCT1
MCT0
LAN_MDI3N[30]
LAN_MDI3P[30]
LAN_MDI2N[30]
LAN_MDI2P[30]
LAN_MDI1N[30]
LAN_MDI1P[30]
LAN_MDI0N[30]
LAN_MDI0P[30]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RJ45+Transformer
A3
31 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RJ45+Transformer
A3
31 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RJ45+Transformer
A3
31 101Friday, June 28, 2013
<Core Design>
Follow Reference Schematic 0.01uF~0.4uF
Layout: 
Place near RJ45
GIGA LAN TransFormer
SSID = LOM
1AFTP3105AFTP3105
1
2
3
4
5
6
7
8
9
10
RJ45
RJ45-8P-118-GP-U
22.10019.141
RJ45
RJ45-8P-118-GP-U
22.10019.141
1
2
C3106
SCD01U16V2KX-3GP
C3106
SCD01U16V2KX-3GP
1AFTP3101AFTP3101
1AFTP3103AFTP3103
1 2
EC3105 SC10P50V2JN-4GPDYEC3105 SC10P50V2JN-4GPDY
1AFTP3104AFTP3104
1
2
3
5
4
6
7
8
9
10
11
12 13
14
15
16
17
18
19
20
21
22
23
24
1:1
1:1
1:1
1:1
XF3101
XFORM-24P-63-GP
68.89240.30D
1:1
1:1
1:1
1:1
XF3101
XFORM-24P-63-GP
68.89240.30D
1 2
EC3104 SC10P50V2JN-4GPDYEC3104 SC10P50V2JN-4GPDY
1 2
EC3103 SC10P50V2JN-4GPDYEC3103 SC10P50V2JN-4GPDY
1 2
EC3102 SC10P50V2JN-4GPDYEC3102 SC10P50V2JN-4GPDY
1 2
EC3101 SC10P50V2JN-4GPDYEC3101 SC10P50V2JN-4GPDY
1 2
EC3106 SC10P50V2JN-4GPDYEC3106 SC10P50V2JN-4GPDY
1234
5 6 7 8
RN3101
SRN75J-1-GP
RN3101
SRN75J-1-GP
3
6
7
8
91
2
4
5
U3102
ESD3V3U4ULC-GP
83.3V3U4.0A0
DY
U3102
ESD3V3U4ULC-GP
83.3V3U4.0A0
DY
1 2
EC3107 SC10P50V2JN-4GPDYEC3107 SC10P50V2JN-4GPDY
3
6
7
8
91
2
4
5
U3101
ESD3V3U4ULC-GP
83.3V3U4.0A0
DY
U3101
ESD3V3U4ULC-GP
83.3V3U4.0A0
DY
1
2
C3101
SC100P3KV8JN-2-GP
78.1013N.1AL
C3101
SC100P3KV8JN-2-GP
78.1013N.1AL
1AFTP3107AFTP3107
1AFTP3102AFTP3102
1AFTP3108AFTP3108
1 2
EC3108 SC10P50V2JN-4GPDYEC3108 SC10P50V2JN-4GPDY
1AFTP3106AFTP3106
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SP1/SD1
SP2/SD_D0/MS_D1
SP3/SD_CLK/MS_D0
SP4/SD_CMD/MS_D2
SP5/SD_D3/MS_D3
SP6/SD_D2/MS_CLK
SP7/SD_WP/MS_BS
SP1/SD1
SP2/SD_D0/MS_D1
SP3/SD_CLK/MS_D0
SP4/SD_CMD/MS_D2
SP5/SD_D3/MS_D3
SP6/SD_D2/MS_CLK
SP7/SD_WP/MS_BS
CARD_3D3V_S0 CARD_3D3V_S0
SP6/SD_D2/MS_CLK [30]
SP7/SD_WP/MS_BS [30]
SP5/SD_D3/MS_D3 [30]
MS_CD# [30]
SP2/SD_D0/MS_D1[30]
SP1/SD1[30]
SP6/SD_D2/MS_CLK[30]
SP7/SD_WP/MS_BS[30]
SP4/SD_CMD/MS_D2[30]
SP3/SD_CLK/MS_D0[30]
SP5/SD_D3/MS_D3[30]
SD_CD#[30]
SP3/SD_CLK/MS_D0 [30]
SP4/SD_CMD/MS_D2 [30]
SP2/SD_D0/MS_D1 [30]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Card Reader CONN
A3
33 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Card Reader CONN
A3
33 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Card Reader CONN
A3
33 101Friday, June 28, 2013
<Core Design>
SSID = SDIO
Reserve EMI Cap, 0107 CLK Cap DY
Close To Pin11 SD_VCC
Close To Pin 4 MS_VCC
layout note:
EC3305 need colse to chip
1
2
E
C
3
3
0
5
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
E
C
3
3
0
5
S
C
4
D
7
P
5
0
V
2
BN
-G
P
DY
1AFTP3307AFTP3307
1 AFTP3309AFTP3309
1
2
C3302
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
C3302
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
1AFTP3306AFTP3306
1
2
C3303
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3303
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1AFTP3308AFTP3308
1AFTP3302AFTP3302
1
2
E
C
3
3
0
6
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
E
C
3
3
0
6
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
1AFTP3301AFTP3301
1AFTP3303AFTP3303
1AFTP3305AFTP3305
1
2
E
C
3
3
0
4
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
E
C
3
3
0
4
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
1
2
C3304
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3304
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
E
C
3
3
0
1
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
E
C
3
3
0
1
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
SD_DAT21
MS_VSS 2
SD_CD/DAT3/MMC_RSV3
MS_VCC4
MS_SCLK 5
SD_CMD/MMC_CMD6
MS_DATA3 7
MS_INS 8
SD_VSS/MMC_VSS1 9
MS_DATA2 10
SD_VDD/MMC_VDD11 MS_DATA0 12
MS_DATA1 13
SD_SLK/MMC_CLK14
MS_BS 15
MS_VSS 16
SD_VSS/MMC_VSS2 17
SD_DAT0/MMC_DAT18
SD_DAT119
SD_CD20
SD_GND 21
SD_WP/SW22
GND 23
GND 24
NP1NP1
NP2NP2
CARD1
CARDBUS22P-SKT-2-GP-U
62.10051.H21
CARD1
CARDBUS22P-SKT-2-GP-U
62.10051.H21
1
2
E
C
3
3
0
2
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
E
C
3
3
0
2
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
1
2
E
C
3
3
0
7
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
E
C
3
3
0
7
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
1AFTP3304AFTP3304
1
2
E
C
3
3
0
3
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
E
C
3
3
0
3
S
C
4
D
7
P
5
0
V
2
B
N
-G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB30_TXDN0_R
USB30_TXDP0_R
USB30_TXDP0_C
USB30_TXDN0_C
USB30_RXDP0_C
USB30_RXDN0_C
USB20_DP1_C
USB20_DN1_C
USBDET1#
USB30_RXDN0_C
USB30_RXDP0_C
USB30_TXDP0_C
USB30_TXDN0_C
USB30_RXDN0_C
USB30_RXDP0_C
USB30_TXDN1_R
USB30_TXDP1_R
USB20_DP0_C
USB20_DN0_C
USB30_RXDN1_C
USB30_TXDN1_C
USB30_TXDP1_C
USB30_RXDP1_C
USB30_TXDP1_C
USB30_TXDN1_C
USB30_RXDN1_C
USB30_RXDP1_C
USB30_TXDP1_C
USB30_TXDN1_C
USB30_RXDP1_C
USB30_RXDN1_C
USB20_DP0_C
USB20_DN0_C
USB20_DP1_C
USB20_DN1_C
USB20_DP0_C
USB20_DN0_C
USB20_DN1_C
USB30_TXDP0_C
USB30_TXDN0_C
USB20_DP1_C
USB20_DP1_C
USB20_DN1_C
USB20_DP0_C
USB20_DN0_C
USB30_VCCA
USB30_VCCA
USB30_VCCB
USB30_VCCB
USBDET_CON# [24]
USB3_PTX_CRX_N0[16]
USB3_PRX_CTX_N0[16]
USB3_PTX_CRX_P0[16]
USB3_PRX_CTX_P0[16]
USB3_PTX_CRX_N1[16]
USB3_PRX_CTX_N1[16]
USB3_PTX_CRX_P1[16]
USB3_PRX_CTX_P1[16]
USB_PN1_R[35]
USB_PP1_R[35]
USB_PP0[16]
USB_PN0[16]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
USB3.0(1)
A3
34 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
USB3.0(1)
A3
34 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
USB3.0(1)
A3
34 101Friday, June 28, 2013
<Core Design>
SSID = USB
USB3.0 Port1 with power share
USB3.0 Port2
X01 0321
X02 stuff TR3412
X02 stuff TR3403
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
1 2
C3402
SCD1U10V2KX-5GP
C3402
SCD1U10V2KX-5GP
1
2
3
4
5
6
7
8
9
10
11 12
13CHASSIS CHASSIS
CHASSISCHASSIS
USB2
SKT-USB13-32-GP-U
22.10341.531
CHASSIS CHASSIS
CHASSISCHASSIS
USB2
SKT-USB13-32-GP-U
22.10341.531
1 2R3406
0R0402-PAD-2-GP
R3406
0R0402-PAD-2-GP
1 2R3423
0R0402-PAD-2-GP
R3423
0R0402-PAD-2-GP
1AFTP3405AFTP3405
1 2
C3407
SCD1U10V2KX-5GP
C3407
SCD1U10V2KX-5GP
1 2
34
TR3412
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
TR3412
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
1
2
3
4 5
6
7
8
U3401
AZ1065-06Q-GP
83.01065.0AJ
U3401
AZ1065-06Q-GP
83.01065.0AJ
1AFTP3406AFTP3406
1 2
34
TR3403
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
TR3403
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
1 2R3407
0R0402-PAD-2-GP
R3407
0R0402-PAD-2-GP
1 2R3441
0R0402-PAD-2-GP
R3441
0R0402-PAD-2-GP
1 2
C3401
SCD1U10V2KX-5GP
C3401
SCD1U10V2KX-5GP
1 2
C3409
SCD1U10V2KX-5GP
C3409
SCD1U10V2KX-5GP
1AFTP3402AFTP3402
1 AFTP3401AFTP3401
1 2R3405
0R0402-PAD-2-GP
R3405
0R0402-PAD-2-GP
1AFTP3408AFTP3408
1
2
3
4 5
6
7
8
U3403
AZ1065-06Q-GP
83.01065.0AJ
U3403
AZ1065-06Q-GP
83.01065.0AJ
1 2
R3402
0R0402-PAD-2-GP
R3402
0R0402-PAD-2-GP
1 AFTP3404AFTP3404
1 2R3404
0R0402-PAD-2-GP
R3404
0R0402-PAD-2-GP
1AFTP3403AFTP3403
1AFTP3407AFTP3407
1 2R3424
0R0402-PAD-2-GP
R3424
0R0402-PAD-2-GP
VBUS1
D-2
D+3
GND 4
GND_DRAIN 7
STDA_SSRX- 5
STDA_SSRX+ 6
STDA_SSTX- 8
STDA_SSTX+ 9
1010
1111
1212
1313
USB1
SKT-USB13-144-GP
22.10339.W31
USB1
SKT-USB13-144-GP
22.10339.W31
1 2R3415
0R0402-PAD-2-GP
R3415
0R0402-PAD-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SB#
SEL
USBCHG_EN_R
USBCHG_EN#
USBCHG_EN#
USB30_VCCB5V_S5
USB30_VCCD
USB30_VCCC
5V_S5
5V_S5 USB30_VCCA
5V_S5
5V_S5
5V_S5
USB_OC#0_1 [16]
USB_PWR_EN#[24]
USB_OC#2_3 [16]
USB_PWR_EN#[24]
USB_OC#0_1 [16]
USBCHG_EN[24]
USB_PP1_R [34]
USB_PN1_R [34]USBCHARGER_CB0[24]
USB_PP1[16]
USB_PN1[16]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
USB Power SW
35 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
USB Power SW
35 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
USB Power SW
35 101Friday, June 28, 2013
<Core Design>
SSID = USB
If MLCC is used as Main Source.
Inform Layout team to remark Pin 1 as positive.
In case MLCC shortage and other type of Cap With Polarity Is Used.
0319 modify USB Charger circuit
If MLCC is used as Main Source.
Inform Layout team to remark Pin 1 as positive.
In case MLCC shortage and other type of Cap With Polarity Is Used.
Silergy
DII (Diodes)
GMT
SY6288DCAC
AP2301MPG-13
G547I2P81U
74.06288.A79
74.02301.071
74.00547.F79
1ST
2ND
3RD
Priority
USB Power SW (U3504)
Vendor Vendor P/N Wistron P/N
A00 0618
A00 0618
1
2
R3503
100KR2J-1-GP
R3503
100KR2J-1-GP
1
2
C3507S
C
1
U
6
D
3
V
2
K
X
-G
P
C3507S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C3504
SC100U6D3V6MX-GP
78.10710.52L
C3504
SC100U6D3V6MX-GP
78.10710.52L
1
2
C3501S
C
1
U
6
D
3
V
2
K
X
-G
P
C3501S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
R3501
100KR2J-1-GP
R3501
100KR2J-1-GP
GND1
IN2
EN1#3
EN2#4 FLG2 5
OUT2 6
OUT1 7
FLG1 8
U3503
AP2182SG-13-GP
74.02182.071
U3503
AP2182SG-13-GP
74.02182.071
GND1
VIN2
VIN3
EN#4 OC# 5
VOUT#6 6
VOUT#7 7
VOUT#8 8
U3504
UP7534QRA8-15-GP
74.07534.C79
2nd = 74.06288.A79
3rd = 74.02000.B71
U3504
UP7534QRA8-15-GP
74.07534.C79
2nd = 74.06288.A79
3rd = 74.02000.B71
G
S
D
Q3502
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q3502
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
1
2
C3503S
C
1
U
6
D
3
V
2
K
X
-G
P
C3503S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
R3504
10KR2J-3-GP
DY
R3504
10KR2J-3-GP
DY
1
2
C3502S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3502S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C3506
SC100U6D3V6MX-GP
78.10710.52L
C3506
SC100U6D3V6MX-GP
78.10710.52L
1 2R3505
0R0402-PAD-2-GP
R3505
0R0402-PAD-2-GP
1
2
C3511S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3511S
C
D
1
U
1
0
V
2
K
X
-5
G
P
GND1
VIN2
VIN3
EN#4 OC# 5
VOUT#6 6
VOUT#7 7
VOUT#8 8
U3502
UP7534QRA8-15-GP
74.07534.C79
2nd = 74.06288.A79
3rd = 74.02000.B71
U3502
UP7534QRA8-15-GP
74.07534.C792nd = 74.06288.A79
3rd = 74.02000.B71
1
2
C3512S
C
1
U
6
D
3
V
2
K
X
-G
P
C3512S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
3
5
0
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
3
5
0
5
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2R3502
0R0402-PAD-2-GP
R3502
0R0402-PAD-2-GP
INT 1
D- 2
D+ 3
SEL 4
GND9
SB/8
Y-7
Y+6
VDD5
U3501
PI5USB1458AZAEX-GP
74.51458.073
U3501
PI5USB1458AZAEX-GP
74.51458.073
1
2
C3510S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C3510S
C
D
1
U
1
0
V
2
K
X
-5
G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3V_5V_S0_EN
CT2
CT1
PS_S3CNTRL
5V_S5
5V_S0
3D3V_S5
3D3V_S0
5V_S5
3D3V_AUX_S5
3D3V_S0
S5_ENABLE [24]
PURE_HW_SHUTDOWN# [24,26,76]
3V_5V_EN[45]
PM_SLP_S3#[17,24,48,49,51]
1D05V_VTT_PWRGD[7,48]
1D35V_VTT_PWRGD[49]
PCH_PWROK[17,24,26]
ALL_SYS_PWRGD [24]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Plane Enable
A3
36 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Plane Enable
A3
36 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Plane Enable
A3
36 101Friday, June 28, 2013
<Core Design>
ROSA Run Power
SSID = Reset.Suspend
Power Good
G
D G
D
S
S
3D3V_S0 Comsumption
Peak current 3A
5V_S0 Comsumption
Peak current 4.033A
5V_S0
3D3V_S0
A00 0618
A00 0618
1 2 3
456
Q3603
2N7002KDW-GP
84.2N702.A3F
DY Q36032N7002KDW-GP
84.2N702.A3F
DY
1
2
R3602
200KR2J-L1-GP DY
R3602
200KR2J-L1-GP DY
12 R3611 0R0402-PAD-2-GPR3611 0R0402-PAD-2-GP
1
2
C
3
6
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
3
6
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
12 R3609
0R0402-PAD-2-GP
R3609
0R0402-PAD-2-GP
12 R3610 0R0402-PAD-2-GPR3610 0R0402-PAD-2-GP
VIN1#11
VIN1#22
ON13
VBIAS4
ON25
VIN2#66
VIN2#77 VOUT2#8 8
VOUT2#9 9
CT2 10
GND 11
CT1 12
VOUT1#13 13
VOUT1#14 14
GND 15
U3601
TPS22966DPUR-GP
74.22966.093
U3601
TPS22966DPUR-GP
74.22966.093
1
2
C
3
6
0
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
3
6
0
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P1
2
C
3
6
0
1
S
C
4
7
0
P
5
0
V
2
K
X
-3
G
P
C
3
6
0
1
S
C
4
7
0
P
5
0
V
2
K
X
-3
G
P
1 2
R3603
1KR2J-1-GP
R3603
1KR2J-1-GP
1
2
R3601
1KR2J-1-GP
R3601
1KR2J-1-GP
1
2
C
3
6
0
2
S
C
4
7
0
P
5
0
V
2
K
X
-3
G
P
C
3
6
0
2
S
C
4
7
0
P
5
0
V
2
K
X
-3
G
P
1 2
R3607
100KR2J-1-GP
DY
R3607
100KR2J-1-GP
DY
1
2
3
D3602
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
D3602
BAS16-6-GP
2ND = 83.00016.F11
83.00016.K11
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V_VREF_PATH3
M_VREF_CA_DIMMA
M_VREF_CA_DIMMB
0D675V_VTTREF 1D35V_S3
+V_SM_VREF_CNT[5]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
S3 Power Reduction
A3
37 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
S3 Power Reduction
A3
37 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
S3 Power Reduction
A3
37 101Friday, June 28, 2013
<Core Design>
Close to DIMM
S3 Power Reduction Circuit PM_DRAM_PWRGD
SSID = Reset.Suspend
SODIMM1
SODIMM2
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
Layout Note:
Place Close SO-DIMMA.
1
2
R3703
1K8R2F-GP
R3703
1K8R2F-GP
1 2
R3704
0R2J-2-GP
DY
R3704
0R2J-2-GP
DY
1
2
C3701
SCD022U16V2JX-GP
C3701
SCD022U16V2JX-GP
1
2
R3706
1K8R2F-GP
R3706
1K8R2F-GP
1
2
R3705
0R0402-PAD-2-GP
R3705
0R0402-PAD-2-GP
1
2
R3707
24D9R2F-L-GP
R3707
24D9R2F-L-GP
1 2R3708
2R2F-GP
R3708
2R2F-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DS3_PWRCTL
3D3V_S5 3D3V_S5_PCH
3D3V_S5
3D3V_S5_PCH
PM_SLP_SUS#[17,24]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DSW
A3
38 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DSW
A3
38 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DSW
A3
38 101Friday, June 28, 2013
<Core Design>
SSID = Reset.Suspend
A00 0618
1 2R3802
0R0402-PAD-2-GP
R3802
0R0402-PAD-2-GP
GND1
IN#22
IN#33
EN/EN#4 OCB 5
OUT#6 6
OUT#7 7
OUT#8 8
U3801
SY6288CCAC-GP
DS3
74.06288.079
U3801
SY6288CCAC-GP
DS3
74.06288.079
1
2
C
3
8
0
1
S
C
D
4
7
U
1
6
V
2
Z
Y
-G
P
DS3
C
3
8
0
1
S
C
D
4
7
U
1
6
V
2
Z
Y
-G
P
DS3
1
2
C
3
8
0
2
S
C
D
4
7
U
1
6
V
2
Z
Y
-G
P
DS3
C
3
8
0
2
S
C
D
4
7
U
1
6
V
2
Z
Y
-G
P
DS3
1 2
R3801
0R3J-0-U-GP
Non DS3
R3801
0R3J-0-U-GP
Non DS3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DC_IN_C
PS_ID_R
PSID_DISABLE#_R_C
PS_ID
PQ3802_1
PS_ID_R2
AD_OFF_L
AD_OFF_R
PQ3808G
PQ3808D
BAT_IN#
PQ3807D
PWR_CHG_AD_OFF_R
PQ4206_3
AC_IN#_G
JGND
JGND
AD++DC_IN
3D3V_S5
5V_S5
3D3V_S5
3D3V_S5
JGND
PSID_EC [24]
BAT_IN# [24,43,44]
H_PROCHOT#[4,24,44,46]
PWR_CHG_AD_OFF[24]
AC_IN_KBC#[24]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DCIN
A3
42 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DCIN
A3
42 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DCIN
A3
42 101Friday, June 28, 2013
<Core Design>
Layout Note:
Id=-9.6A
Qg=-25nC
Rdson=18~30mohm
PSID Layout width > 25mil
SSID = PWR.Support
DT MODE
0103 Add EC4203
ndde close to EL4202
A00 0618
A00 0619
1
AFTP4205AFTP4205
1 2
PR4217
1KR2J-1-GP
DY
PR4217
1KR2J-1-GP
DY
1
2
PR4202
15KR2F-GP
PR4202
15KR2F-GP
12
3
PD4203
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
PD4203
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
E
B
C
R1
R2
PQ4204
PDTC124EU-1-GP
84.00124.H1K
2nd = 84.05124.011
R1
R2
PQ4204
PDTC124EU-1-GP
84.00124.H1K
2nd = 84.05124.011
1 2
PC4207
SC1U6D3V2ZY-GP
DY
PC4207
SC1U6D3V2ZY-GP
DY
1 2
EL4203
PAD-2P-4516-GP-U
EL4203
PAD-2P-4516-GP-U
1
2
P
C
4
2
0
1
S
C
1
U
2
5
V
5
K
X
-1
G
P
P
C
4
2
0
1
S
C
1
U
2
5
V
5
K
X
-1
G
P
1 2
PR4212
1KR2J-1-GP
PR4212
1KR2J-1-GP
1
2
P
C
4
2
0
5
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
P
C
4
2
0
5
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
1
2
3
4 5
6
7
8S
S
S
G D
D
D
D
PU4201
SI7121DN-T1-GE3-GP
S
S
S
G D
D
D
D
PU4201
SI7121DN-T1-GE3-GP
1
2
P
C
4
2
0
8
S
C
1
U
2
5
V
3
K
X
-1
-G
P
DYPC
4
2
0
8
S
C
1
U
2
5
V
3
K
X
-1
-G
P
DY
1
2
3 4
5
6
PQ4206
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3FPQ4206
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
K
A
PD4201
1SMB22AT3G-GP-U1
83.22R03.03G
PD4201
1SMB22AT3G-GP-U1
83.22R03.03G
G
S
D
PQ4208
2N7002K-2-GP
84.2N702.J31
DY
PQ4208
2N7002K-2-GP
84.2N702.J31
DY
1
2
PC4202
SCD1U25V3KX-GP
PC4202
SCD1U25V3KX-GP
E
B
C
R1
R2
PQ4205
PDTA124EU-1-GP
84.00124.K1K
2nd = 84.05124.A11
R1
R2
PQ4205
PDTA124EU-1-GP
84.00124.K1K
2nd = 84.05124.A11
1
2P
R
4
2
0
9
2
4
0
K
R
3
-G
P
P
R
4
2
0
9
2
4
0
K
R
3
-G
P
12
EL4202
PAD-2P-4516-GP-U
EL4202
PAD-2P-4516-GP-U
1
2
PR4203
10KR2J-3-GP
PR4203
10KR2J-3-GP
1 AFTP4204AFTP4204
12
PR4218
100KR2J-1-GP
DY
PR4218
100KR2J-1-GP
DY
1
2
E
C
4
2
0
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
E
C
4
2
0
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
G
SDD
PQ4201
FDV301N-NL-GP
84.00301.A31
2nd = 84.3K329.031
D
PQ4201
FDV301N-NL-GP
84.00301.A31
2nd = 84.3K329.031
1
2
E
C
4
2
0
1
S
C
1
0
U
2
5
V
5
K
X
-G
P
DY
E
C
4
2
0
1
S
C
1
0
U
2
5
V
5
K
X
-G
P
DY
1
2
PR4215
100KR2J-1-GP
PR4215
100KR2J-1-GP
12
3
PD4204
PESD24VS2UT-GP
DY PD4204
PESD24VS2UT-GP
DY
1
2
PR4216
3K3R6J-GP
PR4216
3K3R6J-GP
1 2
EL4201
PAD-2P-4516-GP-U
EL4201
PAD-2P-4516-GP-U
1 2
EC4203
SCD1U50V5JX-1-GP
DY
EC4203
SCD1U50V5JX-1-GP
DY
1
2
PR4206
2K2R2J-2-GP
PR4206
2K2R2J-2-GP
1
2
P
C
4
2
0
6
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
2
0
6
S
C
1
0
U
2
5
V
5
K
X
-G
P
1 2PR4219
0R0603-PAD-2-GP-U
PR4219
0R0603-PAD-2-GP-U
1 2
PR4208
33R2J-2-GP
DY
PR4208
33R2J-2-GP
DY
1
2
3 4
5
6
PQ4203
DMN66D0LDW-7-GP
DY
PQ4203
DMN66D0LDW-7-GP
DY
1 2
PR4207
33R2J-2-GP
PR4207
33R2J-2-GP
1
2
PC4209
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
PDY
PC4209
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
PDY
3
1
2
PQ4202
PMBS3904-1-GP
84.03904.L06
2nd = 84.03904.P11
PQ4202
PMBS3904-1-GP
84.03904.L06
2nd = 84.03904.P11
1
2
3
4
5
7
NP1
NP2
6
DCIN1
ACES-CON5-27-GP
20.F2182.005
DCIN1
ACES-CON5-27-GP
20.F2182.005
1
2
PR4210
47KR3J-L-GP
PR4210
47KR3J-L-GP
1
2
PR4213
10KR2J-3-GPDY
PR4213
10KR2J-3-GPDY
1 AFTP4203AFTP4203
1
2
PR4214
100KR2J-1-GP
PR4214
100KR2J-1-GP
1
2
PR4211
100KR2J-1-GP
PR4211
100KR2J-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BT+
PBAT_PRES1#
PBAT_SMBCLK1
PBAT_SMBDAT1
BAT_SCLBAT_IN# BAT_SDA
SYS_PRES1#
PBAT_SMBCLK1
PBAT_SMBDAT1
PBAT_PRES1#
SYS_PRES1#
3D3V_AUX_KBC
BT+
BAT_SDA[24,44,53]
BAT_SCL[24,44,53]
BAT_IN#[24,42,44]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
BATT CONN
A3
43 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
BATT CONN
A3
43 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
BATT CONN
A3
43 101Friday, June 28, 2013
<Core Design>
Battery CONN
SSID = PWR.Support
Place near Battery CONN
Layout Note:
0109 DY PD4301~4303
1
2
E
C
4
3
0
1
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
E
C
4
3
0
1
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
1AFTP4303AFTP4303
1
2
E
C
4
3
0
3
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
E
C
4
3
0
3
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
1
2
EC4304
SC2200P50V2KX-2GPDY
EC4304
SC2200P50V2KX-2GPDY
1 2
3
PD4302
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
PD4302
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
1
2
3
4 5
6
7
8
RN4301
SRN100J-4-GP
RN4301
SRN100J-4-GP
1 2
3
PD4301
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
PD4301
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
1
2
E
C
4
3
0
2
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
E
C
4
3
0
2
S
C
1
0
P
5
0
V
2
J
N
-4
G
P
DY
1AFTP4301AFTP4301
1AFTP4302AFTP4302
1AFTP4305AFTP4305
1 2
R4303
0R0402-PAD-2-GP
R4303
0R0402-PAD-2-GP
1
2
3
4
5
6
8
7
10
9
BATT1
SYN-CON8-28-GP
20.82045.008
BATT1
SYN-CON8-28-GP
20.82045.008
1 2
3
PD4303
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
PD4303
BAV99-12-GP
75.00099.E7D
2nd = 75.03101.07D
1AFTP4304AFTP4304
1
2
C4301
SCD1U50V3KX-GP DY
C4301
SCD1U50V3KX-GP DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P
W
R
_
C
H
G
_
A
C
N
PWR_CHG_SRP_R
PWR_CHG_SRN
PWR_CHG_SRP
PWR_CHG_SRN_R
BATDRV
PWR_CHG_BTST
PWR_CHG_ACDET
PWR_CHG_REGN
PWR_CHG_PHASE
PWR_CHG_HIDRV
PWR_CHG_BTST1
P
W
R
_
C
H
G
_
A
C
P
PWR_CHG_LODRV
P
W
R
_
C
H
G
_
A
C
N
PWR_CHG_CMSRC
PWR_CHG_BATDRV
PWR_CHG_ACOK
PWR_SDA
PWR_SCL
BQ24715_IOUT_1
PWR_CHG_1
PQ4406_D
PWR_CHG_CMPOUT
P
W
R
_
C
H
G
_
C
M
P
IN
BQ24715_IOUT_1
D
C
B
A
T
O
U
T
+
V
C
H
G
R
_
R
+
V
C
H
G
R
PU4401_4
P
U
4
4
0
1
_
5
PU4401_6BOOST_MON_1
D
C
B
A
T
O
U
T
_
R
CHARGER_CELL_PIN
D
C
_
IN
_
D
A
D
+
_
G
_
1ACAV_IN
AD+_G_2
P
U
4
4
0
2
_
1
IN
-
PU4402_1IN+
PQ4406_G
D
IS
_
D
T
M
_
C
E
L
L
ACAV_IN
DCBATOUT_SNUB
BATDRV
P
W
R
_
C
H
G
_
A
C
P
PQ4411_D1PWR_CHG_CMPIN
PWR_CHG_CMPINPQ4411_D2
PD4403_A
PQ4405_2
P
Q
4
4
0
8
_
E
PQ4408_C
PQ4405_3
PQ4405_5
P
W
R
_
C
H
G
_
A
C
O
K
P
Q
4
4
0
5
_
6
PD4403_K
PWR_CHG_VCC
DIS_DTM_CELLPQ4413_2
CHARGER_CELL_PIN
CHARGER_CELL_PIN
PQ4412_2
PWR_CHG_CMPOUT PQ4413_5
PWR_CHG_ACOK
PQ4413_3
PWR_CHG_REGN
3D3V_AUX_S53D3V_S5
BQ24715_AGND
BQ24715_AGND
BQ24715_AGND
AD+
BQ24715_AGND
BQ24715_AGND
CHARGER_SRC+SDC_IN
CHARGER_SRC
5V_S5
3D3V_AUX_S5
DCBATOUT
AD+
AD+
BQ24715_AGND
+SDC_IN
3D3V_AUX_S5
BQ24715_AGND
BT+
3D3V_S5
DCBATOUT
BQ24715_AGND BQ24715_AGND
+VCHGR
BT+
BQ24715_AGND
AD+
15V_S5
3D3V_S5
DCBATOUT
PWR_CHG_REGN
PWR_CHG_REGN
5V_S5
PWR_CHG_REGN
5V_S5
DCBATOUT
BQ24715_AGND
PWR_CHG_REGN
3D3V_AUX_S5
5V_S5
AD_IA[24]
BAT_SCL[24,43,53]
BAT_SDA[24,43,53]
BOOST_MON[24]
H_PROCHOT#[4,24,42,46]
BAT_IN# [24,42,43]
AD_IA_HW [24]AD_IA_HW2[24]
H_PROCHOT# [4,24,42,46]
DIS_DTM[24]
AC_IN#[24]
H_PROCHOT# [4,24,42,46]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
X02
CHARGE(BQ24715)
Custom
44 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
X02
CHARGE(BQ24715)
Custom
44 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
X02
CHARGE(BQ24715)
Custom
44 101Friday, June 28, 2013
<Core Design>
CHECK PM ADAPTER TYPE
And setting adapter type
CHECK PM BATTERY TYPE
CHECK CELL for DT mode
CHECK EE
follow custormer circuits.
KBC FOR DT MODE
CHECK EE PULL HIGH
BATTERY MON
Close PR4443
CHECK EE
VacDET=2.4V
Acok setting=2.4*((PR4444+PR4411)/PR4411)
Setting=18.178v
DIS_DTM:
H= cell is plus to GND. (reset charger ic)
L=nornal
ACAV_IN
H=ACIN
L=UNAC
DIS_DTM_HW:
PWR_CHG_REGN=6V
V+=6*(PR4440/(PR4441+PR4440))=3.27V
Setting=3.27*((PR4442+PR4447)/PR4447)=9V
Follow custormer circuits
PWR_CHG_ACOK:
PWR_CHG_REGN=6V
V+=6*(PR4404/(PR4410+PR4404))=3.27V
H L
L
L
SETTING
1.099V
0.862329V
0.659648V
90W
65W
45W
ADAPTER TYPE AD_IA_HW AD_IA_HW_2
H
L
PWR_CHG_CMPIN:
V-=3.3*(PR4402/(PR4428+PR4402))=1.1099V
 (AD_IA_HW)
 (AD_IA_HW_2)
PU4406 and PU4407:
main source: 84.03660.037
SSID = Charger
Follow custormer circuits
A00 0618
A00 0618
A00 0618
1
2
P
C
4
4
0
8
S
C
1
U
2
5
V
3
K
X
-1
-G
P
P
C
4
4
0
8
S
C
1
U
2
5
V
3
K
X
-1
-G
P
1 2
PR4424
20KR2F-L-GP
PR4424
20KR2F-L-GP
1 2PR4406 0R0402-PAD-2-GPPR4406 0R0402-PAD-2-GP
1 2
PR4436
220KR2F-GP
PR4436
220KR2F-GP
1 2PR4426
D01R3721F-GP-U
PR4426
D01R3721F-GP-U
1 2
PR4457
0R0402-PAD-2-GP
PR4457
0R0402-PAD-2-GP
1 2
PR4403 10R5J-GPPR4403 10R5J-GP
1
2
PR4433
1MR2J-1-GP DY
PR4433
1MR2J-1-GP DY
1
2
3
45
6
7
8 S
S
S
GD
D
D
D
PU4405
SI7121DN-T1-GE3-GP
84.06675.030
2nd = 84.07121.037
S
S
S
GD
D
D
D
PU4405
SI7121DN-T1-GE3-GP
84.06675.030
2nd = 84.07121.037
1
2
P
R
4
4
3
1
1
0
0
K
R
2
F
-L
1
-G
P
DY
P
R
4
4
3
1
1
0
0
K
R
2
F
-L
1
-G
P
DY
1 2
PR4443
D01R2512F-3-GP
PR4443
D01R2512F-3-GP
1
2 P
C
4
4
0
6
S
C
3
3
0
P
5
0
V
3
K
X
-G
P
DY
P
C
4
4
0
6
S
C
3
3
0
P
5
0
V
3
K
X
-G
P
DY
ACN
1
ACP
2
CMSRC3
ACDRV
4
ACOK
5
ACDET
6
IOUT
7
SDA
8
SCL
9
CELL
10
BATDRV#
11
SRN
12
SRP
13
GND
14
LODRV
15
REGN
16
BTST
17
HIDRV
18
PHASE
19
VCC
20
G
N
D
2
1
PU4404
BQ24717RGRR-GP
PU4404
BQ24717RGRR-GP
1
2
3 4
5
6
PQ4411
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3FPQ4411
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
1
2
P
C
4
4
1
7
S
C
1
U
2
5
V
3
K
X
-1
-G
P
P
C
4
4
1
7
S
C
1
U
2
5
V
3
K
X
-1
-G
P
1
2
P
C
4
4
2
6
S
C
1
0
0
P
5
0
V
2
JN
-3
G
P
P
C
4
4
2
6
S
C
1
0
0
P
5
0
V
2
JN
-3
G
P
A K
PD4405
PAD-2P-330056-GP
PD4405
PAD-2P-330056-GP
12PR4413
0R0402-PAD-2-GP
PR4413
0R0402-PAD-2-GP
1
2
PR4450
10KR2F-2-GP
PR4450
10KR2F-2-GP
1
2
P
C
4
4
1
6
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
P
C
4
4
1
6
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
PR4458
0R0402-PAD-2-GP
PR4458
0R0402-PAD-2-GP
1
2
3
4 5
6
7
8S
S
S
G D
D
D
D
PU4403
FDMC6675BZ-GP-U
84.06675.030
2nd = 84.07121.037
S
S
S
G D
D
D
D
PU4403
FDMC6675BZ-GP-U
84.06675.030
2nd = 84.07121.037
1
2
PC4433
SCD1U25V2KX-GP
PC4433
SCD1U25V2KX-GP
1 2
PR4425
0R3J-0-U-GP
PR4425
0R3J-0-U-GP
1
2
3 4
5
6
PQ4405
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3FPQ4405
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
1
2
PC4424
S
C
D
0
1
U
2
5
V
2
K
X
-3
G
P
DY PC4424
S
C
D
0
1
U
2
5
V
2
K
X
-3
G
P
DY
1
2
P
R
4
4
6
0
1
0
0
K
R
2
F
-L
1
-G
P
DY
P
R
4
4
6
0
1
0
0
K
R
2
F
-L
1
-G
P
DY
1
2
P
C
4
4
1
9
S
C
D
0
1
U
2
5
V
2
K
X
-3
G
P
P
C
4
4
1
9
S
C
D
0
1
U
2
5
V
2
K
X
-3
G
P
1
2
P
R
4
4
6
4
1
0
0
K
R
2
F
-L
1
-G
P
DY
P
R
4
4
6
4
1
0
0
K
R
2
F
-L
1
-G
P
DY
1
2
3
4
5
6
7
8
9
10
PU4406
FDMS3600-02-RJK0215-COLAY-GP
ZZ.00215.037
DY
PU4406
FDMS3600-02-RJK0215-COLAY-GP
ZZ.00215.037
DY
1
2
PC4420
SC1U25V3KX-1-GP
DY PC4420
SC1U25V3KX-1-GP
DY
1
2
PR4432
3K3R2J-3-GP DY
PR4432
3K3R2J-3-GP DY
1 2
PR4445
0R0402-PAD-2-GP
PR4445
0R0402-PAD-2-GP
1
2
PC4414
SCD47U6D3V2KX-1-GP
DY PC4414
SCD47U6D3V2KX-1-GP
DY
1 2PC4422
SC1U25V3KX-1-GP
PC4422
SC1U25V3KX-1-GP
1
2
3 4
5
6
PQ4407
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
PQ4407
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
K
A
PD4401
1PS76SB40-GP-U
83.1PS76.01F
PD4401
1PS76SB40-GP-U
83.1PS76.01F
1
2
P
G
4
4
0
7
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
4
0
7
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2
PR4407
6D8R2F-GP
PR4407
6D8R2F-GP
1 2
PC4415
SCD1U25V2KX-GP
PC4415
SCD1U25V2KX-GP
12PG4401 GAP-CLOSE-PWR-3-GPPG4401 GAP-CLOSE-PWR-3-GP
1
2
P
R
4
4
1
5
3
3
K
R
2
F
-G
P
DY
P
R
4
4
1
5
3
3
K
R
2
F
-G
P
DY
1
2
P
R
4
4
3
4
1
5
0
K
R
2
F
-L
-G
P
DY
P
R
4
4
3
4
1
5
0
K
R
2
F
-L
-G
P
DY
1 2
PR4401
357KR2F-GP
PR4401
357KR2F-GP
1
2
P
R
4
4
3
5
1
0
0
K
R
2
J-
1
-G
P
P
R
4
4
3
5
1
0
0
K
R
2
J-
1
-G
P
1
2
PC4401
SCD1U25V2KX-GP
PC4401
SCD1U25V2KX-GP
12
PC4428
SCD1U25V2KX-GP
PC4428
SCD1U25V2KX-GP
3
1
2
PQ4408
PMBS3906-GP
84.03906.F11
PQ4408
PMBS3906-GP
84.03906.F11
1
2
PR4459
0R2J-2-GP
DYPR4459
0R2J-2-GP
DY
1
2
PR4455
0R0402-PAD-2-GP
PR4455
0R0402-PAD-2-GP
1
2
P
R
4
4
4
1
1
0
0
K
R
2
F
-L
1
-G
P
DY
P
R
4
4
4
1
1
0
0
K
R
2
F
-L
1
-G
P
DY
1
2
P
R
4
4
6
1
1
0
0
K
R
2
F
-L
1
-G
P
DY
P
R
4
4
6
1
1
0
0
K
R
2
F
-L
1
-G
P
DY
1 2
PC4409
SC1U25V3KX-1-GP
DY
PC4409
SC1U25V3KX-1-GP
DY 1
2
P
R
4
4
2
8
1
5
0
K
R
2
F
-L
-G
P
P
R
4
4
2
8
1
5
0
K
R
2
F
-L
-G
P
12PG4408 GAP-CLOSE-PWR-3-GPPG4408 GAP-CLOSE-PWR-3-GP
1
O
U
T
1
1
IN
-
2
1
IN
+
3
G
N
D
4
V
C
C
8
2
O
U
T
7
2
IN
-
6
2
IN
+
5
P
U
4
4
0
2
L
M
3
9
3
P
W
R
-G
P
P
U
4
4
0
2
L
M
3
9
3
P
W
R
-G
P
1
2
PR4448
10R2F-L-GP
PR4448
10R2F-L-GP
1
2
PR4447
180KR2F-GPDY
PR4447
180KR2F-GPDY
1
2
PR4429
100KR2J-1-GP
DY PR4429
100KR2J-1-GP
DY
1
2
P
C
4
4
0
7
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
4
0
7
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
PR4405
100KR2F-L1-GP
PR4405
100KR2F-L1-GP
1
2
PC4432
SC1U25V3KX-1-GP
DY
PC4432
SC1U25V3KX-1-GP
DY
1
2
P
C
4
4
2
3
S
C
1
0
0
P
5
0
V
2
JN
-3
G
P
P
C
4
4
2
3
S
C
1
0
0
P
5
0
V
2
JN
-3
G
P
1
2
P
R
4
4
6
5
3
1
6
K
R
2
F
-G
P
DY
P
R
4
4
6
5
3
1
6
K
R
2
F
-G
P
DY
1
2
P
C
4
4
1
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
P
C
4
4
1
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
1
2
P
C
4
4
1
8
S
C
D
1
U
2
5
V
2
K
X
-G
P
P
C
4
4
1
8
S
C
D
1
U
2
5
V
2
K
X
-G
P
1
2
P
R
4
4
2
7
2
D
2
R
5
F
-2
-G
P
DY
P
R
4
4
2
7
2
D
2
R
5
F
-2
-G
P
DY
1
2
PG4406
GAP-CLOSE-PWR-3-GP
PG4406
GAP-CLOSE-PWR-3-GP
1 2
PL4401
COIL-2D2UH-11-GP
68.2R210.20C
PL4401
COIL-2D2UH-11-GP
68.2R210.20C
1 2PR4454
0R2J-2-GP
DY
PR4454
0R2J-2-GP
DY
1
2
PR4414
3K3R2J-3-GPDY
PR4414
3K3R2J-3-GPDY
1
2
PR4449
100KR2J-1-GP
PR4449
100KR2J-1-GP
1
2
P
R
4
4
1
9
1
0
0
K
R
2
F
-L
1
-G
P
DY
P
R
4
4
1
9
1
0
0
K
R
2
F
-L
1
-G
P
DY
1
2
P
C
4
4
0
4
S
C
1
U
2
5
V
3
K
X
-1
-G
P
P
C
4
4
0
4
S
C
1
U
2
5
V
3
K
X
-1
-G
P
1
2
3
4
5
6
7
8
9
10
PU4407
FDMS3600-02-RJK0215-COLAY-GP
ZZ.00215.037
PU4407
FDMS3600-02-RJK0215-COLAY-GP
ZZ.00215.037
1
2
PC4405
SCD01U50V3JX-1GP
PC4405
SCD01U50V3JX-1GP
1
2
PR4418
3KR5J-GP
PR4418
3KR5J-GP
1
2
PR4404
120KR2J-GP
PR4404
120KR2J-GP
1
2
34
5
6
PQ4413
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
PQ4413
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
1
2
P
G
4
4
0
4
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
4
0
4
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2
PC4431
SC1U25V3KX-1-GP
DY
PC4431
SC1U25V3KX-1-GP
DY
1
2
PR4410
100KR2J-1-GP
PR4410
100KR2J-1-GP
1
2
PR4444
309KR2F-GP
PR4444
309KR2F-GP
1
2
PR4452
100KR2J-1-GPDY
PR4452
100KR2J-1-GPDY
1
2
P
R
4
4
4
2
4
1
2
K
R
2
F
-G
P
DY
P
R
4
4
4
2
4
1
2
K
R
2
F
-G
P
DY
1
2
PR4463
0R2J-2-GPDY
PR4463
0R2J-2-GPDY
1 2
PR4402
316KR2F-GP
PR4402
316KR2F-GP
1
2
PR4440
120KR2J-GPDY
PR4440
120KR2J-GPDY
1 2PR4417 0R0402-PAD-2-GPPR4417 0R0402-PAD-2-GP
G
D S
PQ4406
2N7002K-1-GP
84.2N702.031
DY
PQ4406
2N7002K-1-GP
84.2N702.031
DY
1
2
P
G
4
4
0
5
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
4
0
5
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1
2
PR4451
680KR2F-GP
PR4451
680KR2F-GP
1 2
PR4456
0R2J-2-GP
DY
PR4456
0R2J-2-GP
DY
1 2PR4438 0R0402-PAD-2-GPPR4438 0R0402-PAD-2-GP
1
2
P
C
4
4
2
5
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
4
2
5
S
C
1
0
U
2
5
V
5
K
X
-G
P
K A
PD4403
1N4148WS-7-F-GP
PD4403
1N4148WS-7-F-GP
1
2
P
C
4
4
0
2
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
DY
P
C
4
4
0
2
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
DY
1
2
P
R
4
4
2
3
1
0
K
R
2
F
-2
-G
P
P
R
4
4
2
3
1
0
K
R
2
F
-2
-G
P
1
2
P
R
4
4
1
6
1
0
0
K
R
2
J-
1
-G
P
P
R
4
4
1
6
1
0
0
K
R
2
J-
1
-G
P
1
2
PR4422
1M8R2J-L-GP
PR4422
1M8R2J-L-GP
1 2 3
456
- +
PU4401
INA199A1-GP
- +
PU4401
INA199A1-GP
1
2
PC4412
SCD1U25V2KX-GP
PC4412
SCD1U25V2KX-GP
1
2
PR4412
100KR2F-L1-GP
PR4412
100KR2F-L1-GP
1
2
P
C
4
4
3
0
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
4
3
0
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
PR4446
0R0402-PAD-2-GP
PR4446
0R0402-PAD-2-GP
1
2
PC4410
SC1U25V3KX-1-GP
PC4410
SC1U25V3KX-1-GP
1
2
PR4411
47KR2F-GP
PR4411
47KR2F-GP
12
PR4462
0R0402-PAD-2-GP
PR4462
0R0402-PAD-2-GP
1
2
PR4439
4K02R2F-GP
PR4439
4K02R2F-GP
1 2
PC4429
SCD1U25V2KX-GP
PC4429
SCD1U25V2KX-GP
1
2
P
R
4
4
5
3
1
0
0
K
R
2
F
-L
1
-G
P
DY
P
R
4
4
5
3
1
0
0
K
R
2
F
-L
1
-G
P
DY
1
2
PG4402
GAP-CLOSE-PWR-3-GP
PG4402
GAP-CLOSE-PWR-3-GP
1 2
PC4421
SCD047U25V3KX-3-GP
PC4421
SCD047U25V3KX-3-GP
1
2
3
PD4402
V10P10-GP-U
PD4402
V10P10-GP-U12PR4421 0R2J-2-GPDYPR4421 0R2J-2-GPDY
1
2
P
R
4
4
0
9
4
K
0
2
R
2
F
-G
P
P
R
4
4
0
9
4
K
0
2
R
2
F
-G
P
1
2
P
C
4
4
2
7
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
4
2
7
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
3 4
5
6
PQ4412
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
DY
PQ4412
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
DY
1
2
PR4437
100KR2J-1-GP
PR4437
100KR2J-1-GP
1 2
PR4420
147KR2F-GP
PR4420
147KR2F-GP
1
2
P
C
4
4
3
4
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
4
3
4
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
P
C
4
4
0
3
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
4
0
3
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
P
G
4
4
0
3
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
4
0
3
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
12PR4430 0R0402-PAD-2-GPPR4430 0R0402-PAD-2-GP
1
2
P
C
4
4
1
1
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
4
1
1
S
C
1
0
U
2
5
V
5
K
X
-G
P
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PWR_5V_LL1
PWR_3D3V_VBST2
P
W
R
_
5
V
_
S
N
U
B
PWR_5V_DRVH1
PWR_5V_DRVL1
PWR_3D3V_DRVH2
PWR_5V_VO1
PWR_3D3V_LL2
PWR_5V_VBST1
PWR_5V_FB1_RPWR_3D3V_FB2_R
PWR_3D3V_CS2
PWR_3D3V_VBST2_1
PWR_5V3D3V_PGOOD
PWR_3D3V_EN2
P
W
R
_
3
D
3
V
_
S
N
U
B
PWR_5V_VBST1_1
PWR_5V_EN1
PWR_5V_CS1
PWR_3D3V_FB2
3
V
_
F
E
E
D
B
A
C
K
PWR_3D3V_DRVL2
PWR_5V_FB1
PWR_5V_VCLK
15V_PWR
PWR_5V_VCLK
BOOST_10V
B
S
T
1
5
V
_
1
B
S
T
1
5
V
_
2
PWR_5V_EN1_R PWR_5V_EN1
PWR_3D3V_EN2
3D3V_AUX_S5
3D3V_PWR
PWR_DCBATOUT_3D3V
DCBATOUT
3D3V_PWR3D3V_S5
PWR_DCBATOUT_5V
5V_PWR_2
5V_PWR 5V_S5
5V_PWR
PWR_DCBATOUT_3D3VDCBATOUT
3D3V_S5
PWR_DCBATOUT_5VDCBATOUT
5V_PWR 15V_S5
3D3V_PWR_2
3D3V_AUX_S5
3V_5V_POK[17]
3V_5V_EN[36]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
3V/5V TPS51225
Custom
45 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
3V/5V TPS51225
Custom
45 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
3V/5V TPS51225
Custom
45 101Friday, June 28, 2013
<Core Design>
D
S G
G
D
S
G
D
D
SG
S
SSID = PWR.Plane.Regulator_5v3p3v
Close to VFB Pin (pin5)
Close to VFB Pin (pin2)
X01 change PR4120 to 9.76K to solve 5V
voltage fall issue while on heavy loading
Design Current=8.48A
13.33A<OCP<15.76A
Design Current=3.34A
5.28A<OCP<5.72AA
A00 0618A00 0618
1
2
PR4511
57K6R2F-GP
PR4511
57K6R2F-GP
1
2
PT4501S
E
2
2
0
U
6
D
3
V
M
-2
8
-G
P
-U
PT4501S
E
2
2
0
U
6
D
3
V
M
-2
8
-G
P
-U
12
PG4525
GAP-CLOSE-PWR-3-GP
PG4525
GAP-CLOSE-PWR-3-GP
1
2
PC4512
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4512
S
C
1
0
U
2
5
V
5
K
X
-G
P
1 2
PG4501
GAP-CLOSE-PWR-3-GP
PG4501
GAP-CLOSE-PWR-3-GP
1
2
PR4518
9K76R2F-1-GP
PR4518
9K76R2F-1-GP
1
2
PR4513
6K65R2F-GP
PR4513
6K65R2F-GP
1 2
3
PD4503
BAT54S-7-F-GP
75.00054.B7D
2nd = 75.00054.C7D
3rd = 75.00054.M7D DY
PD4503
BAT54S-7-F-GP
75.00054.B7D
2nd = 75.00054.C7D
3rd = 75.00054.M7D DY
1
2
P
C
4
5
1
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
P
C
4
5
1
8
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
12
PG4531
GAP-CLOSE-PWR-3-GP
PG4531
GAP-CLOSE-PWR-3-GP
1
2
PR4503
0R2J-2-GP DY
PR4503
0R2J-2-GP DY
12
PG4514
GAP-CLOSE-PWR-3-GP
PG4514
GAP-CLOSE-PWR-3-GP
12
PG4506
GAP-CLOSE-PWR-3-GP
PG4506
GAP-CLOSE-PWR-3-GP
1
2
PC4521
SC18P50V2JN-1-GPDY
PC4521
SC18P50V2JN-1-GPDY
1
2PC4519
SC330P50V3KX-GP
DY
PC4519
SC330P50V3KX-GP
DY
1
2
PG4521
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG4521
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
12
PG4523
GAP-CLOSE-PWR-3-GP
PG4523
GAP-CLOSE-PWR-3-GP
1
2
PC4522
SC18P50V2JN-1-GP
DYPC4522
SC18P50V2JN-1-GP
DY
1
2
PC4510
S
C
1
0
U
2
5
V
5
K
X
-G
P
DY
PC4510
S
C
1
0
U
2
5
V
5
K
X
-G
P
DY
1
2
PT4502S
E
2
2
0
U
6
D
3
V
M
-2
8
-G
P
-U
PT4502S
E
2
2
0
U
6
D
3
V
M
-2
8
-G
P
-U
1
2
P
C
4
5
1
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
P
C
4
5
1
7
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
PC4526
S
C
D
1
U
2
5
V
3
K
X
-G
P
DY
PC4526
S
C
D
1
U
2
5
V
3
K
X
-G
P
DY
12
PG4502
GAP-CLOSE-PWR-3-GP
PG4502
GAP-CLOSE-PWR-3-GP
1
2
PC4533
SC1U25V3KX-1-GP DY
PC4533
SC1U25V3KX-1-GP DY
1
2
PC4534
SCD1U25V3KX-GP
DYPC4534
SCD1U25V3KX-GP
DY
1234
5 6 7 8
SSSG
D D D D
PU4503
SIS412DN-T1-GE3-GP
84.00412.037
SSSG
D D D D
PU4503
SIS412DN-T1-GE3-GP
84.00412.037
1
2
PG4520
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG4520
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1
2
PR4509
2D2R5F-2-GP
DYPR4509
2D2R5F-2-GP
DY
1
2
PC4527
SCD1U25V3KX-GP
DYPC4527
SCD1U25V3KX-GP
DY
12
PG4522
GAP-CLOSE-PWR-3-GP
PG4522
GAP-CLOSE-PWR-3-GP
1 2 3 4
5678
S S S G
DDDD
PU4502
SIS412DN-T1-GE3-GP
84.00412.037
S S S G
DDDD
PU4502
SIS412DN-T1-GE3-GP
84.00412.037
1 2
PG4507
GAP-CLOSE-PWR-3-GP
PG4507
GAP-CLOSE-PWR-3-GP
1 2
PR4507
1D5R3F-GP
PR4507
1D5R3F-GP
12
PG4519
GAP-CLOSE-PWR-3-GP
PG4519
GAP-CLOSE-PWR-3-GP
12
PG4516
GAP-CLOSE-PWR-3-GP
PG4516
GAP-CLOSE-PWR-3-GP
1
2
PR4512
143KR2F-GP
PR4512
143KR2F-GP
1
2
PC4532
SCD1U25V3KX-GP
DY PC4532
SCD1U25V3KX-GP
DY
1
2
PC4513
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4513
S
C
1
0
U
2
5
V
5
K
X
-G
P
12
PC4515
SCD1U25V3KX-GP
PC4515
SCD1U25V3KX-GP
12
PG4503
GAP-CLOSE-PWR-3-GP
PG4503
GAP-CLOSE-PWR-3-GP
1
2
PC4525
SC1KP50V2KX-1GP DY
PC4525
SC1KP50V2KX-1GP DY
1
2
PC4514
S
C
D
1
U
2
5
V
2
K
X
-G
P
PC4514
S
C
D
1
U
2
5
V
2
K
X
-G
P
12
PR4520
0R0402-PAD-2-GP
PR4520
0R0402-PAD-2-GP
12
PG4508
GAP-CLOSE-PWR-3-GP
PG4508
GAP-CLOSE-PWR-3-GP
12
PG4528
GAP-CLOSE-PWR-3-GP
PG4528
GAP-CLOSE-PWR-3-GP
1
2
PC4509
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4509
S
C
1
0
U
2
5
V
5
K
X
-G
P
1 2
PR4508
1D5R3F-GP
PR4508
1D5R3F-GP
12
PG4517
GAP-CLOSE-PWR-3-GP
PG4517
GAP-CLOSE-PWR-3-GP
1
2
PR4519
100KR2J-1-GPDY
PR4519
100KR2J-1-GPDY
1
2
PC4524
SC1U6D3V3KX-2GP
PC4524
SC1U6D3V3KX-2GP
1
2
PC4508
S
C
D
1
U
2
5
V
2
K
X
-G
P
PC4508
S
C
D
1
U
2
5
V
2
K
X
-G
P
1 2
PR4502
0R0402-PAD-2-GP
PR4502
0R0402-PAD-2-GP
12
PG4518
GAP-CLOSE-PWR-3-GP
PG4518
GAP-CLOSE-PWR-3-GP
123
4
5 6 7 8
SSS
G
D D D D PU4505
S
IS
7
8
0
D
N
-T
1
-G
E
3
-G
P
SSS
G
D D D D PU4505
S
IS
7
8
0
D
N
-T
1
-G
E
3
-G
P
1 2
PG4529
GAP-CLOSE-PWR-3-GP
PG4529
GAP-CLOSE-PWR-3-GP
12
PG4512
GAP-CLOSE-PWR-3-GP
PG4512
GAP-CLOSE-PWR-3-GP
1
2
PC4523
SC4D7U6D3V3KX-GP
PC4523
SC4D7U6D3V3KX-GP
1 2
PG4504
GAP-CLOSE-PWR-3-GP
PG4504
GAP-CLOSE-PWR-3-GP
1
2
PR4514
0R2J-2-GPDY
PR4514
0R2J-2-GPDY
1 2
3
PD4502
BAT54S-7-F-GP
75.00054.B7D
2nd = 75.00054.C7D
3rd = 75.00054.M7D
DY
PD4502
BAT54S-7-F-GP
75.00054.B7D
2nd = 75.00054.C7D
3rd = 75.00054.M7D
DY
1 2
PL4503
IND-3D3UH-57GP
2nd = 68.3R31B.10U
68.3R310.20A
PL4503
IND-3D3UH-57GP
2nd = 68.3R31B.10U
68.3R310.20A
12
PG4527
GAP-CLOSE-PWR-3-GP
PG4527
GAP-CLOSE-PWR-3-GP
VBST2
9
DRVH2
10
SW2
8
DRVL2
11
VFB2
4
EN2
6
CS2
5
V
R
E
G
3
3
V
IN
1
2
VBST1
17
DRVH1
16
SW1
18
DRVL1
15
VO1
14
VFB1
2
EN1
20
CS1
1
V
R
E
G
5
1
3
GND
21
VCLK
19
PGOOD
7
PU4501
TPS51225RUKR-GP
PU4501
TPS51225RUKR-GP
1
2
PR4504
0R0402-PAD-2-GP
PR4504
0R0402-PAD-2-GP
12
PG4515
GAP-CLOSE-PWR-3-GP
PG4515
GAP-CLOSE-PWR-3-GP
1
2
PR4517
10KR2F-2-GP
PR4517
10KR2F-2-GP
1 2
PG4511
GAP-CLOSE-PWR-3-GP
PG4511
GAP-CLOSE-PWR-3-GP
12
PG4524
GAP-CLOSE-PWR-3-GP
PG4524
GAP-CLOSE-PWR-3-GP
1 2
PL4502
IND-2D2UH-46-GP-U
PL4502
IND-2D2UH-46-GP-U
1 2
PR4505
0R0402-PAD-2-GP
PR4505
0R0402-PAD-2-GP
12
PG4505
GAP-CLOSE-PWR-3-GP
PG4505
GAP-CLOSE-PWR-3-GP
1 2 3
4
5678
S S S
G
DDDD
PU4504
SIS780DN-T1-GE3-GP
S S S
G
DDDDPU4504
SIS780DN-T1-GE3-GP
1
2
PC4507
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4507
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
PR4515
0R2J-2-GP DY
PR4515
0R2J-2-GP DY
1
2
PR4510
2D2R5F-2-GPDY
PR4510
2D2R5F-2-GPDY
12
PG4526
GAP-CLOSE-PWR-3-GP
PG4526
GAP-CLOSE-PWR-3-GP
12
PG4510
GAP-CLOSE-PWR-3-GP
PG4510
GAP-CLOSE-PWR-3-GP
12
PG4513
GAP-CLOSE-PWR-3-GP
PG4513
GAP-CLOSE-PWR-3-GP
1
2
PR4516
15KR2F-GP
PR4516
15KR2F-GP
12
PG4530
GAP-CLOSE-PWR-3-GP
PG4530
GAP-CLOSE-PWR-3-GP
1
2
PC4511
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
PC4511
S
C
D
0
1
U
5
0
V
2
K
X
-1
G
P
1
2
PC4520
SC560P50V-GP
DY PC4520
SC560P50V-GP
DY
12
PR4506
0R2J-2-GP
DY
PR4506
0R2J-2-GP
DY
12
PC4516
SCD1U25V3KX-GP
PC4516
SCD1U25V3KX-GP
A
K
PD4501
BZT52C15S-GPDY
PD4501
BZT52C15S-GPDY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDDAT
H_CPU_SVIDCLK
VR_SVID_ALERT#
PWR_VCC_VREF
PWR_VCC_COMP
PWR_VCC_DROOP
PWR_VCC_B-RAMP
PWR_VCC_F-Imax
PWR_VCC_O-USR
P
W
R
_
V
C
C
_
V
5
A
PWR_VCC_GFB
PWR_VCC_VFB
PWR_VCC_VBAT
PWR_VCC_SLEWA
P
W
R
_
V
C
C
_
T
H
E
R
M
P
W
R
_
V
C
C
_
IM
O
N
P
W
R
_
V
C
C
_
O
C
P
-1
PWR_PG
PWR_VCC_VREF
IMVP_VRON
PWR_VCC_VDD
P
W
R
_
V
C
C
_
C
O
M
P
_
1
NC#4
IMVP_PWRGD
5V_S5
DCBATOUT
3D3V_S0
3D3V_S5 1D05S_VCCST
3D3V_S5
H_CPU_SVIDDAT [7]
VR_SVID_ALERT# [7]
VCC_SENSE[7]
VSS_SENSE[9]
H_CPU_SVIDCLK [7]
H_PROCHOT# [4,24,42,44]
PWR_VCC_CSP1[47]
PWR_VCC_CSN1[47] PWR_VCC_SKIP# [47]
PWR_VCC_PWM1 [47]
IMVP_PWRGD [7,24]
H_VR_ENABLE [7]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51622_CPUCORE(1/2)
A3
46 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51622_CPUCORE(1/2)
A3
46 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51622_CPUCORE(1/2)
A3
46 101Friday, June 28, 2013
<Core Design>
0117 Add EC4602
SSID = CPU.Regulator
392K
75K
150k
680K
2.8K
1M
150K
75K
422K
3K
28W 15W
Fsw
Fsw
OCP
IMON
Load line
PR4604
PR4607
PR4609
PR4610
PR4620
1 2
PR4612
39KR2F-GP
PR4612
39KR2F-GP
1 2PR4624 10R3J-3-GPPR4624 10R3J-3-GP
1 2
PR4609
56KR2F-GP
PR4609
56KR2F-GP
1
2
PR4602
NTC-100K-10-GP
PR4602
NTC-100K-10-GP
1
2
PR4601
150KR2F-L-GP
PR4601
150KR2F-L-GP
1 2
PR4606 15KR2F-GPPR4606 15KR2F-GP
1 2
PR4613
10R3J-3-GP
PR4613
10R3J-3-GP
1
2
PR4605
8K87R2F-2-GP
PR4605
8K87R2F-2-GP
1 2PC4608
SC1500P50V2KX-2GP
PC4608
SC1500P50V2KX-2GP
1 2 PR4623130R2F-1-GP DY PR4623130R2F-1-GP DY
1 2 PR4621130R2F-1-GP PR4621130R2F-1-GP
1 2
PR4619
10KR2F-2-GP
PR4619
10KR2F-2-GP
1 2 PR462254D9R2F-L1-GP PR462254D9R2F-L1-GP
1 2PR4611 75R2F-2-GPDYPR4611 75R2F-2-GPDY
1
2
PR4607
150KR2F-L-GP
PR4607
150KR2F-L-GP
1
2
PR4608
150KR2F-L-GP
PR4608
150KR2F-L-GP
1
2
PR4603
75R2F-2-GPDY
PR4603
75R2F-2-GPDY
1
2
PR4604
1MR2F-GP
PR4604
1MR2F-GP
12 PC4605SCD1U10V2KX-5GP DY PC4605SCD1U10V2KX-5GP DY
1
2
P
C
4
6
0
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
P
C
4
6
0
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
12PR4614 2KR2F-3-GPPR4614 2KR2F-3-GP
1 2
PC4603
SC1KP50V2KX-1GP
PC4603
SC1KP50V2KX-1GP
1
2
P
C
4
6
0
7
S
C
1
0
U
6
D
3
V
2
M
X
-G
P
-U
P
C
4
6
0
7
S
C
1
0
U
6
D
3
V
2
M
X
-G
P
-U
1 2
PR4610
422KR3F-GP
PR4610
422KR3F-GP
12
PC4604
SC470P50V2JN-GP
DY
PC4604
SC470P50V2JN-GP
DY
1 2PR4626
0R2J-2-GP
DYPR4626
0R2J-2-GP
DY
CSN219
CSN118
B
-R
A
M
P
1
1
V
R
E
F
2
7
NC#2121
VDD 2
A
L
E
R
T
#
3
2
VDIO 1
S
L
E
W
A
1
5
G
N
D
3
3
PGOOD 3
SKIP# 7
F
-I
M
A
X
1
0
IM
O
N
1
3
VR_ON 8
G
N
D
2
9
PWM1 6
V
R
_
H
O
T
#
3
0
D
R
O
O
P
2
5
CSP117
VFB24
GFB23
PWM2 5
C
O
M
P
2
6
NC#2222
MODE 4
O
C
P
-I
1
2
O
-U
S
R
9
V
C
L
K
3
1
T
H
E
R
M
1
4
V
B
A
T
1
6
V
5
A
2
8
CSP220
PU4601
TPS51622RSMR-1-GP
PU4601
TPS51622RSMR-1-GP
1 2PR4615
0R0402-PAD-2-GP
PR4615
0R0402-PAD-2-GP
1 2PR4618 10R3J-3-GPPR4618 10R3J-3-GP
1 2PR4620
3KR2F-GP
PR4620
3KR2F-GP
1 2
PR4627
5K76R2F-2-GP
PR4627
5K76R2F-2-GP
1 2
PC4602
SC4700P50V2KX-1GP
PC4602
SC4700P50V2KX-1GP
1
2
EC4602S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
EC4602S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1 2PR4617
0R0402-PAD-2-GP
PR4617
0R0402-PAD-2-GP
1
2PC
4
6
0
6
S
C
D
3
3
U
6
D
3
V
2
K
X
-1
-G
P
P
C
4
6
0
6
S
C
D
3
3
U
6
D
3
V
2
K
X
-1
-G
P
1 2PR4625
0R0402-PAD-2-GP
PR4625
0R0402-PAD-2-GP
1 2PR4616
0R0402-PAD-2-GP
PR4616
0R0402-PAD-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VCC_BOOTR1
PWR_VCC_BOOT1
VCC_CSN1_R
V
C
C
_
V
S
W
1
_
G
P
PWR_VCC_SKIP#1
PWR_VCC_VSW1
VCC_BOOTR1_R
VCC_VSW1_R
5V_S5
PWR_DCBATOUT_VCCCORE1
VCC_CORE
PWR_DCBATOUT_VCCCORE1
PWR_DCBATOUT_VCCCORE1DCBATOUT
VCC_CORE
PWR_VCC_PWM1[46]
PWR_VCC_SKIP#[46]
PWR_VCC_CSN1 [46]
PWR_VCC_CSP1 [46]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51622_CPUCORE(2/2)
A3
47 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51622_CPUCORE(2/2)
A3
47 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51622_CPUCORE(2/2)
A3
47 101Friday, June 28, 2013
<Core Design>
For acoustic noice 
SSID = CPU.Regulator
0318 Add EC4702, need close to PC4741
PR4704
PR4706
PR4705
2.21K
2.94K
60.4K
2.21K
2.94K
29.4K
28W 15W
DCR sensing
DCR sensing
DCR sensing
28W CPU need stuff PC4743, PC4728, PC4739, PC4724, PC4735, PC4738
A00 0621
A00 0621
1
2
PR4701
2D2R5F-2-GP
PR4701
2D2R5F-2-GP
1
2
P
C
4
7
4
1
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
4
7
4
1
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1
2
P
C
4
7
3
7
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
4
7
3
7
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1 2
PG4703
GAP-CLOSE-PWR-3-GP
PG4703
GAP-CLOSE-PWR-3-GP
1
2
P
C
4
7
2
1
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
2
1
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1 2
PG4705
GAP-CLOSE-PWR-3-GP
PG4705
GAP-CLOSE-PWR-3-GP
1
2
P
C
4
7
3
4
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
4
7
3
4
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1 2PR4702
0R0402-PAD-2-GP
PR4702
0R0402-PAD-2-GP
1
2
P
C
4
7
2
8
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
2
8
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
PC4708
SC1000P100V3KX-GP
PC4708
SC1000P100V3KX-GP
1
2
P
C
4
7
1
1
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
1
1
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
P
C
4
7
2
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
4
7
2
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
BOOT 7
SKIP#1
P
G
N
D
9
VIN5 VDD 2
PWM8
VSW 4
BOOT_R 6
PGND3
PU4701
CSD97374Q4M-GP-U1
PU4701
CSD97374Q4M-GP-U1
1
2
PC4701
SC820P50V2KX-1GP
PC4701
SC820P50V2KX-1GP
1
2
PC4704
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4704
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
P
C
4
7
4
0
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
4
0
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
P
C
4
7
4
2
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
4
2
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1 2
PG4701
GAP-CLOSE-PWR-3-GP
PG4701
GAP-CLOSE-PWR-3-GP
1
2
P
C
4
7
0
9
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
0
9
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
PT4701
SE330U2D5VM-14-GP
DY
79.3371V.6CL
PT4701
SE330U2D5VM-14-GP
DY
79.3371V.6CL
1
2
P
C
4
7
2
7
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
2
7
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1 2
PR4705
29K4R2F-GP
PR4705
29K4R2F-GP1
2
PR4704
2K21R2F-GP
PR4704
2K21R2F-GP
21
PC4706
SCD22U25V3KX-GP
21
PC4706
SCD22U25V3KX-GP
1
2
P
C
4
7
1
0
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
1
0
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
P
C
4
7
2
2
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
2
2
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1 2
PC4705 SC2D2U10V3KX-1GPPC4705 SC2D2U10V3KX-1GP
1
2
P
C
4
7
2
9
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
2
9
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
P
C
4
7
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
4
7
2
6
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1 2
PC4707
SCD15U10V3KX-4-GP
PC4707
SCD15U10V3KX-4-GP
1
2
P
C
4
7
2
4
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
2
4
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1 2
PR4703 2D2R3F-L-GPPR4703 2D2R3F-L-GP
1 2PL4701 IND-D22UH-9-GP-UPL4701 IND-D22UH-9-GP-U
1
2
P
C
4
7
1
4
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
1
4
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1 2
PG4704
GAP-CLOSE-PWR-3-GP
PG4704
GAP-CLOSE-PWR-3-GP
1 2
PG4702
GAP-CLOSE-PWR-3-GP
PG4702
GAP-CLOSE-PWR-3-GP
1
2
P
C
4
7
3
2
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
3
2
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1 2
PG4706
GAP-CLOSE-PWR-3-GP
PG4706
GAP-CLOSE-PWR-3-GP
1
2
P
G
4
7
0
7
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
7
0
7
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2
PR4707
NTC-10K-26-GP
PR4707
NTC-10K-26-GP
1
2
E
C
4
7
0
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
E
C
4
7
0
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
1
2
PC4703
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4703
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
P
C
4
7
1
6
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
1
6
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
EC4701
S
C
D
1
U
5
0
V
3
K
X
-G
P
DY
EC4701
S
C
D
1
U
5
0
V
3
K
X
-G
P
DY
1
2
PT4702S
E
6
8
U
2
5
V
M
-7
-G
P
-U
DY
PT4702S
E
6
8
U
2
5
V
M
-7
-G
P
-U
DY
1
2
P
C
4
7
3
6
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
4
7
3
6
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1
2
P
C
4
7
2
0
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
2
0
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
P
C
4
7
4
3
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
4
3
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
PC4702
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4702
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
P
C
4
7
3
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
3
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
P
C
4
7
1
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
1
5
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
P
C
4
7
3
3
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
3
3
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
P
C
4
7
3
8
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
P
C
4
7
3
8
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1
2
P
G
4
7
0
8
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
7
0
8
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P1
2
P
C
4
7
3
1
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
3
1
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
P
C
4
7
1
9
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
1
9
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1 2
PR4706
2K94R2F-GP
PR4706
2K94R2F-GP
1
2
P
C
4
7
3
0
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
P
C
4
7
3
0
S
C
2
2
U
6
D
3
V
3
M
X
-1
-G
P
1
2
P
C
4
7
3
9
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
P
C
4
7
3
9
S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D05_SW
PWR_1D05_RC
PWR_1D05V_GSNS
PWR_1D05_SLEW
PWR_1D05_REFIN_1
PWR_1D05_BOOT
PWR_1D05V_VSNS
PWR_1D05_PGOOD
PWR_1D05_LP#
PWR_1D05_MODE
PWR_1D05_VRF_L
P
W
R
_
1
D
0
5
_
S
U
N
B
PWR_1D05_REFIN
PWR_1D05V_VSNS
PWR_1D05V_GSNS
PWR_1D05_TRIP
PWR_1D05_VREF
PWR_1D05_EN
+PWR_SRC_1D05V
1D05V_PWR
+PWR_SRC_1D05VDCBATOUT
1D05V_S0
5V_S5
1D05V_PWR
5V_S5
1D05V_VTT_PWRGD [7,36]
PCH_SLP_S0# [17]
PM_SLP_S3#[17,24,36,49,51]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51363 1D05V
A3
48 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51363 1D05V
A3
48 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51363 1D05V
A3
48 101Friday, June 28, 2013
<Core Design>
SSID = PWR.Plane.Regulator_1p05v
Design Current = 6.1A
9.57A<OCP<11.31A
Panasonic ETQP3W1R0WFN
7 x 7 x 3 .
Isat : 13 A , DCR 6.9+-15%mOhm
Pin19 direct
connect to
thermal pad
Reserve PR4821
for OCP setting 
Refer Intel CRB to use SLP_S3# control 
Mode 
GND
Float 
Fsw(KHz)
400KHz
800KHz
TRIP
GND
5V
OCL(A)
8A
12A 
REFIN Voltage (V)
GND
FLOAT
Resistor Divider
Output Voltage (V)
1.05V
1.2V
Adjustable between 0.6V to 2.0V
I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
Inductor:CHIP CHOKE 1.0UH ETQP3W1R0WFN / Panasonic/ 6.9mOhm / Isat =13Arms/ 68.1R01D.20H
O/P cap:CHIP CAP C 22U 6.3V M0805 X5R /78.22610.51L
1
2
PR4833
105KR2F-1-GP
PR4833
105KR2F-1-GP
SW#7 7
REFIN25
SW#8 8
EN28
V518
PGND 12
PGOOD 1
SW#6 6GSNS23
PGND 14
BST 5
MODE 3
NC#4 4
NU#2 2
GND19
VREF26
NU#2727
REFIN224
VSNS22
SLEW21
TRIP20
PGND 13
PGND 10
PGND 11
SW#9 9
VIN15
G
N
D
2
9
VIN16
VIN17
PU4801
TPS51363RVER-GP
PU4801
TPS51363RVER-GP
1 2PR4834 0R0402-PAD-2-GPPR4834 0R0402-PAD-2-GP
1
2
PC4820
SC330P50V3KX-GP
DY
PC4820
SC330P50V3KX-GP
DY
1
2
P
C
4
8
2
6
S
C
D
2
2
U
6
D
3
V
2
K
X
-1
G
P
P
C
4
8
2
6
S
C
D
2
2
U
6
D
3
V
2
K
X
-1
G
P
1
2
PC4818
SCD1U10V2KX-4GP DY
PC4818
SCD1U10V2KX-4GP DY
1 2
PG4806
GAP-CLOSE-PWR-3-GP
PG4806
GAP-CLOSE-PWR-3-GP
1
2
PC4829S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
PC4829S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1
2
PC4832S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DYPC4832S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1
2
PR4826
95K3R2F-GP
PR4826
95K3R2F-GP
1
2
PC4822S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
PC4822S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1
2
PC4831S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
PC4831S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
1 2PR4823
0R0402-PAD-2-GP
PR4823
0R0402-PAD-2-GP
1 2
PC4821 SC10P50V2JN-4GP
DY
PC4821 SC10P50V2JN-4GP
DY
1 2
PR4830
5D1R3F-GP
PR4830
5D1R3F-GP
1 2
PG4807
GAP-CLOSE-PWR-3-GP
PG4807
GAP-CLOSE-PWR-3-GP
1 2
PG4814
GAP-CLOSE-PWR-3-GP
PG4814
GAP-CLOSE-PWR-3-GP
12PR4801 0R0402-PAD-2-GPPR4801 0R0402-PAD-2-GP
1
2
PC4828S
C
D
1
U
1
0
V
2
K
X
-5
G
P
PC4828S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1 2
PG4813
GAP-CLOSE-PWR-3-GP
PG4813
GAP-CLOSE-PWR-3-GP
1
2
PC4835
S
C
1
0
U
2
5
V
5
K
X
-G
P
DY
PC4835
S
C
1
0
U
2
5
V
5
K
X
-G
P
DY
1
2
PR4825
2D2R5F-2-GP DY
PR4825
2D2R5F-2-GP DY
1 2
PG4802
GAP-CLOSE-PWR-3-GP
PG4802
GAP-CLOSE-PWR-3-GP
1 2
PG4812
GAP-CLOSE-PWR-3-GP
PG4812
GAP-CLOSE-PWR-3-GP
1 2
PG4808
GAP-CLOSE-PWR-3-GP
PG4808
GAP-CLOSE-PWR-3-GP
1 2
PG4815
GAP-CLOSE-PWR-3-GP
PG4815
GAP-CLOSE-PWR-3-GP
12
PR4824 0R2J-2-GPDYPR4824 0R2J-2-GPDY
1
2
PC4827
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4827
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
PC4817
S
C
1
0
U
2
5
V
5
K
X
-G
P
PC4817
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
PR4821
0R2J-2-GPDY
PR4821
0R2J-2-GPDY
1 2PR4832
0R0402-PAD-2-GP
PR4832
0R0402-PAD-2-GP
1
2
PC4824
S
C
D
1
U
2
5
V
2
K
X
-G
P
PC4824
S
C
D
1
U
2
5
V
2
K
X
-G
P
1 2
PG4803
GAP-CLOSE-PWR-3-GP
PG4803
GAP-CLOSE-PWR-3-GP
1
2
PG4821G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG4821G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2PR4835 10KR2F-2-GPDYPR4835 10KR2F-2-GPDY
1
2
PC4823
SCD1U25V3KX-GP
PC4823
SCD1U25V3KX-GP
1 2
PC4834 SC2700P50V2KX-1-GPPC4834 SC2700P50V2KX-1-GP
1
2
PC4819S
C
2
D
2
U
1
0
V
3
K
X
-1
G
P
PC4819S
C
2
D
2
U
1
0
V
3
K
X
-1
G
P
1 2
PG4804
GAP-CLOSE-PWR-3-GP
PG4804
GAP-CLOSE-PWR-3-GP
1
2
PG4820G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
PG4820
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2PR4828
0R0402-PAD-2-GP
PR4828
0R0402-PAD-2-GP
1 2
PL4801
COIL-1UH-61-GP
PL4801
COIL-1UH-61-GP
1 2
PC4833 SC10P50V2JN-4GP
DY
PC4833 SC10P50V2JN-4GP
DY
1
2
PC4825S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DYPC4825S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
1 2PR4819 10KR2F-2-GPDYPR4819 10KR2F-2-GPDY
1 2
PG4805
GAP-CLOSE-PWR-3-GP
PG4805
GAP-CLOSE-PWR-3-GP
1
2
PC4830S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DYPC4830S
C
2
2
U
6
D
3
V
5
M
X
-2
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D35V_TRIP
PWR_1D35V_MODE
PWR_1D35V_VTTREF
PWR_1D35V_DRVL
P
W
R
_
1
D
3
5
V
_
V
D
D
Q
S
PWR_1D35V_VREF
PWR_1D35V_VBST
PWR_1D35V_DRVH
PWR_1D35V_REFIN
P
R
4
6
0
5
_
2
PWR_1D35V_VDDQS
PWR_1D35V_SW
PWR_1D35V_EN
PWR_1D35V_VTTREF
TPS51216_PHS_SET
PWR_1D35V_EN
0D675V_EN
0D675V_EN
1D35V_PWR
+PWR_SRC_1D35V
+PWR_SRC_1D35V
+0D675V_DDR_P 0D675V_S0
DCBATOUT
+0D675V_DDR_P
5V_S5
1D35V_PWR 1D35V_S3
1D35V_PWR
0D675V_VTTREF
1D35V_VTT_PWRGD[36]
PM_SLP_S4#[17,24]
DDR_VTT_PG_CTRL[12]
PM_SLP_S3#[17,24,36,48,51]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51216_+1.35V_SUS
A3
49 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51216_+1.35V_SUS
A3
49 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
TPS51216_+1.35V_SUS
A3
49 101Friday, June 28, 2013
<Core Design>
SSID = PWR.Plane.Regulator_1p35v0p675v
Design Current=13.52A
21.25A<OCP>25.11A
PR4608
200k ohm
300kHz
Tracking Discharge
400kHz
300kHz
Frequency
Non-tracking Discharge
Discharge Mode
MODE
State S3 S5 VDDR VTTREF VTT
S3
S0
Lo
Hi
S4/S5
Hi
Hi
Lo
On
Lo
On
On
On
OffOff
On
Off(Hi-Z)
Off
100k ohm
47k ohm
68k ohm
400kHz
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP CHOKE 1.0UH PCMB104T-1R0M/ 3.3mohm/ Isat =28A rms /68.1R01C.10Q
O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L
H/S: SIR172ADP-T1-GE3 / 8.5mohm/10.5mOhm@4.5Vgs/ 84.00172.A37
L/S: SIRA12DP-T1-GE3 / 4.4mohm/6mOhm@4.5Vgs/ 84.SRA12.037
0117 Add EC4901
A00 0618
A00 0621
1 2PR4910 0R2J-2-GPDYPR4910 0R2J-2-GPDY
1 2
PG4923
GAP-CLOSE-PWR-3-GP
PG4923
GAP-CLOSE-PWR-3-GP
1 2
PC4919
SCD1U25V3KX-GP
PC4919
SCD1U25V3KX-GP
1
2
P
R
4
9
0
8
2
0
0
K
R
2
F
-L
-G
P
P
R
4
9
0
8
2
0
0
K
R
2
F
-L
-G
P
1
2
P
C
4
9
0
1
S
C
1
U
1
0
V
2
K
X
-1
G
P
P
C
4
9
0
1
S
C
1
U
1
0
V
2
K
X
-1
G
P
1
2
P
R
4
9
0
6
2
9
K
4
R
2
F
-G
P
P
R
4
9
0
6
2
9
K
4
R
2
F
-G
P
1 2
PG4911
GAP-CLOSE-PWR-3-GP
PG4911
GAP-CLOSE-PWR-3-GP
1
2
PR4912
2D2R5F-2-GPDY
PR4912
2D2R5F-2-GPDY
1 2
PR4905
2D2R3-1-U-GP
PR4905
2D2R3-1-U-GP
1 2
PG4903
GAP-CLOSE-PWR-3-GP
PG4903
GAP-CLOSE-PWR-3-GP
1 2
PG4906
GAP-CLOSE-PWR-3-GP
PG4906
GAP-CLOSE-PWR-3-GP
1 2
PL4902
IND-D68UH-51-GP-U
PL4902
IND-D68UH-51-GP-U
1
2P
C
4
9
1
6
S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
P
C
4
9
1
6
S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
1
2
P
C
4
9
0
4
S
C
1
U
6
D
3
V
2
K
X
-G
P
P
C
4
9
0
4
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
PC4906
SCD1U10V2KX-5GPDY
PC4906
SCD1U10V2KX-5GPDY
1 2
PG4916
GAP-CLOSE-PWR-3-GP
PG4916
GAP-CLOSE-PWR-3-GP
1 2
PG4921
GAP-CLOSE-PWR-3-GP
PG4921
GAP-CLOSE-PWR-3-GP
1 2
PG4902
GAP-CLOSE-PWR-3-GP
PG4902
GAP-CLOSE-PWR-3-GP
1 2PR4909
0R0402-PAD-2-GP
PR4909
0R0402-PAD-2-GP
1
2 P
R
4
9
0
2
6
8
K
1
R
2
F
-1
-G
P
P
R
4
9
0
2
6
8
K
1
R
2
F
-1
-G
P
1 2PR4911
0R0603-PAD-2-GP-U
PR4911
0R0603-PAD-2-GP-U
1
2
P
C
4
9
0
2
S
C
D
0
1
U
1
6
V
2
K
X
-3
G
P
P
C
4
9
0
2
S
C
D
0
1
U
1
6
V
2
K
X
-3
G
P
1
2
P
C
4
9
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
P
C
4
9
1
5
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
P
C
4
9
0
9
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
9
0
9
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
P
C
4
9
1
1
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
9
1
1
S
C
1
0
U
2
5
V
5
K
X
-G
P
1
2
P
C
4
9
1
4
S
C
4
D
7
U
2
5
V
5
K
X
-G
P
P
C
4
9
1
4
S
C
4
D
7
U
2
5
V
5
K
X
-G
P
1 2
PG4919
GAP-CLOSE-PWR-3-GP
PG4919
GAP-CLOSE-PWR-3-GP
1
2
PR4903
10KR2F-2-GP
PR4903
10KR2F-2-GP
1
2
PC4918
SCD22U10V2KX-1GP
PC4918
SCD22U10V2KX-1GP
1 2
PG4918
GAP-CLOSE-PWR-3-GP
PG4918
GAP-CLOSE-PWR-3-GP
1
2
P
T
4
9
0
3
S
E
3
3
0
U
2
D
5
V
M
-1
4
-G
P
79.3371V.6CL
P
T
4
9
0
3
S
E
3
3
0
U
2
D
5
V
M
-1
4
-G
P
79.3371V.6CL
1
2
PC4922
SC330P50V2KX-3GP
DY PC4922
SC330P50V2KX-3GP
DY
1
2
P
G
4
9
0
7
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
P
G
4
9
0
7
G
A
P
-C
L
O
S
E
-P
W
R
-3
-G
P
1 2
PG4914
GAP-CLOSE-PWR-3-GP
PG4914
GAP-CLOSE-PWR-3-GP
1 2
PG4922
GAP-CLOSE-PWR-3-GP
PG4922
GAP-CLOSE-PWR-3-GP
1 2
PG4904
GAP-CLOSE-PWR-3-GP
PG4904
GAP-CLOSE-PWR-3-GP
1 2
PG4920
GAP-CLOSE-PWR-3-GP
PG4920
GAP-CLOSE-PWR-3-GP
1 2
PG4909
GAP-CLOSE-PWR-3-GP
PG4909
GAP-CLOSE-PWR-3-GP
1 2
PG4913
GAP-CLOSE-PWR-3-GP
PG4913
GAP-CLOSE-PWR-3-GP
1 2
PG4917
GAP-CLOSE-PWR-3-GP
PG4917
GAP-CLOSE-PWR-3-GP
VTT 3
VREF6
VTTS 1
V5IN 12
VTTIN 2
PGND 10
PGOOD20
VDDQS 9
MODE19
VTTGND 4
VBST 15
DRVH 14
SW 13
DRVL 11
GND7
GND21
EN/PSV16
VTTEN17
REFIN8
TRIP18
VTTREF5
PU4901
TPS51216RUKR-GP
74.51216.073
PU4901
TPS51216RUKR-GP
74.51216.073
1 2
PG4912
GAP-CLOSE-PWR-3-GP
PG4912
GAP-CLOSE-PWR-3-GP
1 2
PG4915
GAP-CLOSE-PWR-3-GP
PG4915
GAP-CLOSE-PWR-3-GP
123
4
5 6 7 8
SSS
G
D D D D
P
U
4
9
0
3
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
SSS
G
D D D D
P
U
4
9
0
3
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
1
2
P
C
4
9
2
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
P
C
4
9
2
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
P
C
4
9
2
0
S
C
4
D
7
U
6
D
3
V
5
K
X
-3
G
P
P
C
4
9
2
0
S
C
4
D
7
U
6
D
3
V
5
K
X
-3
G
P
1
2P
C
4
9
0
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
P
C
4
9
0
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
1
2P
C
4
9
1
7
S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
P
C
4
9
1
7
S
C
1
0
U
6
D
3
V
5
K
X
-1
G
P
DY
1
2
E
C
4
6
0
1
S
C
D
1
U
5
0
V
3
K
X
-G
PDY
E
C
4
6
0
1
S
C
D
1
U
5
0
V
3
K
X
-G
PDY
1
2
P
C
4
9
1
2
S
C
1
0
U
2
5
V
5
K
X
-G
P
P
C
4
9
1
2
S
C
1
0
U
2
5
V
5
K
X
-G
P
1 2
PG4910
GAP-CLOSE-PWR-3-GP
PG4910
GAP-CLOSE-PWR-3-GP
1
2
P
C
4
9
1
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
P
C
4
9
1
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
1 2PR4907
0R0402-PAD-2-GP
PR4907
0R0402-PAD-2-GP
1 2
PG4908
GAP-CLOSE-PWR-3-GP
PG4908
GAP-CLOSE-PWR-3-GP
1 2
PG4901
GAP-CLOSE-PWR-3-GP
PG4901
GAP-CLOSE-PWR-3-GP
1
2
EC4901S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
EC4901S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
123
4
5 6 7 8
SSS
G
D D D D
P
U
4
9
0
2
S
IR
1
7
2
A
D
P
-T
1
-G
E
3
-G
P
SSS
G
D D D D
P
U
4
9
0
2
S
IR
1
7
2
A
D
P
-T
1
-G
E
3
-G
P
1 2
PG4905
GAP-CLOSE-PWR-3-GP
PG4905
GAP-CLOSE-PWR-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D5V_EN
PWR_1D5V_EN
1D5V_PWR 1D5V_S0
3D3V_S5
PM_SLP_S3#[17,24,36,48,49]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RT9198-15PU5R_1D5V
A3
51 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RT9198-15PU5R_1D5V
A3
51 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
RT9198-15PU5R_1D5V
A3
51 101Friday, June 28, 2013
<Core Design>
SSID = PWR.Plane.Regulator_1p5vDesign Current = 15mA
TLV70215DBVR for 1D5V_S0
0108 Reserve PC5101 
IN1
GND2
EN3 NC#4 4
OUT 5
PU5101
TLV70215DBVR-GP
PU5101
TLV70215DBVR-GP
1 2
PG5101
GAP-CLOSE-PWR
PG5101
GAP-CLOSE-PWR
12 PR5108
0R0402-PAD-2-GP
PR5108
0R0402-PAD-2-GP
1
2
P
C
5
1
0
4
S
C
1
U
6
D
3
V
2
K
X
-G
P
P
C
5
1
0
4
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
PC5101
SCD1U10V2KX-5GPDY
PC5101
SCD1U10V2KX-5GPDY
1
2
P
C
5
1
0
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
P
C
5
1
0
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BKLT_CTRL
LCD_TST_C
LCD_BRIGHTNESS
BLON_OUT_C
EDP_HP/LVDS_3D3V_ROM
EDP_TX1/LVDS_DATA1
EDP_TX1/LVDS_DATA1#
EDP_TX0/LVDS_DATA0#
EDP_TX0/LVDS_DATA0
EDP_AUX/LVDS_DDC_CLK
EDP_AUX#/LVDS_DDC_DAT
USB_CAMERA#
USB_CAMERA
LVDS_CLK#_R
LVDS_CLK_R
EDP_TX1/LVDS_DATA1
EDP_TX1/LVDS_DATA1#
LVDS_DATA2_R
LVDS_DATA2#_R
EDP_TX0/LVDS_DATA0
EDP_TX0/LVDS_DATA0#
DBC_EN_R
EDP_AUX#/LVDS_DDC_DAT
EDP_AUX/LVDS_DDC_CLK
COLOR_ENGINE_CONN
EDP_HP/LVDS_3D3V_ROM
LCD_TST_C
BLON_OUT_C
LCD_BRIGHTNESS
USB_CAMERA
USB_CAMERA#
DMIC_CLK
DMIC_DATA
3D3V_CAMERA_S0
LVDS_VDD_EN
EN_LCDPWR
LCDPWR_EN
BKLT_CTRL
BLON_OUT_C
EDP_HPD
USB_PP6_TPNL
USB_PN6_TPNL
USB_PP6_TPNL
TOUCH_PANEL_INTR#
TPAN_VDD
USB_PN6_TPNL
DMIC_CLK_C
USB_CAMERA
USB_CAMERA#
BKLT_CTRL
USB_PP6_TPNL
USB_PN6_TPNL
DCBATOUT_LCDDCBATOUT
3D3V_S0
3D3V_CAMERA_S0
3D3V_S0
DCBATOUT_LCD
LCDVDD
LCDVDD
LCDVDD
3D3V_S0
TPAN_VDD5V_S0
3D3V_CAMERA_S0
TPAN_VDD
eDP_BKLT_CTRL [53]
LCD_TST [24]
BLON_OUT [24]
LVDS_CLK#_R [53]
LVDS_CLK_R [53]
LVDS_DATA2#_R [53]
LVDS_DATA2_R [53]
LVDSA_DATA1#[53]
LVDSA_DATA1[53]
EDP_TX0_DN_CON_L[53]
EDP_TX0_DP_CON_L[53]
LVDSA_DATA0#[53]
LVDSA_DATA0[53]
EDP_TX1_DN_CON_L[53]
EDP_TX1_DP_CON_L[53]
EDP_AUX_DN_CON_L[53]
EDP_AUX_DP_CON_L[53]
LVDS_DDC_DATA_R[53]
LVDS_DDC_CLK_R[53] EDP_HPD[15,53]
EC_BRIGHTNESS [24]
USB_PP4 [16]
USB_PN4 [16]
COLOR_ENGINE [20]
DBC_EN [20]
LCD_TST_EN[24]
LVDS_VDD_EN[53]
EDP_VDD_EN[15]
USB_PP6 [16]
USB_PN6 [16]
DMIC_DATA [27]
DMIC_CLK [27]
TOUCH_PANEL_INTR# [24]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LCD Connector
Custom
52 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LCD Connector
Custom
52 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LCD Connector
Custom
52 101Friday, June 28, 2013
<Core Design>
LCDVDD
INVERTER POWER
800mA
eDP/ LVDS select circuit
EC (BIST MODE)
LCD Power
LVDS / EDP Colay Page 53
PL Page 53.
CAMERACamera Power
303mA
SSID = VIDEO
600mA
Layout Note:
Trace width = 80mil
Layout Note:
Trace width = 80mil
need close to connector
need close to connector
Touch panel
1
Pin 
EDP_HP 3D3V_ROM
LCD_TST_C
EDP_AUX LVDS_DDC_CLK
LCD_TST_C
2
EDP_AUX# LVDS_DDC_DAT
GND GND
EDP_TX0N LVDS_DATA0#
EDP_TX0P LVDS_DATA0
GND GND
EDP_TX1N LVDS_DATA1#
EDP_TX1P LVDS_DATA1
GND GND
NC LVDS_DATA2#
NC LVDS_DATA2
3
4
5
6
7
8
9
10
11
12
13
14
15
Pin 
21
24
25
26
27
28
29
30
22
23
eDP eDPLVDS LVDS
16
17
18
19
20
NC
GND
GND
GND
GND
GND
GND
GND
GND
LCDVDD
LCDVDD
LCDVDD
LCDVDD
LCDVDD
LCDVDD
LCDVDD
LCDVDD
LVDS_CLK#_R
LVDS_CLK_RNC
DBC_EN DBC_EN
BRIGHTNESS BRIGHTNESS
BLON_OUT BLON_OUT
Color_Engine Color_Engine
NC
DCBATOUT_LCD
DCBATOUT_LCD
NC
DCBATOUT_LCD
DCBATOUT_LCD
0307 modify
X02 change CAM1 connector
X02 remove TPNL1
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
A00 0618
1 AFTP5206AFTP5206
1 2
R5228
0R2J-2-GP
DY
R5228
0R2J-2-GP
DY
1 AFTP5210AFTP5210
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LCD1
STAR-CON30-4-GP
LCD1
STAR-CON30-4-GP
1 2C5219 SCD1U10V2KX-5GP
eDPC5219 SCD1U10V2KX-5GPeDP
1
2
C5205
SCD1U50V3KX-GP
DYC5205
SCD1U50V3KX-GP
DY
1 2
EL5201
BLM15AG221SN-GP
68.00094.991
EL5201
BLM15AG221SN-GP
68.00094.991
1
2
C5202
S
C
1
K
P
5
0
V
2
K
X
-1
G
P
C5202
S
C
1
K
P
5
0
V
2
K
X
-1
G
P
1
2 3
4
RN5207 SRN0J-6-GP
LVDS
RN5207 SRN0J-6-GP
LVDS
1 2F5202 FUSE-2A32V-16-GPDYF5202 FUSE-2A32V-16-GPDY
12
R5220
0R0603-PAD-2-GP-U
R5220
0R0603-PAD-2-GP-U
1
2 3
4
RN5206 SRN0J-6-GP
LVDS
RN5206 SRN0J-6-GP
LVDS
1
2
C5204
SC4D7U6D3V3KX-GPeDP
C5204
SC4D7U6D3V3KX-GPeDP
1 2
R5229
0R3J-0-U-GP
R5229
0R3J-0-U-GP
1
2
R5202
1
0
0
K
R
2
J
-1
-G
P
2136_LCDVDD
R5202
1
0
0
K
R
2
J
-1
-G
P
2136_LCDVDD
1 2C5216 SCD1U10V2KX-5GP
eDP
C5216 SCD1U10V2KX-5GP
eDP
1 AFTP5208AFTP5208
1
2 3
4RN5208 SRN0J-6-GP
LVDS
RN5208 SRN0J-6-GP
LVDS
1 2
F5204
POLYSW-D5A6V-1-GP
69.50007.921
DY
F5204
POLYSW-D5A6V-1-GP
69.50007.921
DY
1 AFTP5203AFTP5203
1
2
EC5206
SC10P50V2JN-4GP
DY
EC5206
SC10P50V2JN-4GP
DY
1
2
C5203S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
C5203S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
1 2R5214 0R3J-0-U-GPR5214 0R3J-0-U-GP
1
2
EC5204
SC10P50V2JN-4GP
DYEC5204
SC10P50V2JN-4GP
DY
1
2
3
4 5
6
7
8
RN5204
SRN100KJ-5-GP
RN5204
SRN100KJ-5-GP
1
2
R5209
100KR2J-1-GPeDP
R5209
100KR2J-1-GPeDP
1 AFTP5202AFTP5202
1
2
EC5201S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
EC5201S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1 2C5217 SCD1U10V2KX-5GP
eDP
C5217 SCD1U10V2KX-5GP
eDP
1 2C5215 SCD1U10V2KX-5GP
eDPC5215 SCD1U10V2KX-5GPeDP
1 2R5201 0R3J-0-U-GPLVDSR5201 0R3J-0-U-GPLVDS
11
8
16
12
2
10
6
1
3
9
14
7
5
4
13
15
CAM1
ACES-CON14-9-GP
CAM1
ACES-CON14-9-GP
1 2R5224
0R0402-PAD-2-GP
R5224
0R0402-PAD-2-GP
1
2
EC5203
SC10P50V2JN-4GP
DYEC5203
SC10P50V2JN-4GP
DY
1 AFTP5207AFTP5207
1 2C5218 SCD1U10V2KX-5GP
eDPC5218 SCD1U10V2KX-5GPeDP
12 R5225
0R0603-PAD-2-GP-U
R5225
0R0603-PAD-2-GP-U
1 2C5220 SCD1U10V2KX-5GP
eDP
C5220 SCD1U10V2KX-5GP
eDP
1 2R5222
0R0402-PAD-2-GP
R5222
0R0402-PAD-2-GP
1
2
E
C
5
2
0
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
E
C
5
2
0
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1 AFTP5204AFTP5204
1 2R5212
0R3J-0-U-GP
2136_LCDVDD
R5212
0R3J-0-U-GP
2136_LCDVDD
1
2
EC5205
SC10P50V2JN-4GP
DY
EC5205
SC10P50V2JN-4GP
DY
12
R5221
0R0603-PAD-2-GP-U
R5221
0R0603-PAD-2-GP-U
1
2
3
4 5
6
7
8
RN5201
SRN100J-4-GP
RN5201
SRN100J-4-GP
12 R5223
0R0603-PAD-2-GP-U
R5223
0R0603-PAD-2-GP-U
EN
1
GND
2
VOUT
3
VIN#5
5
VIN#4
4
U5201
RT9724GB-GP
74.09724.09F
eDP
U5201
RT9724GB-GP
74.09724.09F
eDP
1 2
F5203
POLYSW-D5A6V-1-GP
69.50007.921
DY
F5203
POLYSW-D5A6V-1-GP
69.50007.921
DY
1 2
R5207
0R2J-2-GP
eDP
R5207
0R2J-2-GP
eDP
1 2
R5208
0R2J-2-GP
DY
R5208
0R2J-2-GP
DY 1
2
3
D5201
BAT54CPT-2-GP
75.00054.K7D
eDP
D5201
BAT54CPT-2-GP
75.00054.K7D
eDP
21
D5202
CH751H-40PT-GP
83.R0304.A8F
D5202
CH751H-40PT-GP
83.R0304.A8F
1 AFTP5205AFTP5205
1 2
F5201
POLYSW-1D1A24V-GP-U
2nd = 69.50007.D31
69.50007.A31
3rd = 69.50007.A41
F5201
POLYSW-1D1A24V-GP-U
2nd = 69.50007.D31
69.50007.A31
3rd = 69.50007.A41
1 AFTP5209AFTP5209
1 2R5211
0R3J-0-U-GP
2136_LCDVDD
R5211
0R3J-0-U-GP
2136_LCDVDD
12R5203 100R2J-2-GPeDPR5203 100R2J-2-GPeDP
1
2
C5201
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C5201
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1
2
C
5
2
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
5
2
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SWR_V12
CIICSCL1
CIICSDA1
CIICSCL
SWR_LX
CIICSDA
EDP_TX1_DN_CON_L
EDP_TX0_DN_CON_L
EDP_TX0_DP_CON_L
EDP_TX1_DP_CON_L
2136_PWM_IN
eDP_BKLT_CTRL
EDP_AUX_DP_CON_L
EDP_AUX_DN_CON_L
EDP_TX0_DN_RTS2136
EDP_TX0_DP_RTS2136
EDP_AUX_DP_RTS2136
EDP_AUX_DN_RTS2136
EDP_TX1_DN_RTS2136
EDP_TX1_DP_RTS2136
EDP_HPD_RTS2136
2136_PWM_IN
TEST_MODE
CIICSDA1
EEPROM_SDA0
S
W
R
_
V
1
2
LVDS_DDC_CLK_R
DP_REXT
SWR_V12
EDP_AUX_DN_RTS2136
EDP_TX1_DP_RTS2136
EDP_TX1_DN_RTS2136
S
W
R
_
L
X
LVDS_DDC_CLK_R
EDP_HPD_RTS2136EEPROM_SDA0
EEPROM_SCL0
EDP_AUX_DP_RTS2136
EDP_TX0_DP_RTS2136
EDP_TX0_DN_RTS2136
TEST_MODE
LVDS_DDC_DATA_R
DP_AVCC33
DP_AVCC33
2136_PWM_IN
CIICSCL1
LVDS_DDC_DATA_R
EEPROM_SCL0
3D3V_S0
3D3V_S0
DP_AVCC33
DP_DVCC33
3D3V_S0
3D3V_S0
DP_DVCC33
3D3V_S0
DP_DVCC33
SWR_V12
BAT_SDA [24,43,44]
BAT_SCL [24,43,44]
SML0_CLK [18]
EDP_TX0_DN[8]
EDP_AUX_DP[8]
EDP_AUX_DN[8]
EDP_TX0_DP[8]
EDP_TX1_DP[8]
EDP_TX1_DN[8]
EDP_TX1_DN_CON_L [52]
EDP_TX1_DP_CON_L [52]
EDP_TX0_DN_CON_L [52]
EDP_TX0_DP_CON_L [52]
EDP_AUX_DN_CON_L [52]
EDP_AUX_DP_CON_L [52]
eDP_BKLT_CTRL [52]
L_BKLT_CTRL[15]
EDP_HPD[15,52]
LVDS_DDC_CLK_R[52]
LVDS_DDC_DATA_R[52]
LVDSA_DATA0 [52]
LVDSA_DATA0# [52]
LVDSA_DATA1 [52]
LVDSA_DATA1# [52]
LVDS_DATA2_R [52]
LVDS_DATA2#_R [52]
eDP_BKLT_CTRL[52]
LVDS_R2136_BKLT_EN[24]
LVDS_VDD_EN[52]
LVDS_CLK#_R [52]
LVDS_CLK_R [52]
SML0_DATA [18]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LVDS_Switch
Custom
53 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LVDS_Switch
Custom
53 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LVDS_Switch
Custom
53 101Friday, June 28, 2013
<Core Design>
PCH
KBC
PCH
KBC
Place near U5301
Layout Note:
Brightness
LVDS & EDP Colay
Close to PIN5
Close to PIN13
SSID = VIDEO
0
PIN48
X
1
EP Mode
PIN47
ROM EEPOOM
0
1
Operation Mode Table
X02 change to 4P2R
A00 0618
1
2
C5309
SCD1U10V2KX-5GP
LVDSC5309
SCD1U10V2KX-5GP
LVDS
1
2 3
4
RN5305
SRN0J-6-GP
LVDS
RN5305
SRN0J-6-GP
LVDS
1
2
R5301
12KR2F-L-GPLVDS
R5301
12KR2F-L-GPLVDS
1 2R5319 0R2J-2-GPLVDSR5319 0R2J-2-GPLVDS
1
2
C5310S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
C5310S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
1
2
C5307S
C
1
0
U
6
D
3
V
3
M
X
-G
P
LVDS
C5307S
C
1
0
U
6
D
3
V
3
M
X
-G
P
LVDS
1 2
C5311
SCD1U10V2KX-5GP
DY
C5311
SCD1U10V2KX-5GP
DY
1
2
C5312S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
C5312S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
1 2C5213 SCD1U10V2KX-5GP
LVDS
C5213 SCD1U10V2KX-5GP
LVDS
1
2 3
4
RN5302 SRN0J-6-GP
eDP
RN5302 SRN0J-6-GP
eDP
1
2 3
4RN5304 SRN0J-6-GP
eDP
RN5304 SRN0J-6-GP
eDP
1
2
C
5
3
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
LVDS
C
5
3
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
LVDS
1
2 3
4
RN5307
SRN0J-6-GP
DY
RN5307
SRN0J-6-GP
DY
1
2
C5306S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDSC5306SC
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
1
2
C5308
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
C5308
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
1
2
R5306
4
K
7
R
2
J
-2
-G
P
LVDS
R5306
4
K
7
R
2
J
-2
-G
P
LVDS
1 2C5210 SCD1U10V2KX-5GP
LVDS
C5210 SCD1U10V2KX-5GP
LVDS
1
2
C
5
3
0
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
5
3
0
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
R5307
4
K
7
R
2
J
-2
-G
P
LVDS
R5307
4
K
7
R
2
J
-2
-G
P
LVDS
1
2 3
4
RN5303 SRN0J-6-GP
eDP
RN5303 SRN0J-6-GP
eDP
1 2C5214 SCD1U10V2KX-5GP
LVDS
C5214 SCD1U10V2KX-5GP
LVDS
1
2
C5316
SCD1U10V2KX-5GP
LVDSC5316
SCD1U10V2KX-5GP
LVDS
1 2C5211 SCD1U10V2KX-5GP
LVDS
C5211 SCD1U10V2KX-5GP
LVDS
1
2
R5317
4
K
7
R
2
J
-2
-G
P
DY
R5317
4
K
7
R
2
J
-2
-G
P
DY
1 2C5212 SCD1U10V2KX-5GP
LVDS
C5212 SCD1U10V2KX-5GP
LVDS
1 2R5314
0R0603-PAD-2-GP-U
R5314
0R0603-PAD-2-GP-U
1 2
L5302
MPZ1608S600AT-GP
68.00212.011
LVDS
L5302
MPZ1608S600AT-GP
68.00212.011
LVDS
1 2
L5301
MPZ1608S600AT-GP
68.00212.011
LVDS
L5301
MPZ1608S600AT-GP
68.00212.011
LVDS
1 2C5209 SCD1U10V2KX-5GP
LVDS
C5209 SCD1U10V2KX-5GP
LVDS
1
2 3
4
RN5306
SRN100KJ-6-GP
LVDS
RN5306
SRN100KJ-6-GP
LVDS
1
2
R5318
4
K
7
R
2
J
-2
-G
P
DY
R5318
4
K
7
R
2
J
-2
-G
P
DY
1 2R5320 0R2J-2-GPeDPR5320 0R2J-2-GPeDP
HPD
1
TEST
2
AUX_N
3
AUX_P
4
DP_V33
5
DP_GND
6
LANE0_P
7
LANE0_N
8
LANE1_P
9
LANE1_N
10
DP_V12
11
DP_REXT
12
C
II
C
S
C
L
1
3
C
II
C
S
D
A
1
4
S
W
R
_
V
C
C
K
1
5
S
W
R
_
G
N
D
1
6
S
W
R
_
L
X
1
7
S
W
R
_
V
D
D
1
8
P
W
M
_
O
U
T
1
9
P
A
N
E
L
_
V
C
C
2
0
P
W
M
_
IN
2
1
P
V
C
C
2
2
T
X
E
3
+
2
3
T
X
E
3
-
2
4
TXEC+
25
TXEC-
26
TXE2+
27
TXE2-
28
TXE1+
29
TXE1-
30
TXE0+
31
TXE0-
32
TXO3+
33
TXO3-
34
TXOC+
35
TXOC-
36
T
X
O
2
+
3
7
T
X
O
2
-
3
8
T
X
O
1
+
3
9
T
X
O
1
-
4
0
T
X
O
0
+
4
1
T
X
O
0
-
4
2
V
C
C
K
4
3
B
L
_
E
N
4
4
M
II
C
S
D
A
4
5
M
II
C
S
C
L
4
6
M
O
D
E
_
C
F
G
0
4
7
M
O
D
E
_
C
F
G
1
4
8
G
N
D
4
9
U5301
RTD2136R-CGT-GP
71.02136.B03
LVDS
U5301
RTD2136R-CGT-GP
71.02136.B03
LVDS
1
2C5317SC
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
C5317S
C
D
1
U
1
0
V
2
K
X
-5
G
P
LVDS
1
2
C
5
3
0
5
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
LVDS
C
5
3
0
5
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
LVDS
1
2
3 4
5
6
Q5301
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
LVDS
Q5301
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
LVDS
1
2
3
4 5
6
7
8
RN5301
SRN4K7J-10-GP
LVDS
RN5301
SRN4K7J-10-GP
LVDS
1
2
C5303S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C5303S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1 2
L5303
IND-4D7UH-300-GP
2136_SW
L5303
IND-4D7UH-300-GP
2136_SW
1
2
C5313
SCD1U10V2KX-5GP
DY C5313
SCD1U10V2KX-5GP
DY
1 2
R5302
1KR2J-1-GP
LVDS
R5302
1KR2J-1-GP
LVDS
www.qdzbwx.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI_CLK_R_C
HDMI_CLK_R_C#
HDMI_DATA2_R_C#
HDMI_DATA2_R_C
HDMI_DATA1_R_C
HDMI_DATA1_R_C#
HDMI_DATA0_R_C
HDMI_DATA0_R_C#
HDMI_PLL_GND
D
5
1
0
2
_
1
D
5
1
0
2
_
2
DDC_CLK_HDMI
DDC_DATA_HDMI
HPD_HDMI_CON
HDMI_HPD_B
HDMI_HPD_E
HDMI_CLK_R_C#
HDMI_CLK_R_C
HDMI_DATA0_R_C
HDMI_DATA0_R_C#
HDMI_DATA2_R_C#
HDMI_DATA2_R_C
HDMI_DATA1_R_C
HDMI_DATA1_R_C#
HDMI_DATA0_R_C_CON
HDMI_CLK_R_C#_CON
HDMI_DATA1_R_C#_CON
HDMI_DATA2_R_C#_CON
HDMI_DATA0_R_C#_CON
HDMI_CLK_R_C_CON
HDMI_DATA1_R_C_CON
DDC_DATA_HDMI
DDC_CLK_HDMI
HDMI_DATA2_R_C_CON
HDMI_CLK_R_C#_CON
HDMI_CLK_R_C_CON
HDMI_DATA0_R_C_CON
HDMI_DATA0_R_C#_CON
HDMI_DATA2_R_C_CON
HDMI_DATA2_R_C#_CON
HDMI_DATA1_R_C#_CON
HDMI_DATA1_R_C_CON
5V_S0 5V_HDMI_S0
5V_S0
5V_HDMI_S0
3D3V_S0
3D3V_S0
5V_HDMI_S0
HDMI_DATA2[8]
HDMI_CLK#[8]
HDMI_CLK[8]
HDMI_DATA0#[8]
HDMI_DATA0[8]
HDMI_DATA1#[8]
HDMI_DATA1[8]
HDMI_DATA2#[8]
PCH_HDMI_CLK[15]
PCH_HDMI_DATA[15]
HDMI_PCH_DET[15]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
HDMI Repeater/Connector
A3
54 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
HDMI Repeater/Connector
A3
54 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
HDMI Repeater/Connector
A3
54 101Friday, June 28, 2013
<Core Design>
SSID = VIDEO
HDMI CONN
0307 change RN5401 RN5402 form
 680 ohm to 470 ohm
ER5401~04 change to 180R
A00 0618
A00 0618
A00 0618
A00 0618
A00 0619
A00 0619
A00 0619
A00 0619
1 2C5404 SCD1U10V2KX-5GPC5404 SCD1U10V2KX-5GP
1 2 3 4
5678
RN5402
SRN470J-5-GP
RN5402
SRN470J-5-GP
1 2
R5401
0R3J-0-U-GP
R5401
0R3J-0-U-GP
1
2
ER5402
150R2J-L1-GP-U
ER5402
150R2J-L1-GP-U
1 2
R5407
0R3J-0-U-GP
R5407
0R3J-0-U-GP
1 2R5411
150KR2J-L1-GP
R5411
150KR2J-L1-GP
1 2
R5406
0R3J-0-U-GP
R5406
0R3J-0-U-GP
1 2
F5401
POLYSW-1D1A8V-5-GP
F5401
POLYSW-1D1A8V-5-GP
1 2C5402 SCD1U10V2KX-5GPC5402 SCD1U10V2KX-5GP
20
21
22
23
1
23
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
HDMI1
SKT-HDMI23-97-GP
22.10296.A31
HDMI1
SKT-HDMI23-97-GP
22.10296.A31
1 2
R5402
0R3J-0-U-GP
R5402
0R3J-0-U-GP
1 2C5408 SCD1U10V2KX-5GPC5408 SCD1U10V2KX-5GP
1
2
R5414
10KR2J-3-GP
R5414
10KR2J-3-GP
1 2
R5413
0R0402-PAD-2-GP
R5413
0R0402-PAD-2-GP
12
3
D5401
BAW56-11-GP
2nd = 75.00056.A7D
75.00056.B7D
D5401
BAW56-11-GP
2nd = 75.00056.A7D
75.00056.B7D
1 2 3 4
5678
RN5401
SRN470J-5-GP
RN5401
SRN470J-5-GP
1
2
ER5401
150R2J-L1-GP-U
ER5401
150R2J-L1-GP-U
1
2
R5412
20KR2J-L2-GP
DY R5412
20KR2J-L2-GP
DY
1
2
34
5
6
Q5401
2N7002KDW-GP
84.2N702.A3F
Q5401
2N7002KDW-GP
84.2N702.A3F
1 2C5403 SCD1U10V2KX-5GPC5403 SCD1U10V2KX-5GP
1 2C5407 SCD1U10V2KX-5GPC5407 SCD1U10V2KX-5GP
3
1
2
Q5402
PMBS3904-1-GP
84.03904.L06
Q5402
PMBS3904-1-GP
84.03904.L06
1AFTP5401AFTP5401
G
S
D
U5401
2N7002K-2-GP
84.2N702.J31
U5401
2N7002K-2-GP
84.2N702.J31
1 2
34
RN5203
SRN2K2J-1-GP
RN5203
SRN2K2J-1-GP
1 2
R5408
0R3J-0-U-GP
R5408
0R3J-0-U-GP
1 2C5405 SCD1U10V2KX-5GPC5405 SCD1U10V2KX-5GP
1 2C5406 SCD1U10V2KX-5GPC5406 SCD1U10V2KX-5GP
1 2C5401 SCD1U10V2KX-5GPC5401 SCD1U10V2KX-5GP
1 2
R5404
0R3J-0-U-GP
R5404
0R3J-0-U-GP
1 2
R5403
0R3J-0-U-GP
R5403
0R3J-0-U-GP
1
TP5411TP5411
1
2
C5417
SCD1U10V2KX-5GP
C5417
SCD1U10V2KX-5GP
1
2
ER5403
150R2J-L1-GP-U
ER5403
150R2J-L1-GP-U
1
2
ER5404
150R2J-L1-GP-U
ER5404
150R2J-L1-GP-U
1 2
R5405
0R3J-0-U-GP
R5405
0R3J-0-U-GP
SATA3_DRX_CTX_N0_C
SATA3_DRX_CTX_P0_C
SATA3_EQ1_HDD
SATA3_DE1_HDD
SATA3_EQ2_HDD
SATA3_DE2_HDD
SATA3_PRX_DTX_P0_L
SATA3_DTX_CRX_N0
HDD_DEW1
SATA3_PRX_DTX_N0_L
SATA3_DRX_CTX_P0
SATA3_DRX_CTX_N0
SATA3_DTX_CRX_P0
SATA3_PTX_DRX_P0_R
SATA3_PTX_DRX_N0_R
SATA3_DRX_CTX_P0
SATA3_DRX_CTX_N0
HDD_DEVSLP_R
SATA3_DTX_CRX_N0_CSATA3_DTX_CRX_N0
SATA3_DTX_CRX_P0_CSATA3_DTX_CRX_P0
HDD_DEW2
FFS_INT2_Q_R
5V_S0
5V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
SATA3_PTX_DRX_N0[19]
SATA3_PTX_DRX_P0[19]
SATA3_PRX_DTX_P0 [19]
SATA3_PRX_DTX_N0 [19]
HDD_DEVSLP[20]
FFS_INT2_Q[67]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
HDD
A3
56 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
HDD
A3
56 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
HDD
A3
56 101Friday, June 28, 2013
<Core Design>
SSID = SATA
HDD CONN
Layout Note:
AC coupling Cap; 
place near CONN(<100mils)
HDD Re-driver
Need to check conn pin define
A00 0618
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
HDD1
ACES-CON20-28-GP
20.F2036.020
HDD1
ACES-CON20-28-GP
20.F2036.020
12C5606 SCD01U16V2KX-3GPC5606 SCD01U16V2KX-3GP
1 2
C5609 SCD01U16V2KX-3GPC5609 SCD01U16V2KX-3GP
1 2R5602
0R0402-PAD-2-GP
R5602
0R0402-PAD-2-GP
1
2
C
5
6
1
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
5
6
1
1
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
R5603
10KR2J-3-GPDY
R5603
10KR2J-3-GPDY
RX1P1
RX1N2
TX2N 4
TX2P 5
DEW26
EN 7
DE28
DE19
RX2P11
RX2N12
TX1N 14
TX1P 15
DEW116
GND 3
GND 13
GND 18
GND 21
VCC10
VCC20
EQ1 17
EQ2 19
U5601
SN75LVCP601RTJR-GP
71.75601.003
U5601
SN75LVCP601RTJR-GP
71.75601.003
1
2
R5606
10KR2J-3-GP
DYR5606
10KR2J-3-GP
DY
1
2
R5601
10KR2J-3-GP DY
R5601
10KR2J-3-GP DY
1 2
C5610 SCD01U16V2KX-3GPC5610 SCD01U16V2KX-3GP
1
2
C5603
SCD1U10V2KX-5GPDY
C5603
SCD1U10V2KX-5GPDY
1
2
R5607
10KR2J-3-GPDY
R5607
10KR2J-3-GPDY
1 2C5604 SCD01U16V2KX-3GPC5604 SCD01U16V2KX-3GP
1
2
R5609
10KR2J-3-GP DY
R5609
10KR2J-3-GP DY
1
2
R5608
10KR2J-3-GPDY
R5608
10KR2J-3-GPDY
1
2
C
5
6
0
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
5
6
0
2
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1 2R5614
0R0402-PAD-2-GP
R5614
0R0402-PAD-2-GP
1
2
R5610
4K7R2J-2-GP
R5610
4K7R2J-2-GP
1
2
R5611
4K7R2J-2-GP
DY
R5611
4K7R2J-2-GP
DY
1 2C5601 SCD01U16V2KX-3GPC5601 SCD01U16V2KX-3GP
12C5605 SCD01U16V2KX-3GPC5605 SCD01U16V2KX-3GP
1
2
C
5
6
1
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
5
6
1
2
S
C
1
U
6
D
3
V
2
K
X
-G
P
1
2
C
5
6
1
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
C
5
6
1
3
S
C
1
U
6
D
3
V
2
K
X
-G
P
1 2
C5608 SCD01U16V2KX-3GPC5608 SCD01U16V2KX-3GP
1
2
R5604
10KR2J-3-GPDY
R5604
10KR2J-3-GPDY
1
2
R5613
4K7R2J-2-GPDY
R5613
4K7R2J-2-GPDY
1 2
C5607 SCD01U16V2KX-3GPC5607 SCD01U16V2KX-3GP
1
2
R5605
10KR2J-3-GP
DYR5605
10KR2J-3-GP
DY
1
2
R5612
4K7R2J-2-GP
R5612
4K7R2J-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_PN5_R
USB_PP5_R
WLAN_22
WLAN_ACT
BT_ACT
E51_TxD_R
E51_RxD_R
USB_PP5_R
USB_PN5_R
3D3V_S0 3D3V_WLAN_AOAC
3D3V_S5
3D3V_WLAN_AOAC
5V_S5
3D3V_WLAN_AOAC
USB_PP5 [16]
USB_PN5 [16]
AOAC_WLAN_EN[24]
WIFI_RF_EN[24]
WIFI_WAKE#[24]
BLUETOOTH_EN[20]
E51_TxD[24]
CLK_PCIE_WLAN_P3[18]
CLK_PCIE_WLAN_N3[18]
PCH_SMBDATA[12,13,18,62,67]
PCH_SMBCLK[12,13,18,62,67]
PCIE_PTX_WLANRX_P3_C[16]
PCIE_PTX_WLANRX_N3_C[16]
PCIE_PRX_WLANTX_N3[16]
PCIE_PRX_WLANTX_P3[16]
CLK_PCIE_WLAN_REQ3#[18]
PLT_RST#[17,24,30,65,73]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
WLAN/BT
A3
58 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
WLAN/BT
A3
58 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
WLAN/BT
A3
58 101Friday, June 28, 2013
<Core Design>
SSID = Wireless
1210 Low Active change to High Active
(Need to confirm with the SW)
1.1A
WLAN CONN
0311 modify power rail
A00 0618
A00 0618
A00 0618
A00 0618
1
2
C
5
8
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
C
5
8
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
53
54
NP1
NP2
WLAN1
MINIPCI52P-8-GP-U1
62.10043.B91
WLAN1
MINIPCI52P-8-GP-U1
62.10043.B91
1TP5801TP5801
1 2R5804
0R0402-PAD-2-GP
R5804
0R0402-PAD-2-GP
1 2R5805 0R0603-PAD-2-GP-UR5805 0R0603-PAD-2-GP-U
1 2
R5807
10KR2J-3-GP
DY
R5807
10KR2J-3-GP
DY
1
2
C5805
SCD1U10V2KX-5GP
C5805
SCD1U10V2KX-5GP
1
2
C5806S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C5806S
C
D
1
U
1
0
V
2
K
X
-5
G
P
GND1
IN#22
IN#33
EN/EN#4 OCB 5
OUT#6 6
OUT#7 7
OUT#8 8
U5801
SY6288CCAC-GP
74.06288.079
AOAC
U5801
SY6288CCAC-GP
74.06288.079
AOAC
1
2
R5809
10KR2J-3-GP
R5809
10KR2J-3-GP
1 2
R5806
0R3J-0-U-GP
NON AOAC
R5806
0R3J-0-U-GP
NON AOAC
1
2
C5804S
C
1
U
6
D
3
V
2
K
X
-G
P
AOAC
C5804S
C
1
U
6
D
3
V
2
K
X
-G
P
AOAC
1TP5802TP5802
1 2R5803 0R2J-2-GPDY
R5803 0R2J-2-GP
DY
1 2R5801 0R0603-PAD-2-GP-UR5801 0R0603-PAD-2-GP-U
1
2
R
5
8
0
8
1
0
0
K
R
2
J
-1
-G
P
DY
R
5
8
0
8
1
0
0
K
R
2
J
-1
-G
P
DY
1TP5803TP5803
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LED_BAT
LED_BATCHG
BAT_AMBER_LED_A
BAT_WHITE_LED_A
CHG_AMBER_LED#_R
PWRLED#_R
BAT_AMBER_LED_A
BAT_WHITE_LED_A
GND
KBC_PWRBTN#_C
LID_CLOSE#_C
BAT_AMBER_LED_A
3D3V_S5
KBC_PWRBTN#_C
LID_CLOSE#_C
BAT_WHITE_LED_A
HDD_LED_A
HDD_LED_A
HDD_LED_A
SATA_LED_R
CHG_AMBER_LED#_R
PWRLED#_R
SATA_LED#_R
SATA_LED#_R
5V_S5
5V_S5
3D3V_S5
5V_S0
KBC_PWRBTN#[24]
LID_CLOSE#[24]
CHG_AMBER_LED#[24]
PWRLED#[24]
SATA_LED#[19]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LED Bar/Power Button
A3
61 101Friday,June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LED Bar/Power Button
A3
61 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
LED Bar/Power Button
A3
61 101Friday, June 28, 2013
<Core Design>
SSID = User.Interface
LOW actived from KBC GPIO
LOW actived from KBC GPIO
Power & Battery LED2(White_LED)
Battery LED1(Amber_LED)
SATA HDD LED
PWRBTN CONN
LED board CONN
1
2 E
C
6
1
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
DY
E
C
6
1
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
DY
1
2E
C
6
1
0
3
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
DY
E
C
6
1
0
3
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
DY
E
B
C
R1
R2
Q6105
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
R1
R2
Q6105
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
1 2
R6107
680R2J-3-GP
R6107
680R2J-3-GP
1
2 3
4
RN6101
SRN100J-3-GP
RN6101
SRN100J-3-GP
1
2
3
4
5
6
LEDBD1
ACES-CON4-50-GP
20.K0722.004
LEDBD1
ACES-CON4-50-GP
20.K0722.004
E
B
C
R1
R2
Q6104
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
R1
R2
Q6104
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
1 2
R6106
680R2J-3-GP
R6106
680R2J-3-GP
E
B
C
R1
R2
Q6103
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
R1
R2
Q6103
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
1
2
3
4 5
6
7
8
RN
0R8P4R-PAD-1-GP
RN6102
RN
0R8P4R-PAD-1-GP
RN6102
1 AFTP6102AFTP6102
1 AFTP6104AFTP6104
1 AFTP6101AFTP6101
1 2
R6108
680R2J-3-GP
R6108
680R2J-3-GP
1 AFTP6105AFTP6105
1 AFTP6103AFTP6103
1 AFTP6106AFTP6106
1
2
E
C
6
1
0
4
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
DYE
C
6
1
0
4
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
DY
1
2
3
4
5
6
PWBT1
ACES-CON4-50-GP
20.K0722.004
PWBT1
ACES-CON4-50-GP
20.K0722.004
1 AFTP6107AFTP6107
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPDATA_C
TP_VDD
TPCLK_C
CAP_LEDCAP_LED_Q
KCOL13
KCOL4
KROW7
KCOL10
KCOL3
KROW5
KCOL12
KCOL5
KCOL11
KCOL8
KROW2
KCOL0
KROW0
KCOL9
KCOL6
KROW4
KCOL2
KROW3
KCOL15
KCOL14
KCOL7
KROW6
KCOL1
KROW1
KCOL16
CAP_LED
CAP_LED_R#
KB_LED_DET_C
K
B
_
B
L
_
C
T
R
L
#
KB_LED_DET_C
KB_BL_CTRL#
+5V_KB_BL
TPCLK_C
TPDATA_C
PCH_SMBCLK
PCH_SMBDATA
TP_VDD
5V_S0 CAP_LED
CAP_LED
+5V_KB_BL5V_S0
3D3V_S0
TP_VDD
TP_VDD
KROW[0..7][24]
KCOL[0..16][24]
CAP_LED#[24]
KB_DET#[20]
KB_LED_BL_DET[20]
KB_BL_CTRL[24]
TPCLK[24]
TPDATA[24]
PCH_SMBDATA[12,13,18,58,67]
PCH_SMBCLK[12,13,18,58,67]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
A3
62 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
A3
62 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
A3
62 101Friday, June 28, 2013
<Core Design>
LOW actived from KBC GPIO
SSID = Touch.PadSSID = KBC
Touch Pad Connector
Internal Keyboard Connector
CAP LED Control
X01 0321
A00 0618
1
2
3
4
5
6
7
8
TP1
ACES-CON6-52-GP
20.K0721.006
TP1
ACES-CON6-52-GP
20.K0721.006
1AFTP6220AFTP6220
1 2R6202
0R0402-PAD-2-GP
R6202
0R0402-PAD-2-GP
1
2
C
6
2
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
C
6
2
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
1AFTP6218AFTP6218
1 2
R6201
1KR2J-1-GP
R6201
1KR2J-1-GP
1AFTP6203AFTP6203
1AFTP6238AFTP6238
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
KB1
ACES-CON30-10-GP
20.K0592.030
KB1
ACES-CON30-10-GP
20.K0592.030
1 2
R6205 0R3J-0-U-GPR6205 0R3J-0-U-GP
1AFTP6225AFTP6225 1
2
E
C
6
2
0
2
S
C
3
3
P
5
0
V
2
J
N
-3
G
P
DY
E
C
6
2
0
2
S
C
3
3
P
5
0
V
2
J
N
-3
G
P
DY
1AFTP6215AFTP6215
1AFTP6214AFTP6214
1
AFTP6235AFTP6235
1 AFTP6230AFTP6230
1
2
C6203S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
C6203S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1AFTP6207AFTP6207
1
2
3
4
5
6
KBLIT1
ACES-CON4-50-GP
20.K0722.004
KBLIT1
ACES-CON4-50-GP
20.K0722.004
1 2
34
RN6201
SRN10KJ-5-GP
RN6201
SRN10KJ-5-GP
1
AFTP6234AFTP6234
1 AFTP6229AFTP6229
1 2
R6206
51KR2J-1-GP
R6206
51KR2J-1-GP
G
D
S
Q6202
P8503BMG-GP
84.P8503.031
2nd = 84.03404.C31
Q6202
P8503BMG-GP
84.P8503.031
2nd = 84.03404.C31
1 2
R6209
0R0603-PAD-2-GP-U
R6209
0R0603-PAD-2-GP-U
1AFTP6205AFTP6205
1AFTP6206AFTP6206
1
AFTP6236AFTP6236
1AFTP6228AFTP6228
1 AFTP6232AFTP6232
1AFTP6224AFTP6224
1
2
R6208
100KR2J-1-GPDY
R6208
100KR2J-1-GPDY
1AFTP6202AFTP6202
1 2
F6201
POLYSW-D5A6V-1-GP
69.50007.921
DY
F6201
POLYSW-D5A6V-1-GP
69.50007.921
DY
1AFTP6216AFTP6216
1AFTP6226AFTP6226
1
2
EC6201
SC33P50V2JN-3GP DY
EC6201
SC33P50V2JN-3GP DY
1 AFTP6233AFTP6233
1AFTP6217AFTP6217
1
2
R6207
100KR2J-1-GP
R6207
100KR2J-1-GP
1AFTP6222AFTP6222
1AFTP6204AFTP6204
1AFTP6221AFTP6221
E
B
C
R1
R2
Q6201
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
R1
R2
Q6201
PDTA144VT-GP
84.00144.P11
2nd = 84.DT144.A11
1AFTP6213AFTP6213
1AFTP6209AFTP6209
1AFTP6227AFTP6227
1AFTP6201AFTP6201
1 AFTP6231AFTP6231
1AFTP6219AFTP6219
1AFTP6208AFTP6208
1AFTP6211AFTP6211
1
AFTP6237AFTP6237
1
2 3
4
RN6202
SRN33J-5-GP-U
RN6202
SRN33J-5-GP-U
1AFTP6210AFTP6210
1AFTP6223AFTP6223
1
2
C6202
SCD1U10V2KX-5GP
C6202
SCD1U10V2KX-5GP
1AFTP6212AFTP6212
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_DN2_C
USB20_DP2_C
USB20_DN3_C
USB20_DP3_C
SATA3_PTX_DRX_N1_R
SATA3_PTX_DRX_P1_R
SATA3_PRX_DTX_N1_R
SATA3_PRX_DTX_P1_R
USB20_DP2_C
USB20_DP3_C
USB20_DN3_C
USB20_DN2_C
USB30_VCCC
USB30_VCCC USB30_VCCD 3D3V_S0
USB30_VCCD
3D3V_S0
SATA3_PTX_DRX_P1 [19]
SATA3_PRX_DTX_N1 [19]
SATA3_PRX_DTX_P1 [19]
SATA3_PTX_DRX_N1 [19]
MSATA_DEVSLP [20]
USB3_PTX_DRX_N3 [16]
USB3_PTX_DRX_P3 [16]
USB3_PRX_DTX_N3 [16]
USB3_PRX_DTX_P3 [16]
USB3_PTX_DRX_N2 [16]
USB3_PRX_DTX_N2 [16]
USB3_PTX_DRX_P2 [16]
USB3_PRX_DTX_P2 [16]
MSATA_DET# [19]
USB_PP2 [16]
USB_PN2 [16]
USB_PP3 [16]
USB_PN3 [16]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
IO Board Connector
A3
63 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
IO Board Connector
A3
63 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
IO Board Connector
A3
63 101Friday, June 28, 2013
<Core Design>
SSID = User.Interface
A00 0618
A00 0618
A00 0628
1 2
C6013 SCD01U16V2KX-3GPDYC6013 SCD01U16V2KX-3GPDY
1
2
E
C
6
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
E
C
6
3
0
2
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1 2C6002 SCD01U16V2KX-3GP
DYC6002 SCD01U16V2KX-3GPDY
1 2C6012 SCD01U16V2KX-3GPDYC6012 SCD01U16V2KX-3GPDY
1
41
42
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
IOBD1
ACES-CON40-18-GP
20.K0678.040
IOBD1
ACES-CON40-18-GP
20.K0678.040
1 2
34
TR6302
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
TR6302
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
1 2
C6001 SCD01U16V2KX-3GPDYC6001 SCD01U16V2KX-3GPDY
1 2
34
TR6301
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
TR6301
FILTER-4P-62-GP
69.10080.021
2nd = 69.10103.061
1
2
E
C
6
3
0
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
E
C
6
3
0
3
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
1
2
E
C
6
3
0
1
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
DY
E
C
6
3
0
1
SC
D
1
U
1
0
V
2
K
X
-5
G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
A3
64 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
A3
64 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
A3
64 101Friday, June 28, 2013
<Core Design>
(Blanking)
www.qdzbwx.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PLT_RST#_DEBUG
LPC_FRAME#_DEBUG
LPC_AD[3..0]
LPC_AD0
LPC_AD3
LPC_AD2
LPC_AD1
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
3D3V_S0
PLT_RST#[17,24,30,58,73]
LPC_FRAME#[18,24]
CLK_PCI_LPC[18]
LPC_AD[3..0][18,24]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Dubug connector
A3
65 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Dubug connector
A3
65 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Dubug connector
A3
65 101Friday, June 28, 2013
<Core Design>
SSID = DEBUG PORT
Debug Connector
Place near trace separated point
A00 0625
1
2
3
4 5
6
7
8
RN
0R8P4R-PAD-1-GP
RN6501
RN
0R8P4R-PAD-1-GP
RN6501
1 2R65010R0402-PAD-2-GP R65010R0402-PAD-2-GP
1 2R65020R0402-PAD-2-GP R65020R0402-PAD-2-GP
11
1
2
3
4
5
6
7
8
9
10
12
DB1
PAD-10P-177042-GP
LPC
ZZ.00PAD.Y41
DB1
PAD-10P-177042-GP
LPC
ZZ.00PAD.Y41
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDD_FALL_INT
FALL_INT2
3D3V_RUN_FFS
3D3V_RUN_FFS
FFS_INT2
3D3V_S0
3D3V_S0
FFS_INT2_Q [56]
HDD_FALL_INT [15]PCH_SMBDATA[12,13,18,58,62]
PCH_SMBCLK[12,13,18,58,62]
FFS_INT2 [20]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
FFS
A3
67 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
FFS
A3
67 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
FFS
A3
67 101Friday, June 28, 2013
<Core Design>
Note:
Note:
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom.
Free Fall Sensor
- no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
Need to check GPIO
Need to check GPIO
Need to check conn pin define
SSID = User.Interface
A00 0618
1
2
C
6
7
0
2
S
C
D
1
U
1
6
V
2
K
X
-3
G
P
FFS
C
6
7
0
2
S
C
D
1
U
1
6
V
2
K
X
-3
G
P
FFS
1
2
C
6
7
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
6
7
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
123
4 5 6
Q6701
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
FFS
Q6701
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
FFS
1
2
R6703
100KR2J-1-GPFFS
R6703
100KR2J-1-GPFFS
1 2R6701
0R0603-PAD-2-GP-U
R6701
0R0603-PAD-2-GP-U
1
2
C
6
7
0
3
S
C
D
1
U
1
6
V
2
K
X
-3
G
P
FFS
C
6
7
0
3
S
C
D
1
U
1
6
V
2
K
X
-3
G
P
FFS
VDD_IO 1
NC#2 2
NC#3 3
SCL/SPC4
GND5
SDA/SDI/SDO6
SDO/SA07 CS 8
INT2 9
RES#1010
INT1 11
GND12
RES#1313
VDD 14RES#1515
RES#1616
U6701
LNG3DMTR-GP
74.LNG3D.0BZ
FFS
U6701
LNG3DMTR-GP
74.LNG3D.0BZ
FFS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEXTSTCLK_OUT
dGPU_TXP_CPU_RXP1
dGPU_TXN_CPU_RXN1
dGPU_TXP_CPU_RXP3
dGPU_TXN_CPU_RXN3
dGPU_TXP_CPU_RXP2
dGPU_TXN_CPU_RXN2
dGPU_TXP_CPU_RXP0
dGPU_TXN_CPU_RXN0
PEX_TERMP
TESTMODE
PEXTSTCLK_OUT#
GPU_CLKREQ#
VGA_RST#
1D05V_VGA_S0
1D05V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
1D05V_VGA_S0
CLK_PCIE_VGA[18]
CLK_PCIE_VGA#[18]
VGA_SENSE [82]
GND_SENSE [82]
DGPU_HOLD_RST#[15]
PEG_CLKREQ#[18]
dGPU_RXN_C_CPU_TXN0[16]
dGPU_RXP_C_CPU_TXP0[16]
CPU_RXN_C_dGPU_TXN0[16]
CPU_RXP_C_dGPU_TXP0[16]
dGPU_RXN_C_CPU_TXN1[16]
dGPU_RXP_C_CPU_TXP1[16]
CPU_RXN_C_dGPU_TXN1[16]
CPU_RXP_C_dGPU_TXP1[16]
dGPU_RXN_C_CPU_TXN2[16]
dGPU_RXP_C_CPU_TXP2[16]
CPU_RXN_C_dGPU_TXN2[16]
CPU_RXP_C_dGPU_TXP2[16]
dGPU_RXN_C_CPU_TXN3[16]
dGPU_RXP_C_CPU_TXP3[16]
CPU_RXN_C_dGPU_TXN3[16]
CPU_RXP_C_dGPU_TXP3[16]
VGA_RST# [76]PLT_RST#[17,24,30,58,65]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_PCIE/STRAPPING(1/5)
Custom
73 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_PCIE/STRAPPING(1/5)
Custom
73 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_PCIE/STRAPPING(1/5)
Custom
73 101Friday, June 28, 2013
<Core Design>
1.05V +/- 30mV
150mA
X7R, Under GPU.
3.3V +/- 5%
210mA
POWER IC
1.05V +/- 30mV
3.3A
dGPU Reset
0102 remove R7307
SSID = VIDEO
A00 0618
1
2
C7317S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7317S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
1 2
R7302
10KR2J-3-GP
OPS
R7302
10KR2J-3-GP
OPS
G
S
D
Q7301
2N7002K-2-GP
84.2N702.J31
OPS
Q7301
2N7002K-2-GP
84.2N702.J31
OPS
1
2
C7310S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7310S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7323S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7323S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7325S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7325S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
PEX_RX15#
AM27
PEX_RX15
AN27
PEX_TX15#
AK25
PEX_TX15
AL25
PEX_RX14#
AP27
PEX_RX14
AP26
PEX_TX14#
AJ24
PEX_TX14
AK24
PEX_RX13#
AM26
PEX_RX13
AN26
PEX_TX13#
AG23
PEX_TX13
AH23
PEX_RX12#
AM24
PEX_RX12
AN24
PEX_TX12#
AJ23
PEX_TX12
AK23
PEX_RX11#
AP24
PEX_RX11
AP23
PEX_TX11#
AK22
PEX_TX11
AL22
PEX_RX10#
AM23
PEX_RX10
AN23
PEX_TX10#
AJ21
PEX_TX10
AK21
PEX_RX9#
AM21
PEX_RX9
AN21
PEX_TX9#
AG20
PEX_TX9
AH20
PEX_RX8#
AP21
PEX_RX8
AP20
PEX_TX8#
AJ20
PEX_TX8
AK20
PEX_RX7#
AM20
PEX_RX7
AN20
PEX_TX7#
AK19
PEX_TX7
AL19
PEX_RX6#
AM18
PEX_RX6
AN18
PEX_TX6#
AJ18
PEX_TX6
AK18
PEX_RX5#
AP18
PEX_RX5
AP17
PEX_TX5#
AG17
PEX_TX5
AH17
PEX_RX4#
AM17
PEX_RX4
AN17
PEX_TX4#
AJ17
PEX_TX4
AK17
PEX_RX3#
AM15
PEX_RX3
AN15
PEX_TX3#
AK16
PEX_TX3
AL16
PEX_RX2#
AP15
PEX_RX2
AP14
PEX_TX2#
AJ15
PEX_TX2
AK15
PEX_RX1#
AM14
PEX_RX1
AN14
PEX_TX1#
AG14
PEX_TX1
AH14
PEX_RX0#
AM12
PEX_RX0
AN12
PEX_TX0#
AJ14
PEX_TX0
AK14
PEX_REFCLK#
AK13
PEX_REFCLK
AL13
PEX_CLKREQ#
AK12
PEX_RST#
AJ12
PEX_WAKE#
AJ11
PEX_TERMP
AP29
TESTMODE
AK11
PEX_PLLVDD
AG26
PEX_TSTCLK_OUT#
AK26
PEX_TSTCLK_OUT
AJ26
NC_3V3AUX
P8
GND_SENSE
L5
VDD_SENSE
L4
PEX_SVDD_3V3
AG12
PEX_PLL_HVDD
AH12
PEX_IOVDDQ_14
AN28
PEX_IOVDDQ_13
AM28
PEX_IOVDDQ_12
AL27
PEX_IOVDDQ_11
AK27
PEX_IOVDDQ_10
AJ27
PEX_IOVDDQ_9
AH27
PEX_IOVDDQ_8
AH26
PEX_IOVDDQ_7
AH18
PEX_IOVDDQ_6
AH15
PEX_IOVDDQ_5
AG25
PEX_IOVDDQ_4
AG18PEX_IOVDDQ_3
AG16
PEX_IOVDDQ_2
AG15
PEX_IOVDDQ_1
AG13
PEX_IOVDD_6
AH25
PEX_IOVDD_5
AH21
PEX_IOVDD_4
AG24
PEX_IOVDD_3
AG22
PEX_IOVDD_2
AG21
PEX_IOVDD_1
AG19
GK208/GK107/GF117
NC
GF108
P
E
X
 L
A
N
E
S
 8
 T
O
 1
5
 N
C
 F
O
R
 G
F
1
1
7
/G
K
2
0
8
NC
GK208/GF117
1/17 PCI_EXPRESS
GK107/GF108
1 OF 17GPU1A
N14P-GS-A1-GP
71.0N14P.00U
OPS
GK208/GK107/GF117
NC
GF108
P
E
X
 L
A
N
E
S
 8
 T
O
 1
5
 N
C
 F
O
R
 G
F
1
1
7
/G
K
2
0
8
NC
GK208/GF117
1/17 PCI_EXPRESS
GK107/GF108
1 OF 17GPU1A
N14P-GS-A1-GP
71.0N14P.00U
OPS
1 2
R7305
0R2J-2-GP
DY
R7305
0R2J-2-GP
DY
1
2
C7324S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7324S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
1 2C7302 SCD22U10V2KX-1GPOPSC7302 SCD22U10V2KX-1GPOPS
1
2
C7322S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7322S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1 2R7304
0R0402-PAD-2-GP
R7304
0R0402-PAD-2-GP
1 2C7308 SCD22U10V2KX-1GPOPSC7308 SCD22U10V2KX-1GPOPS
1
2
C7326S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7326S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1 2C7304 SCD22U10V2KX-1GPOPSC7304 SCD22U10V2KX-1GPOPS
K A
D7301
1SS400GPT-GP
2ND = 83.27101.01F
3RD = 83.01426.01F
83.00400.C1F
OPS
D7301
1SS400GPT-GP
2ND = 83.27101.01F
3RD = 83.01426.01F
83.00400.C1F
OPS
1 2C7303 SCD22U10V2KX-1GPOPSC7303 SCD22U10V2KX-1GPOPS
1
2
C7313S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
C7313S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
1 2C7306 SCD22U10V2KX-1GPOPSC7306 SCD22U10V2KX-1GPOPS
1
2
C7328S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7328S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
1
2
C7311S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
C7311S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
1 2C7301 SCD22U10V2KX-1GPOPSC7301 SCD22U10V2KX-1GPOPS
1 2
R7301
2K49R2F-GP
OPS
R7301
2K49R2F-GP
OPS
1 2C7305 SCD22U10V2KX-1GPOPSC7305 SCD22U10V2KX-1GPOPS
1
2
C7327S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7327S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7316S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
C7316S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
1
2
C7314S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
C7314S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
1
2
C7309S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7309S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
1
2
C7321S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7321S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7320S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7320S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1 2C7307 SCD22U10V2KX-1GPOPSC7307 SCD22U10V2KX-1GPOPS
1
2
C7318S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
C7318S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
1
2
C7312S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
C7312S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
1
2
C7319S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
C7319S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
1
2
C7315S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7315S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
1 2
R7303
200R2F-L-GP
DY
R7303
200R2F-L-GP
DY
1
2
R7308
10KR2J-3-GPOPS
R7308
10KR2J-3-GPOPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IFPD_PLLVDD
IFPEF_PLLVDD
IFPB_IOVDD
IFPE_IOVDD
IFPF_IOVDD
IFPA_IOVDD IFPC_IOVDD
IFPAB_PLLVDD
IFPD_IOVDD
IFPC_PLLVDD
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU Memory(2/5)
Custom
74 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU Memory(2/5)
Custom
74 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU Memory(2/5)
Custom
74 101Friday, June 28, 2013
<Core Design>
SSID = VIDEO
1TP7401TP7401
1TP7404TP7404
IFPB_IOVDD
AG9
IFPA_IOVDD
AG8
IFPAB_PLLVDD
AH8
IFPAB_RSET
AJ8
GPIO14
N4
IFPB_TXD7
AK8
IFPB_TXD7#
AL8
IFPB_TXD6
AN8
IFPB_TXD6#
AM8
IFPB_TXD5
AM7
IFPB_TXD5#
AL7
IFPB_TXD4
AP6
IFPB_TXD4#
AP5
IFPB_TXC
AJ9
IFPB_TXC#
AH9
IFPA_TXD3
AJ6
IFPA_TXD3#
AH6
IFPA_TXD2
AL6
IFPA_TXD2#
AK6
IFPA_TXD1
AN5
IFPA_TXD1#
AM5
IFPA_TXD0
AP3
IFPA_TXD0#
AN3
IFPA_TXC
AM6
IFPA_TXC#
AN6
ALL PINS NC FOR GF117
IFPAB
5/17 IFPAB
LVDS
DPA_L0
DPA_L3
DPA_L3
DPA_L2
DPA_L2
DPA_L1
DPA_L1
DPB_L0
DPB_L0
DPB_L1
DPB_L1
DPB_L2
DPB_L2
DPB_L3
DPB_L3
DP(GK208)
DPA_L0
10 OF 17GPU1J
N14P-GS-A1-GP
71.0N14P.00U
OPS
ALL PINS NC FOR GF117
IFPAB
5/17 IFPAB
LVDS
DPA_L0
DPA_L3
DPA_L3
DPA_L2
DPA_L2
DPA_L1
DPA_L1
DPB_L0
DPB_L0
DPB_L1
DPB_L1
DPB_L2
DPB_L2
DPB_L3
DPB_L3
DP(GK208)
DPA_L0
10 OF 17GPU1J
N14P-GS-A1-GP
71.0N14P.00U
OPS
1TP7402TP7402
IFPD_IOVDD
AG6
IFPD_PLLVDD
AG7
IFPD_RSET
AN2
GPIO17
M6
IFPD_L0
AM1
IFPD_L0#
AM2
IFPD_L1
AM3
IFPD_L1#
AM4
IFPD_L2
AL3
IFPD_L2#
AL4
IFPD_L3
AK4
IFPD_L3#
AK5
IFPD_AUX_I2CX_SCL
AK3
IFPD_AUX_I2CX_SDA#
AK2
7/17 IFPD
I2CX_SCL
I2CX_SDA
TXC
TXC
TXD2
TXD2
TXD1
TXD1
TXD0
TXD0
DP
IFPD
ALL PINS NC FOR GF117
DVI/HDMI
12 OF 17GPU1L
N14P-GS-A1-GP
71.0N14P.00U
OPS
7/17 IFPD
I2CX_SCL
I2CX_SDA
TXC
TXC
TXD2
TXD2
TXD1
TXD1
TXD0
TXD0
DP
IFPD
ALL PINS NC FOR GF117
DVI/HDMI
12 OF 17GPU1L
N14P-GS-A1-GP
71.0N14P.00U
OPS
1TP7405TP7405
1TP7406TP7406
1TP7403TP7403
1TP7409TP7409
1TP7410TP7410
IFPF_IOVDD
AC8
IFPE_IOVDD
AC7
IFPEF_RSET
AD6
IFPEF_PLLVDD
AB8
GPIO19
P3
IFPF_L0
AE3
IFPF_L0#
AE4
IFPF_L1
AF4
IFPF_L1#
AF5
IFPF_L2
AD4
IFPF_L2#
AD5
IFPF_L3
AG1
IFPF_L3#
AF1
IFPF_AUX_I2CZ_SCL
AF3
IFPF_AUX_I2CZ_SDA#
AF2
GPIO18
R1
IFPE_L0
AD2
IFPE_L0#
AD3
IFPE_L1
AD1
IFPE_L1#
AC1
IFPE_L2
AC2
IFPE_L2#
AC3
IFPE_L3
AC4
IFPE_L3#
AC5
IFPE_AUX_I2CY_SCL
AB3
IFPE_AUX_I2CY_SDA#
AB4
8/17 IFPEF
DPDVI-SL/HDMIDVI-DL
TXD2
TXD2
TXD2
TXD1
TXD0
TXD0
TXD1
I2CZ_SCL
I2CZ_SDA
TXC
TXC
HPD_F
HPD_E
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
I2CY_SDA
I2CY_SCLI2CY_SCL
I2CY_SDA
TXD2
TXD2
TXD0
TXD0
TXC
TXC
TXD1
TXD1
HPD_E
TXD3
TXD3
TXD4
TXD4
TXD5
TXD5
IFPF
ALL PINS NC FOR GF117
IFPE
NC FOR GK208
NC FOR GK208
NC FOR GK208
NC FOR GK208
13 OF 17GPU1M
N14P-GS-A1-GP
71.0N14P.00U
OPS
8/17 IFPEF
DPDVI-SL/HDMIDVI-DL
TXD2
TXD2
TXD2
TXD1
TXD0
TXD0
TXD1
I2CZ_SCL
I2CZ_SDA
TXC
TXC
HPD_F
HPD_E
TXC
TXC
TXD0
TXD0
TXD1
TXD1
TXD2
I2CY_SDA
I2CY_SCLI2CY_SCL
I2CY_SDA
TXD2
TXD2
TXD0
TXD0
TXC
TXC
TXD1
TXD1
HPD_E
TXD3
TXD3
TXD4
TXD4
TXD5
TXD5
IFPF
ALL PINS NC FOR GF117
IFPE
NC FOR GK208
NC FOR GK208
NC FOR GK208
NC FOR GK208
13 OF 17GPU1M
N14P-GS-A1-GP
71.0N14P.00U
OPS
IFPC_IOVDD
AF6
IFPC_PLLVDD
AF7
IFPC_RSET
AF8
GPIO15
P2
IFPC_L0
AK1
IFPC_L0#
AJ1
IFPC_L1
AJ3
IFPC_L1#
AJ2
IFPC_L2
AH3
IFPC_L2#
AH4
IFPC_L3
AG5
IFPC_L3#
AG4
IFPC_AUX_I2CW_SCL
AG3
IFPC_AUX_I2CW_SDA#
AG2
TXD2
TXD2
TXD1
TXD1
TXD0
TXD0
TXC
TXC
I2CW_SDA
I2CW_SCL
DVI/HDMI DP
IFPC
ALL PINS NC FOR GF117
6/17 IFPC
11 OF 17GPU1K
N14P-GS-A1-GP
71.0N14P.00U
OPS
TXD2
TXD2
TXD1
TXD1
TXD0
TXD0
TXC
TXC
I2CW_SDA
I2CW_SCL
DVI/HDMI DP
IFPC
ALL PINS NC FOR GF117
6/17 IFPC
11 OF 17GPU1K
N14P-GS-A1-GP
71.0N14P.00U
OPS
1TP7408TP7408
1TP7407
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBA_WCK23#
FBA_WCK23
FBA_CLK0P
FBA_CLK0N
FBA_DEBUG1
FBA_CLK1P
FBA_CLK1N
FBA_WCK67#
FBA_WCK67
FBA_WCK45#
FBA_WCK45
FBA_WCK01#
FBA_WCK01
FBA_DEBUG0
FBB_CMD14
FBB_CMD30
FBA_CMD29
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_DEBUG1
FBB_DEBUG0
FBB_WCK23#
FBB_WCK23
FBB_WCK67#
FBB_WCK67
FBB_WCK45#
FBB_WCK45
FBB_WCK01#
FBB_WCK01
FBB_CLK0N
FBB_CLK0P
FBB_CLK1P
FBB_CLK1N
FBB_CMD13
FBA_PLL_AVDDFB_VREF
FBA_CMD14
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D62
FBA_D0
FBA_D63
FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D62
FBB_D0
FBB_D63
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FB_CLAM
FBA_CMD13
FBA_CMD30
FBVDDQ_SENSE
FB_GND_SENSE
FB_CAL_PU_GND
FB_CAL_PD_VDDQ
FB_CAL_TERM_GND
FBB_CMD29
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_PLL_AVDD
FBA_PLL_AVDD
1D35V_VGA_S0 1D35V_VGA_S0
1D35V_VGA_S0 1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D05V_VGA_S0
FBA_D[0..31][78]
FBA_DQM[0..3][78]
FBA_EDC[0..3][78]
FBA_D[32..63][79]
FBA_DQM[4..7][79]
FBA_EDC[4..7][79]
FBA_CMD0 [78]
FBA_CMD1 [78]
FBA_CMD2 [78]
FBA_CMD3 [78]
FBA_CMD4 [78]
FBA_CMD5 [78]
FBA_CMD6 [78]
FBA_CMD7 [78]
FBA_CMD8 [78]
FBA_CMD9 [78]
FBA_CMD10 [78]
FBA_CMD20 [79]
FBA_CMD12 [78]
FBA_CMD13 [78]
FBA_CMD11 [78]
FBA_CMD14 [78]
FBA_CMD15 [78]
FBA_CMD16 [79]
FBA_CMD17 [79]
FBA_CMD19 [79]
FBA_CMD18 [79]
FBA_CMD30 [79]
FBA_CMD22 [79]
FBA_CMD23 [79]
FBA_CMD21 [79]
FBA_CMD24 [79]
FBA_CMD25 [79]
FBA_CMD26 [79]
FBA_CMD27 [79]
FBA_CMD29 [79]
FBA_CMD28 [79]
FBA_CMD31 [79]
FBA_CLK0P [78]
FBA_CLK0N [78]
FBA_CLK1P [79]
FBA_CLK1N [79]
FBA_WCK01 [78]
FBA_WCK01# [78]
FBA_WCK23# [78]
FBA_WCK23 [78]
FBA_WCK67# [79]
FBA_WCK67 [79]
FBA_WCK45# [79]
FBA_WCK45 [79]
FBB_EDC[0..3][80]
FBB_DQM[0..3][80]
FBB_D[0..31][80]
FBB_DQM[4..7][81]
FBB_D[32..63][81]
FBB_EDC[4..7][81]
FBB_CMD10 [80]
FBB_CMD0 [80]
FBB_CMD31 [81]
FBB_CMD2 [80]
FBB_CMD3 [80]
FBB_CMD1 [80]
FBB_CMD4 [80]
FBB_CMD20 [81]
FBB_CMD13 [80]
FBB_CMD12 [80]
FBB_CMD14 [80]
FBB_CMD11 [80]
FBB_CMD15 [80]
FBB_CMD17 [81]
FBB_CMD16 [81]
FBB_CMD19 [81]
FBB_CMD18 [81]
FBB_CMD5 [80]
FBB_CMD6 [80]
FBB_CMD7 [80]
FBB_CMD30 [81]
FBB_CMD22 [81]
FBB_CMD21 [81]
FBB_CMD23 [81]
FBB_CMD24 [81]
FBB_CMD26 [81]
FBB_CMD25 [81]
FBB_CMD29 [81]
FBB_CMD27 [81]
FBB_CMD28 [81]
FBB_CMD9 [80]
FBB_CMD8 [80]
FBB_CLK0P [80]
FBB_CLK0N [80]
FBB_CLK1P [81]
FBB_CLK1N [81]
FBB_WCK23# [80]
FBB_WCK23 [80]
FBB_WCK67# [81]
FBB_WCK67 [81]
FBB_WCK45# [81]
FBB_WCK45 [81]
FBB_WCK01# [80]
FBB_WCK01 [80]
EC_FB_CLAMP [24,76,83]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
75 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
75 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
75 101Friday, June 28, 2013
<Core Design>
GPU FBVDDQ Decoupling1.35V +/- 3%
4.88A
PLACE CLOSE TO GPU BALLS
PLACE CLOSE TO GPU BALLS
Layout note:FBA_PLL_AVDD=16mil
Place close to Ball
Place under GPU near
30ohm@100MHz ESR=0.2
DA-05691-001_V05 P7
0102 remove L7503
change C7506 to 0603 package
0102 remove L7502
change K27 pin net name
SSID = VIDEO A00 0618
1
2
R75171
0
K
R
2
J-3
-G
P
OPS
R75171
0
K
R
2
J-3
-G
P
OPS
1
2
C7520S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7520S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
R7520
1
0
K
R
2
J-
3
-G
POPS
R7520
1
0
K
R
2
J-
3
-G
POPS
1
2
C7518S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7518S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
FBB_DQS_RN7
B23
FBB_DQS_RN6
A30
FBB_DQS_RN5
D28
FBB_DQS_RN4
D22
FBB_DQS_RN3
A9
FBB_DQS_RN2
B2
FBB_DQS_RN1
E4
FBB_DQS_RN0
D9
FBB_DQS_WP7
A23
FBB_DQS_WP6
B30
FBB_DQS_WP5
E28
FBB_DQS_WP4
E23
FBB_DQS_WP3
B9
FBB_DQS_WP2
C3
FBB_DQS_WP1
D5
FBB_DQS_WP0
D10
FBB_DQM7
A24
FBB_DQM6
C30
FBB_DQM5
F27
FBB_DQM4
F23
FBB_DQM3
C9
FBB_DQM2
A3
FBB_DQM1
E3
FBB_DQM0
E11
FBB_D63
C26
FBB_D62
B26
FBB_D61
C24
FBB_D60
B24
FBB_D59
C21
FBB_D58
A21
FBB_D57
C23
FBB_D56
B21
FBB_D55
B29
FBB_D54
C29
FBB_D53
A29
FBB_D52
D29
FBB_D51
B32
FBB_D50
C32
FBB_D49
C31
FBB_D48
A32
FBB_D47
D30
FBB_D46
E30
FBB_D45
F29
FBB_D44
E29
FBB_D43
E27
FBB_D42
G26
FBB_D41
D27
FBB_D40
G27
FBB_D39
F21
FBB_D38
G21
FBB_D37
E21
FBB_D36
D21
FBB_D35
G24
FBB_D34
E24
FBB_D33
G23
FBB_D32
F24
FBB_D31
B8
FBB_D30
C8
FBB_D29
A8
FBB_D28
D8
FBB_D27
B11
FBB_D26
D11
FBB_D25
C11
FBB_D24
A11
FBB_D23
C5
FBB_D22
B5
FBB_D21
C4
FBB_D20
B3
FBB_D19
C1
FBB_D18
D3
FBB_D17
D4
FBB_D16
C2
FBB_D15
F3
FBB_D14
E2
FBB_D13
G4
FBB_D12
F4
FBB_D11
F6
FBB_D10
E6
FBB_D9
F5
FBB_D8
G6
FBB_D7
G12
FBB_D6
F12
FBB_D5
G11
FBB_D4
F11
FBB_D3
F9
FBB_D2
G8
FBB_D1
E9
FBB_D0
G9
FBB_PLL_AVDD
H17
FBB_WCKB67#
A27
FBB_WCKB67
A26
FBB_WCKB45#
E26
FBB_WCKB45
F26
FBB_WCKB23#
B6
FBB_WCKB23
C6
FBB_WCKB1#
D7
FBB_WCKB1
D6
FBB_WCK67#
C27
FBB_WCK67
B27
FBB_WCK45#
D25
FBB_WCK45
D24
FBB_WCK23#
A6
FBB_WCK23
A5
FBB_WCK1#
E8
FBB_WCK1
F8
FBB_CLK1#
F20
FBB_CLK1
E20
FBB_CLK0#
E12
FBB_CLK0
D12
FBB_DEBUG1
G20
FBB_DEBUG0
G14
FBB_CMD_RFU1
C20
FBB_CMD_RFU0
C12
FBB_CMD31
E17
FBB_CMD30
B17
FBB_CMD29
A17
FBB_CMD28
D17
FBB_CMD27
A18
FBB_CMD26
D16
FBB_CMD25
F17
FBB_CMD24
G17
FBB_CMD23
G18
FBB_CMD22
B18
FBB_CMD21
C18
FBB_CMD20
B20
FBB_CMD19
A20
FBB_CMD18
F18
FBB_CMD17
E18
FBB_CMD16
D18
FBB_CMD15
C17
FBB_CMD14
B15
FBB_CMD13
A15
FBB_CMD12
D14
FBB_CMD11
A14
FBB_CMD10
D15
FBB_CMD9
E15
FBB_CMD8
F15
FBB_CMD7
G15
FBB_CMD6
B14
FBB_CMD5
C14
FBB_CMD4
B12
FBB_CMD3
A12
FBB_CMD2
F14
FBB_CMD1
E14
FBB_CMD0
D13
THEY ARE NC
FOR GF108
THE FBB_WCKBxx
PINS ARE USED
ONLY ON GK107
GK107GF108
NC
3/17 FBB
ALL PINS NC FOR GF117/GK208
3 OF 17GPU1C
N14P-GS-A1-GP
71.0N14P.00U
OPS
THEY ARE NC
FOR GF108
THE FBB_WCKBxx
PINS ARE USED
ONLY ON GK107
GK107GF108
NC
3/17 FBB
ALL PINS NC FOR GF117/GK208
3 OF 17GPU1C
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7528S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7528S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1TP7503TP7503
1
2
C7511
S
C
D
1
U
1
0
V
2
K
X
-5
G
P OPS
C7511
S
C
D
1
U
1
0
V
2
K
X
-5
G
P OPS
1
2
C7515
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P DY
C7515
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P DY
1TP7502TP7502
1TP7501TP7501
1
2
C7506S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7506S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1 2
R7504 60D4R2F-GP
DY
R7504 60D4R2F-GP
DY
1 2
L7501
MHC1608S300QBP-GP
OPS
68.00335.051
L7501
MHC1608S300QBP-GP
OPS
68.00335.051
1
2
C7507
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7507
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1 2
R7501 60D4R2F-GP
DY
R7501 60D4R2F-GP
DY
1
2
R7507
4
2
D
2
R
2
F
-G
POPS
R7507
4
2
D
2
R
2
F
-G
POPS
12
R7505
40D2R2F-GP
OPS
R7505
40D2R2F-GP
OPS
FB_VREF
H26
FBA_DQS_RN7
AF32
FBA_DQS_RN6
AM34
FBA_DQS_RN5
AK31
FBA_DQS_RN4
AF30
FBA_DQS_RN3M34
FBA_DQS_RN2
E34
FBA_DQS_RN1
H30
FBA_DQS_RN0
M30
FBA_DQS_WP7
AF33
FBA_DQS_WP6
AN33
FBA_DQS_WP5
AK30
FBA_DQS_WP4
AE31
FBA_DQS_WP3
M33
FBA_DQS_WP2
E33
FBA_DQS_WP1
G31
FBA_DQS_WP0
M31
FBA_DQM7
AF34
FBA_DQM6
AM32
FBA_DQM5
AL29
FBA_DQM4
AD31
FBA_DQM3
M32
FBA_DQM2
F34
FBA_DQM1
F31
FBA_DQM0
P30
FBA_D63
AG33
FBA_D62
AG32
FBA_D61
AG34
FBA_D60
AF31
FBA_D59
AD33
FBA_D58
AC30
FBA_D57
AD32
FBA_D56
AD34
FBA_D55
AK32
FBA_D54
AK33
FBA_D53
AL31
FBA_D52
AM33
FBA_D51
AP32
FBA_D50
AP30
FBA_D49
AN32
FBA_D48
AN31
FBA_D47
AM30
FBA_D46
AN29
FBA_D45
AM31
FBA_D44
AM29
FBA_D43
AK28
FBA_D42
AJ30
FBA_D41
AK29
FBA_D40
AJ29
FBA_D39
AD28
FBA_D38
AC29
FBA_D37
AD29
FBA_D36
AD30
FBA_D35
AF28
FBA_D34
AG29
FBA_D33
AF29
FBA_D32
AG28
FBA_D31
L33
FBA_D30
L32
FBA_D29
L34
FBA_D28
L31
FBA_D27
P33
FBA_D26
P31
FBA_D25
P32
FBA_D24
P34
FBA_D23
H32
FBA_D22
H33
FBA_D21
F32
FBA_D20
F33
FBA_D19
C33
FBA_D18
B33
FBA_D17
D32
FBA_D16
C34
FBA_D15
F30
FBA_D14
E32
FBA_D13
E31
FBA_D12
G29
FBA_D11
H28
FBA_D10
J29
FBA_D9
H29
FBA_D8
J28
FBA_D7
P28
FBA_D6
R29
FBA_D5
P29
FBA_D4
N31
FBA_D3
M28
FBA_D2
L29
FBA_D1
M29
FBA_D0
L28
FBA_PLL_AVDD
U27
FBA_WCKB67#
AJ33
FBA_WCKB67
AJ32
FBA_WCKB45#
AJ31
FBA_WCKB45
AH31
FBA_WCKB23#
J33
FBA_WCKB23
J32
FBA_WCKB1#
J31
FBA_WCKB1
J30
FBA_WCK67#
AK34
FBA_WCK67
AJ34
FBA_WCK45#
AG31
FBA_WCK45
AG30
FBA_WCK23#
J34
FBA_WCK23
H34
FBA_WCK1#
L30
FBA_WCK1
K31
FBA_CLK1#
AC31
FBA_CLK1
AB31
FBA_CLK0#
R31
FBA_CLK0
R30
FBA_DEBUG1
AC28
FBA_DEBUG0
R28
FBA_CMD_RFU1
AC32
FBA_CMD_RFU0
R32
FBA_CMD31
V31
FBA_CMD30
Y33
FBA_CMD29
Y34
FBA_CMD28
Y31
FBA_CMD27
AA34
FBA_CMD26
Y30
FBA_CMD25
W31
FBA_CMD24
Y29
FBA_CMD23
Y28
FBA_CMD22
AA33
FBA_CMD21
AA32
FBA_CMD20
AC33
FBA_CMD19
AC34
FBA_CMD18
AA28
FBA_CMD17
AA29
FBA_CMD16
AA31
FBA_CMD15
Y32
FBA_CMD14
V33
FBA_CMD13
V34
FBA_CMD12
U31
FBA_CMD11
U34
FBA_CMD10
V30
FBA_CMD9
V29
FBA_CMD8
V28
FBA_CMD7
U28
FBA_CMD6
U33
FBA_CMD5
U32
FBA_CMD4
R33
FBA_CMD3
R34
FBA_CMD2
U29
FBA_CMD1
T31
FBA_CMD0
U30
FB_DLL_AVDD
K27
FB_CLAMP
E1
FOR GK208/GF108
/GF117
ONLY ON GK107
PINS ARE USED
THE FBA_WCKBxx
THEY ARE NC
NC
2/17 FBA
NC
GK107/GF108
GF117/GK208
2 OF 17GPU1B
N14P-GS-A1-GP
71.0N14P.00U
OPS
FOR GK208/GF108
/GF117
ONLY ON GK107
PINS ARE USED
THE FBA_WCKBxx
THEY ARE NC
NC
2/17 FBA
NC
GK107/GF108
GF117/GK208
2 OF 17GPU1B
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7502
S
C
D
1
U
1
0
V
2
K
X
-5
G
P OPS
C7502
S
C
D
1
U
1
0
V
2
K
X
-5
G
P OPS
1
2
C7508S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C7508S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1 2
R7503 60D4R2F-GP
DY
R7503 60D4R2F-GP
DY
1
2
C7529S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7529S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C7530S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7530S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1 2R7518 10KR2J-3-GP
OPS
R7518 10KR2J-3-GP
OPS
1
2
R75161
0
K
R
2
J-3
-G
P
OPS
R75161
0
K
R
2
J-3
-G
P
OPS
1
2C7505
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
C7505
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
1
2
C7516
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7516
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
C7509
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
C7509
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
1
2
C7526
S
C
D
1
U
1
0
V
2
K
X
-5
G
P DY
C7526
S
C
D
1
U
1
0
V
2
K
X
-5
G
P DY
1
2
C7514S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7514S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
1
2
R7522
1
0
K
R
2
J-
3
-G
POPS
R7522
1
0
K
R
2
J-
3
-G
POPS
1
2
C7521S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7521S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C7523
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P DY
C7523
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P DY
1
2
R7508
6
0
D
4
R
2
F
-G
POPS
R7508
6
0
D
4
R
2
F
-G
POPS
1
2
C7524S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C7524S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
R75251
0
K
R
2
J-3
-G
P
OPS
R75251
0
K
R
2
J-3
-G
P
OPS
1
2
C7510
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
C7510
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
FBVDDQ_44
Y27
FBVDDQ_43
W33
FBVDDQ_42
W30
FBVDDQ_41
W27
FBVDDQ_40
V27
FBVDDQ_39
T33
FBVDDQ_38
T30
FBVDDQ_37
T27
FBVDDQ_36
R27
FBVDDQ_35
P27
FBVDDQ_34
N27
FBVDDQ_33
M27
FBVDDQ_32
L27
FBVDDQ_31
H9
FBVDDQ_30
H8
FBVDDQ_29
H24
FBVDDQ_28
H23
FBVDDQ_27
H22
FBVDDQ_26
H21
FBVDDQ_25
H20
FBVDDQ_24
H19
FBVDDQ_23
H18
FBVDDQ_22
H16
FBVDDQ_21
H15
FBVDDQ_20
H14
FBVDDQ_19
H13
FBVDDQ_18
H12
FBVDDQ_17
H11
FBVDDQ_16
H10
FBVDDQ_15
E19
FBVDDQ_14
E16
FBVDDQ_13
E13
FBVDDQ_12
B19
FBVDDQ_11
B16
FBVDDQ_10
B13
FBVDDQ_9
AG27
FBVDDQ_8
AF27
FBVDDQ_7
AE27
FBVDDQ_6
AD27
FBVDDQ_5
AC27
FBVDDQ_4
AB33
FBVDDQ_3
AB27
FBVDDQ_2
AA30
FBVDDQ_1
AA27
FB_CAL_TERM_GND
H25
FB_CAL_PU_GND
H27
FB_CAL_PD_VDDQ
J27
FB_GND_SENSE
F2
FB_VDDQ_SENSE
F1
14/17 FBVDDQ
4 OF 17 GPU1D
N14P-GS-A1-GP
71.0N14P.00U
OPS
14/17 FBVDDQ
4 OF 17 GPU1D
N14P-GS-A1-GP
71.0N14P.00U
OPS
1 2
R7502 60D4R2F-GP
DY
R7502 60D4R2F-GP
DY
1
2
C7517S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7517S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C7503
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7503
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
R7523
1
0
K
R
2
J-
3
-G
POPS
R7523
1
0
K
R
2
J-
3
-G
POPS
1
2
C7519S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C7519S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1 2R7506
0R0402-PAD-2-GP
R7506
0R0402-PAD-2-GP
1
2
C7527S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C7527S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
R75241
0
K
R
2
J-3
-G
P
OPS
R75241
0
K
R
2
J-3
-G
P
OPS
1
2
C7513S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
DY
C7513S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
DY
1
2
C7512S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
C7512S
C
1
U
6
D
3
V
2
K
X
-G
P
OPS
1
2
C7501
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7501
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7525
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7525
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
R7521
1
0
K
R
2
J-
3
-G
POPS
R7521
1
0
K
R
2
J-
3
-G
POPS
1
2
C7504
S
C
D
1
U
1
0
V
2
K
X
-5
G
P OPS
C7504
S
C
D
1
U
1
0
V
2
K
X
-5
G
P OPS
1
2
C7522S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
DY
C7522S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
27MHZ_OUT_R
SP_PLLVDD
27MHZ_IN 27MHZ_OUT
VIDEO_CLK_XTAL_SS N12P_XTAL_OUTBUFF
GPU_PLL_VDD
FB_CLAMP_MON_S
FB_CLAMP_MON
FB_CLAMP_TGL_REQ#STRAP2
STRAP1
STRAP0
STRAP4
STRAP3
ROM_CS#
STRAP4
STRAP_REF0_GND_N9
ROM_SO
STRAP3
ROM_SI
ROM_SO
ROM_SCLK
SMBD_THERM_NV
STRAP1 STRAP0
BUFRST#
ROM_SCLK
I2CA_SDA
I2CA_SCL
SMBC_THERM_NV
STRAP2
ROM_SI
VGA_RST#_R
GPIO9_ALERT
GPIO9_ALERT
GPIO8_OVERT#
GPIO8_OVERT#
GPIO10_FBVREF
FB_CLAMP_MON
I2CB_SCL
I2CB_SDA
PWR_LEVEL
N12P_JTAG_TRST
N12P_JTAG_TCK
N12P_JTAG_TMS
N12P_JTAG_TDO
N12P_JTAG_TDI
GPIO8_OVERT#
GPIO9_ALERT
SMBD_THERM_NV
SMBC_THERM_NV
P2800_VGA_DXP
P2800_VGA_DXN
I2CC_SCL
I2CC_SDA
FB_CLAMP_TGL_REQ#
GPIO10_FBVREF
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_S03D3V_VGA_S03D3V_VGA_S0
3D3V_VGA_S0
3D3V_S0
1D05V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0 3D3V_VGA_S0 3D3V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0
SML1_CLK[18,24,26]
SML1_DATA[18,24,26]
EC_FB_CLAMP_TGL_REQ# [24]EC_FB_CLAMP[24,75,83]
PURE_HW_SHUTDOWN# [24,26,36]
VIDEO_THERM_OVERT# [82]
VGA_RST# [73]
AC_PRESENT [17,24]
OVER_CURRENT_P8# [24]
VGA_CORE_VID [82]
VGA_CORE_PSI [82]
GPIO10_FBVREF [78,79,80,81]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
Custom
76 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
Custom
76 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Reserved
Custom
76 101Friday, June 28, 2013
<Core Design>
NV request to need to be keeped
20PF 5% 50V +/-0.25PF 0402
52mA
112mA
EA40-HW SC
30ohm@100MHz
DCR=0.04 ohm
Max current = 3000mA
180ohm@100MHz
DCR=0.3 ohm
Max current = 300mA
DA-05691-001_V05 P6
NC : N13P-GS
 N14P-GT
0102 remove 0R
SSID = VIDEO
DA-05691-001_V05 P15
GPIO20/21 NC : for ALL
A00 0618
A00 0618
1 2
34
RN7602
SRN10KJ-5-GP
OPS
RN7602
SRN10KJ-5-GP
OPS
1
2
R7612
10KR2J-3-GPDY
R7612
10KR2J-3-GPDY
1
2
R7620
45K3R2F-L-GPDY
R7620
45K3R2F-L-GPDY
1
2
C7604
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7604
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
G
S
D
Q7604
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
Q7604
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
1
23
4 RN7603
SRN2K2J-1-GP
OPS RN7603
SRN2K2J-1-GP
OPS
JTAG_TRST#
AN11
JTAG_TDO
AP12
JTAG_TDI
AM11
JTAG_TMS
AP11
JTAG_TCK
AM10
THERMDP
K3
THERMDN
K4
GPIO21
P1
GPIO20
P4
GPIO16
R8
GPIO13
M4
GPIO12
N3
GPIO11
M5
GPIO10
L1
GPIO9
M2
GPIO8
M1
GPIO7
N8
GPIO6
M7
GPIO5
L7
GPIO4
P7
GPIO3
P5
GPIO2
L6
GPIO1
M3
GPIO0
P6
I2CB_SDA
R6
I2CB_SCL
R7
I2CC_SDA
R3
I2CC_SCL
R2
I2CS_SDA
T3
I2CS_SCL
T4
GK107/GF108
GK208
NC
NC
GF117
GK107
NC
10/19 MISC1
NC
OVERT
GK208
GF108
NC
NCNC
GPIO16
GPIO8
GPIO20
GPIO16
GK208 GF117
17 OF 17GPU1Q
N14P-GS-A1-GP
71.0N14P.00U
OPS
GK107/GF108
GK208
NC
NC
GF117
GK107
NC
10/19 MISC1
NC
OVERT
GK208
GF108
NC
NCNC
GPIO16
GPIO8
GPIO20
GPIO16
GK208 GF117
17 OF 17GPU1Q
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
TP7601TP7601
1
2
R7618
45K3R2F-L-GP
Samsung
R7618
45K3R2F-L-GP
Samsung
1
2
R7649
10KR2J-L-GP
OPS_GC6
R7649
10KR2J-L-GP
OPS_GC6
1
2
R7601
10KR2J-3-GP
OPS R7601
10KR2J-3-GP
OPS
KA
D7601
1SS400GPT-GP
2ND = 83.27101.01F
3RD = 83.01426.01F
83.00400.C1F
DY
D7601
1SS400GPT-GP
2ND = 83.27101.01F
3RD = 83.01426.01F
83.00400.C1F
DY
1
23
4 RN7605
SRN2K2J-1-GP
OPS RN7605
SRN2K2J-1-GP
OPS
1
2
R7648
10KR2J-L-GP
OPS_GC6
R7648
10KR2J-L-GP
OPS_GC6
1
2
R7619
24K9R2F-L-GP
OPS
R7619
24K9R2F-L-GP
OPS
1
2
R7629
0R0402-PAD-2-GP
R7629
0R0402-PAD-2-GP
1
2
R7616
45K3R2F-L-GPOPS
R7616
45K3R2F-L-GPOPS
41
2 3
X7601
XTAL-27MHZ-85-GP-U
82.30034.641
2ND = 82.30034.651
3RD = 82.30034.681
OPS
X7601
XTAL-27MHZ-85-GP-U
82.30034.641
2ND = 82.30034.651
3RD = 82.30034.681
OPS
G
S
D
Q7602
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
Q7602
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
1
2
R7602
10KR2J-3-GPOPS
R7602
10KR2J-3-GPOPS
1
2
R7609
45K3R2F-L-GP
OPS
R7609
45K3R2F-L-GP
OPS
1
2
R7608
4K99R2F-L-GP OPS
R7608
4K99R2F-L-GP OPS
1
2
3 4
5
6
Q7601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
OPS
Q7601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
OPS
1 2
L7602
MCB1608S181FBP-GP
OPS
68.00909.261
L7602
MCB1608S181FBP-GP
OPS
68.00909.261
12
R7628
10KR2J-3-GP
OPS
R7628
10KR2J-3-GP
OPS
1
2
R7627
4K99R2F-L-GPOPS
R7627
4K99R2F-L-GPOPS
1 2
34
RN7601
SRN4K7J-8-GPOPS
RN7601
SRN4K7J-8-GPOPS
DACA_RSET
AP8
DACA_VREF
AP9
DACA_VDD
AG10
DACA_BLUE
AL9
DACA_GREEN
AL10
DACA_RED
AK9
DACA_VSYNC
AN9
DACA_HSYNC
AM9
I2CA_SDA
R5
I2CA_SCL
R4NC
NC
NC
NC
NC
NC
NC
NC
TSEN_VREF
GF117
NC
4/17 DACA
GK208
GF108/GK107
GK208
GF108/GK107
GF117
14 OF 17GPU1N
N14P-GS-A1-GP
71.0N14P.00U
OPS
NC
NC
NC
NC
NC
NC
NC
NC
TSEN_VREF
GF117
NC
4/17 DACA
GK208
GF108/GK107
GK208
GF108/GK107
GF117
14 OF 17GPU1N
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
R7647
10KR2J-L-GP
OPS_GC6
R7647
10KR2J-L-GP
OPS_GC6
1 2
L7601
MHC1608S300QBP-GP
OPS
68.00335.051
L7601
MHC1608S300QBP-GP
OPS
68.00335.051
1
2
R7625
4K99R2F-L-GP
OPS
R7625
4K99R2F-L-GP
OPS
XTAL_SSIN
H1
VID_PLLVDD
AD7
SP_PLLVDD
AE8
PLLVDD
AD8
XTAL_OUT
H2
XTAL_OUTBUFF
J4
XTAL_IN
H3
11/17 XTAL_PLL
NC
GF117GF108/GK107
GK208
15 OF 17GPU1O
N14P-GS-A1-GP
71.0N14P.00U
OPS
11/17 XTAL_PLL
NC
GF117GF108/GK107
GK208
15 OF 17GPU1O
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7607
SC15P50V2JN-2-GP OPS
C7607
SC15P50V2JN-2-GP OPS
1
TP7602TP7602
1
2
C7608
SC15P50V2JN-2-GPOPS
C7608
SC15P50V2JN-2-GPOPS
1
2
R7611
10KR2J-3-GPDY
R7611
10KR2J-3-GPDY
1
TP7605TP7605
1
2
C7601
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
C7601
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
1
2
C7605
SCD1U10V2KX-5GP
OPSC7605
SCD1U10V2KX-5GP
OPS
1
2
3 4
5
6
Q7603
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
OPS_GC6
3rd = 84.2N702.F3F
Q7603
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
OPS_GC6
3rd = 84.2N702.F3F
1 2
R7604
0R0402-PAD-2-GP
R7604
0R0402-PAD-2-GP
1
2
C7602
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
C7602
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
OPS
1
2
R7617
15KR2F-GPOPS
R7617
15KR2F-GPOPS
1
TP7603TP7603
KA
D7602
1SS400GPT-GP
2ND = 83.27101.01F
3RD = 83.01426.01F
83.00400.C1F
OPS
D7602
1SS400GPT-GP
2ND = 83.27101.01F
3RD = 83.01426.01F
83.00400.C1F
OPS
1 2
R7603
1MR2J-1-GP
DY
R7603
1MR2J-1-GP
DY
1
2
R7613
10KR2J-3-GPDY
R7613
10KR2J-3-GPDY
1
2
C7603
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
C7603
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P
OPS
1
2
R7605
10KR2J-3-GPOPS
R7605
10KR2J-3-GPOPS
1
2
R7615
10KR2J-3-GPDY
R7615
10KR2J-3-GPDY
1
2
C7606
SC2D2U6D3V2MX-GPOPS
C7606
SC2D2U6D3V2MX-GPOPS
1
2
R7610
100KR2J-1-GPOPS
R7610
100KR2J-1-GPOPS
1
2
R7626
10KR2J-3-GPDY
R7626
10KR2J-3-GPDY
1
2
R7621
15KR2F-GPDY
R7621
15KR2F-GPDY
G
S
D
Q7606
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS_GC6
Q7606
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS_GC6
1
2
R7607
40K2R2F-GP
OPS
R7607
40K2R2F-GP
OPS
1
2
R7650
10KR2J-L-GP
OPS_GC6
R7650
10KR2J-L-GP
OPS_GC6
1
2
R7614
10KR2J-3-GPDY
R7614
10KR2J-3-GPDY
1
23
4
RN7604
SRN2K2J-1-GP
OPS RN7604
SRN2K2J-1-GP
OPS
MULTI_STRAP_REF
J1
STRAP4
J3
STRAP3
J5
STRAP2
J6
STRAP1
J7
STRAP0
J2
CEC
L3
BUFRST#
L2
ROM_SCLK
H4
ROM_SO
H7
ROM_SI
H5
ROM_CS#
H6
CEC IS NC FOR
12/17 MISC2
GK107/GK208/GF117
GK107/GF117
GK208
NC
NC
GF108
16 OF 17GPU1P
N14P-GS-A1-GP
71.0N14P.00U
OPS
CEC IS NC FOR
12/17 MISC2
GK107/GK208/GF117
GK107/GF117
GK208
NC
NC
GF108
16 OF 17GPU1P
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2 3
4
RN7606
SRN10KJ-5-GP
OPS
RN7606
SRN10KJ-5-GP
OPS
1
2
R7622
15KR2F-GPDY
R7622
15KR2F-GPDY
1
TP7604TP7604
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3D3V_VGA_S0
VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_POWER(4/5)
Custom
77 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_POWER(4/5)
Custom
77 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU_POWER(4/5)
Custom
77 101Friday, June 28, 2013
<Core Design>
NEAR TO GPU
DA-05691-001_V05 P20
3V3MISC : N13P-GS
3.3V +/- 5%
85mA
Under GPU
1U NEAR TO GPU
0.1U Under GPU
4.7U NEAR TO GPU
N14P-GT : 45A
SSID = VIDEO
1
2
C7713
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7713
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7710S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7710S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
XVDD_38
AA8
XVDD_37
AA7
XVDD_36
AA6
XVDD_35
AA5
XVDD_34
AA4
XVDD_33
AA3
XVDD_32
AA2
XVDD_31
AA1
XVDD_30
Y8
XVDD_29
Y7
XVDD_28
Y6
XVDD_27
Y5
XVDD_26
Y4
XVDD_25
Y3
XVDD_24
Y2
XVDD_23
Y1
XVDD_22
W8
XVDD_21
W7
XVDD_20
W5
XVDD_19
W4
XVDD_18
W3
XVDD_17
W2
XVDD_16
V8
XVDD_15
V7
XVDD_14
V6
XVDD_13
V5
XVDD_12
V4
XVDD_11
V3
XVDD_10
V2
XVDD_9
V1
XVDD_8
U8
XVDD_7
U7
XVDD_6
U6
XVDD_5
U5
XVDD_4
U4
XVDD_3
U3
XVDD_2
U2
XVDD_1
U1
9/17 XVDD
CONFIGURABLE
POWER
CHANNELS9 OF 17GPU1I
N14P-GS-A1-GP
71.0N14P.00U
OPS
9/17 XVDD
CONFIGURABLE
POWER
CHANNELS
9 OF 17GPU1I
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7729
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
C7729
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
1
2
C7728
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7728
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7725S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7725S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7719
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7719
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
C7703S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7703S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
GND_70
AM22
GND_69
AM19
GND_68
AM16
GND_67
AM13
GND_66
AL5
GND_65
AL33
GND_64
AL32
GND_63
AL30
GND_62
AL28
GND_61
AL26
GND_60
AL24
GND_59
AL23
GND_58
AL21
GND_57
AL20
GND_56
AL2
GND_55
AL18
GND_54
AL17
GND_53
AL15
GND_52
AL14
GND_51
AL12
GND_50
AK7
GND_49
AK10
GND_48
AJ7
GND_47
AH7
GND_46
AH5
GND_45
AH33
GND_44
AH32
GND_43
AH30
GND_42
AH29
GND_41
AH28
GND_40
AH24
GND_39
AH22
GND_38
AH2
GND_37
AH19
GND_36
AH16
GND_35
AH13
GND_4
AA15
GND_34
AH10
GND_33
AE7
GND_32
AE5
GND_31
AE33
GND_30
AE32
GND_29
AE30
GND_28
AE28
GND_27
AE2
GND_26
AC22
GND_25
AC20
GND_3
AA13
GND_24
AC18
GND_23
AC17
GND_22
AC15
GND_21
AC13
GND_20
AB7
GND_19
AB5
GND_18
AB32
GND_17
AB30
GND_16
AB28
GND_15
AB23
GND_2
A33
GND_14
AB21
GND_13
AB2
GND_12
AB19
GND_11
AB16
GND_10
AB14
GND_9
AB12
GND_8
AA22
GND_7
AA20
GND_6
AA18
GND_5
AA17
GND_1
A2
GND_140
N16
GND_139
N14
GND_138
N12
GND_137
M22
GND_136
M20
GND_135
M18
GND_134
M17
GND_133
M15
GND_132
M13
GND_131
K7
GND_130
K5
GND_129
K33
GND_128
K32
GND_127
K30
GND_126
K28
GND_125
K2
GND_124
G7
GND_123
G5
GND_122
G33
GND_121
G32
GND_120
G30
GND_119
G3
GND_118
G28
GND_117
G25
GND_116
G22
GND_115
G2
GND_114
G19
GND_113
G16
GND_112
G13
GND_111
G10
GND_110
F7
GND_109
F28
GND_108
E7
GND_107
E5
GND_106
E25
GND_105
E22
GND_104
E10
GND_103
D33
GND_102
D31
GND_101
D2
GND_100
C7
GND_99
C28
GND_98
C25
GND_97
C22
GND_96
C19
GND_95
C13
GND_94
C10
GND_93
B7
GND_92
B4
GND_91
B34
GND_90
B31
GND_89
B28
GND_88
B25
GND_87
B22
GND_86
B10
GND_85
B1
GND_84
AP33
GND_83
AP2
GND_82
AN7
GND_81
AN4
GND_80
AN34
GND_79
AN30
GND_78
AN25
GND_77
AN22
GND_76
AN19
GND_75
AN16
GND_74
AN13
GND_73
AN10
GND_72
AN1
GND_71
AM25
15/17 GND_1/2
6 OF 17GPU1F
N14P-GS-A1-GP
71.0N14P.00U
OPS
15/17 GND_1/2
6 OF 17GPU1F
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7706S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7706S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7701
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7701
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
C7711
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7711
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7722
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7722
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
VDD_72
Y22
VDD_71
Y20
VDD_70
Y18
VDD_69
Y17
VDD_68
Y15
VDD_67
Y13
VDD_66
W23
VDD_65
W21
VDD_64
W19
VDD_63
W16
VDD_62
W14
VDD_61
W12
VDD_60
V22
VDD_59
V20
VDD_58
V18
VDD_57
V17
VDD_56
V15
VDD_55
V13
VDD_54
U22
VDD_53
U20
VDD_52
U18
VDD_51
U17
VDD_50
U15
VDD_49
U13
VDD_48
T23
VDD_47
T21
VDD_46
T19
VDD_45
T16
VDD_44
T14
VDD_43
T12
VDD_42
R22
VDD_41
R20
VDD_40
R18
VDD_39
R17
VDD_38
R15
VDD_37
R13
VDD_36
P23
VDD_35
P21
VDD_34
P19
VDD_33
P16
VDD_32
P14
VDD_31
P12
VDD_30
N22
VDD_29
N20
VDD_28
N18
VDD_27
N17
VDD_26
N15
VDD_25
N13
VDD_24
M23
VDD_23
M21
VDD_22
M19
VDD_21
M16
VDD_20
M14
VDD_19
M12
VDD_18
AC23
VDD_17
AC21
VDD_16
AC19
VDD_15
AC16
VDD_14
AC14
VDD_13
AC12
VDD_12
AB22
VDD_11
AB20
VDD_10
AB18
VDD_9
AB17
VDD_8
AB15
VDD_7
AB13
VDD_6
AA23
VDD_5
AA21
VDD_4
AA19
VDD_3
AA16
VDD_2
AA14
VDD_1
AA12
13/17 NVVDD
8 OF 17GPU1H
N14P-GS-A1-GP
71.0N14P.00U
OPS
13/17 NVVDD
8 OF 17GPU1H
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7714
S
C
D
1
U
1
0
V
2
K
X
-4
G
P OPS
C7714
S
C
D
1
U
1
0
V
2
K
X
-4
G
P OPS
1
2
C7723
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7723
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
C7727
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
C7727
S
C
D
1
U
1
0
V
2
K
X
-5
G
P
X7R
OPS
1
2
C7717
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7717
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7724
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7724
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7718
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7718
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
GND_F
AG11
GND_169
T22
GND_168
T20
GND_167
T2
GND_166
T18
GND_165
T17
GND_164
T15
GND_163
T13
GND_162
R23
GND_161
R21
GND_160
R19
GND_159
R16
GND_158
R14
GND_157
R12
GND_156
P22
GND_155
P20
GND_154
P18
GND_153
P17
GND_152
P15
GND_151
P13
GND_150
N7
GND_149
N5
GND_148
N33
GND_147
N32
GND_146
N30
GND_145
N28
GND_144
N23
GND_143
N21
GND_142
N2
GND_141
N19
GND_OPT_2
W32
GND_OPT_1
C16
GND_H
AH11
GND_198
Y23
GND_197
Y21
GND_196
Y19
GND_195
Y16
GND_194
Y14
GND_193
Y12
GND_192
W28
GND_191
W22
GND_190
W20
GND_189
W18
GND_188
W17
GND_187
W15
GND_186
W13
GND_185
V23
GND_184
V21
GND_183
V19
GND_182
V16
GND_181
V14
GND_180
V12
GND_179
U23
GND_178
U21
GND_177
U19
GND_176
U16
GND_175
U14
GND_174
U12
GND_173
T7
GND_172
T5
GND_171
T32
GND_170
T28
16/17 GND_2/2
Optional CMD GNDs (2)
NC for 4-Lyr cards
7 OF 17GPU1G
N14P-GS-A1-GP
71.0N14P.00U
OPS
16/17 GND_2/2
Optional CMD GNDs (2)
NC for 4-Lyr cards
7 OF 17GPU1G
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7715
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7715
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7712
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7712
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7721
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7721
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
R7701
0
R
3
J
-0
-U
-G
P
UMA
R7701
0
R
3
J
-0
-U
-G
P
UMA
1
2
C7716
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7716
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
1
2
C7708
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7708
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
C7704
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
C7704
S
C
1
U
6
D
3
V
2
K
X
-G
P OPS
DNU#T8
T8
DNU#AL11
AL11
DNU#AJ5
AJ5
DNU#AJ4
AJ4
DNU#AC6
AC6
NC#V32
V32
NC#H31
H31
NC#D26
D26
NC#D23
D23
NC#D20
D20
NC#D19
D19
NC#C15
C15
NC#AJ28
AJ28
VDD33_2
M8
VDD33_1
L8
3V3MISC_2
K8
3V3MISC_1
J8
PINS
3V3MISC
DO NOT
CONNECT
17/17 NC/VDD33
THESE
GK107
GF117
3V3MISC
GK208
5 OF 17GPU1E
N14P-GS-A1-GP
71.0N14P.00U
OPS
PINS
3V3MISC
DO NOT
CONNECT
17/17 NC/VDD33
THESE
GK107
GF117
3V3MISC
GK208
5 OF 17GPU1E
N14P-GS-A1-GP
71.0N14P.00U
OPS
1
2
C7705S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7705S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7707S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C7707S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C7702
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7702
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
C7709
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7709
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
1
2
C7720
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
C7720
S
C
4
D
7
U
6
D
3
V
3
K
X
-G
P OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBA_CLK0N
FBA_CMD15
FBA_SEN0
FBA_MF1
FBA_CMD10
FBA_CMD3
FBA_CMD6
FBA_DQM0
FBA_DQM2
FBA_VREFC0
FBA_VREFD_L
FBA_CMD11
FBA_CMD4
FBA_VREFC0
FBA_ZQ0
FBA_CMD7
FBA_WCK23#
FBA_WCK23
FBA_WCK01#
FBA_WCK01
FBA_CMD12
FBA_VREFC0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D0
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_EDC0
FBA_EDC2
FBA_CLK0P
FBA_CMD1
FBA_CMD0
FBA_CMD13
FBA_CMD8
TP_VPPNC4
TP_VPPNC3
FBA_CMD9
FBA_CMD2
FBA_CMD14
FBA_VREFD_L
FBA_VREF_FET_L
FBA_CMD5
FBA_VREFD_L
FBA_EDC3
FBA_CMD6
FBA_CMD11
FBA_CMD3
FBA_CMD10
FBA_CMD2
FBA_CMD4
FBA_CMD7
FBA_CMD9
FBA_CMD15
FBA_CMD5
FBA_CMD12
FBA_CMD8
FBA_CMD1
FBA_CMD0
FBA_EDC1
FBA_DQM3
FBA_CLK0_MIDPT
FBA_CMD13
FBA_SEN0
FBA_ZQ1
FBA_CMD14
FBA_DQM1
FBA_MF2
FBA_CLK0N
FBA_CLK0P
FBA_WCK01#FBA_WCK01
FBA_WCK23
FBA_WCK23#
FBA_D8
FBA_D10
FBA_D9
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D29
FBA_D30
FBA_D31
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
VPP2
VPP1
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0 1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
FBA_CMD9[75]
FBA_CMD6[75]
FBA_CMD11[75]
FBA_CMD10[75]
FBA_CMD7[75]
FBA_CMD2[75]
FBA_CMD4[75]
FBA_CMD3[75]
FBA_CMD1[75]
FBA_CMD8[75]
FBA_CMD12[75]
FBA_CMD0[75]
FBA_CMD15[75]
FBA_CMD5[75]
FBA_CMD14[75]
FBA_CMD13[75]
FBA_CLK0N[75]
FBA_CLK0P[75]
GPIO10_FBVREF[76,79,80,81]
FBA_D[0..31] [75]
FBA_D[0..31] [75]
FBA_D[0..31] [75]
FBA_D[0..31] [75]
FBA_CMD8[75]
FBA_CMD12[75]
FBA_CMD0[75]
FBA_CMD15[75]
FBA_CMD5[75]
FBA_CMD1[75]
FBA_CMD6[75]
FBA_CMD11[75]
FBA_CMD10[75]
FBA_CMD7[75]
FBA_CMD9[75]
FBA_CMD3[75]
FBA_CMD2[75]
FBA_CMD4[75]
FBA_CMD14[75]
FBA_CMD13[75]
FBA_WCK01[75]
FBA_WCK01#[75]
FBA_WCK23[75]
FBA_WCK23#[75]
FBA_DQM[0..3] [75]FBA_EDC[0..3][75]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM1,2 (1/4)
Custom
78 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM1,2 (1/4)
Custom
78 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM1,2 (1/4)
Custom
78 101Friday, June 28, 2013
<Core Design>
Low
High
FBVREF%
Un-termination
FBVREF Termination
Type
Description
Normal(MF=0)
0.749V50%
70%Termination
GPU_GPIO10
1.0617V
Place close VDD ball
Place close VDD ball
Place close VDD ball
Place close VDDQ ball
Place close VDDQ ball
Voltage
Frame Buffer Patition A-Lower Half
Mirrored(MF=1)
SSID = VIDEO
1
2
R
7
8
0
7
1
K
3
3
R
2
F
-G
POPS
R
7
8
0
7
1
K
3
3
R
2
F
-G
POPS
1
2
R
7
8
0
9
1
K
3
3
R
2
F
-G
POPS
R
7
8
0
9
1
K
3
3
R
2
F
-G
POPS
1
2
R
7
8
0
4
9
3
1
R
2
F
-1
-G
POPS
R
7
8
0
4
9
3
1
R
2
F
-1
-G
POPS
1
2
C
7
8
1
7
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
1
7
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
G S
D
Q7801
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031OPS
Q7801
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031OPS
1
2 R7
8
1
0
1
K
R
2
J
-1
-G
P
OPS
R
7
8
1
0
1
K
R
2
J
-1
-G
P
OPS
1
2
C
7
8
2
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
2
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
R
7
8
0
3
9
3
1
R
2
F
-1
-G
POPS
R
7
8
0
3
9
3
1
R
2
F
-1
-G
POPS
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM2A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM2A
H5GQ2H24AFR-T2C-GP
OPS
1
2 R 7
8
1
1
1
K
R
2
J
-1
-G
P
OPS
R
7
8
1
1
1
K
R
2
J
-1
-G
P
OPS
1
2
C
7
8
1
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
1
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
8
2
4
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
C
7
8
2
4
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
1
2
C
7
8
2
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
2
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1 TP7802 TPAD14-OP-GPTP7802 TPAD14-OP-GP
1 TP7801 TPAD14-OP-GPTP7801 TPAD14-OP-GP
1
2
C
7
8
0
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
7
8
0
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
7
8
2
6
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
7
8
2
6
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
7
8
1
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS C7
8
1
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
8
1
0
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS C7
8
1
0
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM1A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM1A
H5GQ2H24AFR-T2C-GP
OPS
1 TP7803 TPAD14-OP-GPTP7803 TPAD14-OP-GP
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4
DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM2B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM2B
H5GQ2H24AFR-T2C-GP
OPS
1
2
R
7
8
1
3
1
2
1
R
2
F
-G
P
OPS
R
7
8
1
3
1
2
1
R
2
F
-G
P
OPS
1
2
C
7
8
2
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
2
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
8
2
7
S
T
3
3
0
U
2
V
D
M
-4
-G
P
DY
C
7
8
2
7
S
T
3
3
0
U
2
V
D
M
-4
-G
P
DY
1
2
C
7
8
1
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
7
8
1
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1 TP7804 TPAD14-OP-GPTP7804 TPAD14-OP-GP
1
2
C
7
8
1
1
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
8
1
1
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
7
8
0
7
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
8
0
7
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
7
8
0
9
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
8
0
9
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
7
8
1
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
POPS
C
7
8
1
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
POPS
1
2
C
7
8
1
6
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS C7
8
1
6
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
R7801
40D2R2F-GP
OPS
R7801
40D2R2F-GP
OPS
1
2
C
7
8
0
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
0
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
8
2
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
2
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
8
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
8
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R7802
40D2R2F-GP
OPS
R7802
40D2R2F-GP
OPS
1
2
R7805
549R2F-GP
OPS
R7805549R2F-GP
OPS
1
2
C
7
8
0
3
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
7
8
0
3
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
7
8
1
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
8
1
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
7
8
2
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
8
2
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
12
R7812 1KR2J-1-GPOPSR7812 1KR2J-1-GPOPS
1
2
C
7
8
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
8
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R7806
549R2F-GP
OPS
R7806
549R2F-GP
OPS
1
2
C
7
8
1
2
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS C7
8
1
2
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C7801
SCD01U16V2KX-3GP OPS
C7801
SCD01U16V2KX-3GP OPS
1
2
R
7
8
0
8
1
2
1
R
2
F
-G
P
OPS
R
7
8
0
8
1
2
1
R
2
F
-G
P
OPS
1
2
C
7
8
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
7
8
0
4
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4
DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM1B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM1B
H5GQ2H24AFR-T2C-GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBA_CMD27
FBA_CMD26
FBA_CMD17
FBA_CMD21
FBA_DQM7
FBA_CMD31
FBA_CMD16
FBA_CLK1N
FBA_SEN2
FBA_MF3
FBA_CLK1N
FBA_CMD25
FBA_DQM4
FBA_DQM6
FBA_VREFC1
FBA_WCK45#
FBA_WCK45
FBA_VREFD_H
FBA_WCK67#
FBA_WCK67
FBA_CMD23
FBA_VREFC1
FBA_CMD23
FBA_CMD20
FBA_CMD24
FBA_ZQ2
FBA_WCK67#
FBA_WCK67
FBA_WCK45#
FBA_WCK45
FBA_CLK1_MIDPT
FBA_VREFC1
FBA_CLK1P
FBA_CMD29
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBA_VREFD_H
FBA_CMD29
FBA_SEN2
FBA_ZQ3
FBA_CMD19
FBA_CMD25
FBA_CMD28
FBA_CMD30
TP_VPPNC5
TP_VPPNC6
FBA_CMD28
FBA_MF4
FBA_CLK1P
FBA_CMD30
FBA_VREF_FET_H
FBA_VREFD_H
FBA_CMD22
FBA_CMD17
FBA_CMD18
FBA_CMD16
TP_VPPNC8
TP_VPPNC7
FBA_CMD26
FBA_CMD21
FBA_CMD20
FBA_CMD24
FBA_CMD22
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7
FBA_CMD27
FBA_CMD19
FBA_CMD31
FBA_DQM5
FBA_CMD18
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D32
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_EDC4
FBA_EDC6
FBA_D61
FBA_D62
FBA_D63
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_EDC5
FBA_EDC7
FBA_D40
FBA_D42
FBA_D41
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0 1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
FBA_CMD30[75]
FBA_CMD29[75]
FBA_CMD18[75]
FBA_CMD20[75]
FBA_CMD19[75]
FBA_CMD17[75]
FBA_CLK1N[75]
FBA_CMD25[75]
FBA_CMD22[75]
FBA_CMD27[75]
FBA_CMD26[75]
FBA_CMD23[75]
FBA_CLK1P[75]
FBA_CMD24[75]
FBA_CMD28[75]
FBA_CMD16[75]
FBA_CMD31[75]
FBA_CMD21[75]
FBA_CMD30[75]
FBA_CMD29[75]
FBA_EDC[4..7][75] FBA_DQM[4..7] [75]
FBA_WCK45[75]
FBA_WCK45#[75]
FBA_WCK67[75]
FBA_WCK67#[75]
FBA_CMD22[75]
FBA_CMD27[75]
FBA_CMD26[75]
FBA_CMD23[75]
FBA_CMD25[75]
FBA_CMD18[75]
FBA_CMD20[75]
FBA_CMD19[75]
FBA_CMD17[75]
FBA_CMD24[75]
FBA_CMD28[75]
FBA_CMD16[75]
FBA_CMD31[75]
FBA_CMD21[75]
GPIO10_FBVREF[76,78,80,81]
FBA_D[32..63] [75]
FBA_D[32..63] [75]
FBA_D[32..63] [75]
FBA_D[32..63] [75]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM3,4 (2/4)
Custom
79 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM3,4 (2/4)
Custom
79 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM3,4 (2/4)
Custom
79 101Friday, June 28, 2013
<Core Design>
Frame Buffer Patition A-Upper Half
Place close VDD ball
Place close VDD ball
Place close VDD ball
Place close VDDQ ball
Place close VDDQ ball
Low
High
FBVREF%
Un-termination
FBVREF Termination
Type
0.749V50%
70%Termination
GPU_GPIO10
1.0617V
Voltage
Normal(MF=0) Mirrored(MF=1)
SSID = VIDEO
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM4A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM4A
H5GQ2H24AFR-T2C-GP
OPS
1
2
C
7
9
0
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
7
9
0
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
7
9
2
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
2
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
0
8
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
7
9
0
8
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
R
7
9
0
5
9
3
1
R
2
F
-1
-G
POPS
R
7
9
0
5
9
3
1
R
2
F
-1
-G
POPS
1
2
R
7
9
1
3
1
2
1
R
2
F
-G
P
OPS
R
7
9
1
3
1
2
1
R
2
F
-G
P
OPS
1
2
R
7
9
0
2
9
3
1
R
2
F
-1
-G
POPS
R
7
9
0
2
9
3
1
R
2
F
-1
-G
POPS
1
2
R
7
9
0
4
1
K
3
3
R
2
F
-G
POPS
R
7
9
0
4
1
K
3
3
R
2
F
-G
POPS
1
2
C
7
9
2
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
2
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
G S
D
Q7901
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031OPS
Q7901
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031OPS
1
2
C
7
9
0
3
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
7
9
0
3
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
7
9
1
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
7
9
1
8
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C
7
9
2
6
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
2
6
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
1
7
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
1
7
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
7
9
2
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
2
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
7
9
1
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
1
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
7
9
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
1
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
1
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
2
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
C
7
9
2
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
1
2
C
7
9
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
7
9
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C
7
9
0
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
0
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
2
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
2
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1 TP7901 TPAD14-OP-GPTP7901 TPAD14-OP-GP
1 TP7902 TPAD14-OP-GPTP7902 TPAD14-OP-GP12
R7910 1KR2J-1-GPOPSR7910 1KR2J-1-GPOPS
1
2
R7903
549R2F-GP
OPS
R7903
549R2F-GP
OPS
1
2
C
7
9
2
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
2
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
1
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
1
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2 R7
9
0
9
1
K
R
2
J
-1
-G
P
OPS
R
7
9
0
9
1
K
R
2
J
-1
-G
P
OPS
1 TP7903 TPAD14-OP-GPTP7903 TPAD14-OP-GP
1
2
R7906
40D2R2F-GP
OPS
R7906
40D2R2F-GP
OPS
1
2
C
7
9
1
9
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
1
9
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R7907
549R2F-GP
OPS
R7907
549R2F-GP
OPS
1
2
C
7
9
1
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
1
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
R7908
40D2R2F-GP
OPS
R7908
40D2R2F-GP
OPS
1
2
C
7
9
1
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
1
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
1
4
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
7
9
1
4
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
7
9
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R
7
9
1
2
1
2
1
R
2
F
-G
POPS
R
7
9
1
2
1
2
1
R
2
F
-G
POPS
1
2
C7901
SCD01U16V2KX-3GP OPS
C7901
SCD01U16V2KX-3GP OPS
1
2
R
7
9
0
1
1
K
3
3
R
2
F
-G
POPS
R
7
9
0
1
1
K
3
3
R
2
F
-G
POPS
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM3A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM3A
H5GQ2H24AFR-T2C-GP
OPS
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4
DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM3B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM3B
H5GQ2H24AFR-T2C-GP
OPS
1
2
C
7
9
0
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
7
9
0
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4
DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM4B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM4B
H5GQ2H24AFR-T2C-GP
OPS
1
2 R 7
9
1
1
1
K
R
2
J
-1
-G
POPS
R
7
9
1
1
1
K
R
2
J
-1
-G
POPS
1 TP7904 TPAD14-OP-GPTP7904 TPAD14-OP-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBB_CMD2
FBB_CMD0
FBB_CMD6
FBB_DQM1
FBB_CMD4
FBB_CMD15
FBB_CMD11
FBB_CLK0_MIDPT
FBB_DQM3
FBB_CMD3
FBB_CMD5
TP_VPPNC9
TP_VPPNC10
FBB_CMD10
FBB_CMD1
FBB_CMD7
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD13
FBB_CMD14
FBB_CMD14
FBB_CMD15
FBB_CLK0N
FBB_CLK0P FBB_CLK0N
FBB_CLK0P
FBB_VREFD_LFBB_VREFC0
FBB_VREFC0
FBB_VREF_FET_L
FBB_VREFD_LFBB_VREFC0
FBB_ZQ1
FBB_ZQ0
TP_VPPNC12
TP_VPPNC11
FBB_SEN0
FBB_SEN0
FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM0
FBB_DQM2
FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3
FBB_MFB
FBB_MF2
FBB_WCK01#
FBB_WCK01
FBB_WCK23
FBB_WCK23#
FBB_CMD8
FBB_CMD9
FBB_WCK01
FBB_WCK01#
FBB_WCK23
FBB_WCK23#
FBB_CMD12
FBB_VREFD_L
FBB_EDC0
FBB_EDC2
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D0
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D8
FBB_D10
FBB_D9
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_EDC1
FBB_EDC3
FBB_D29
FBB_D30
FBB_D31
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
FBB_CMD9[75]
FBB_CMD6[75]
FBB_CMD11[75]
FBB_CMD10[75]
FBB_CMD7[75]
FBB_CMD2[75]
FBB_CMD4[75]
FBB_CMD3[75]
FBB_CMD1[75]
FBB_CMD8[75]
FBB_CMD12[75]
FBB_CMD0[75]
FBB_CMD15[75]
FBB_CMD5[75]
FBB_CMD14[75]
FBB_CMD13[75]
FBB_CMD14[75]
FBB_CMD13[75]
FBB_CLK0N[75]
FBB_CLK0P[75]
FBB_DQM[0..3] [75]
FBB_EDC[0..3][75]
FBB_WCK23[75]
FBB_WCK23#[75]
FBB_WCK01[75]
FBB_WCK01#[75]
FBB_CMD6[75]
FBB_CMD11[75]
FBB_CMD10[75]
FBB_CMD7[75]
FBB_CMD9[75]
FBB_CMD2[75]
FBB_CMD4[75]
FBB_CMD3[75]
FBB_CMD1[75]
FBB_CMD8[75]
FBB_CMD12[75]
FBB_CMD0[75]
FBB_CMD15[75]
FBB_CMD5[75]
GPIO10_FBVREF[76,78,79,81]
FBB_D[0..31] [75]
FBB_D[0..31] [75]
FBB_D[0..31] [75]
FBB_D[0..31] [75]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM5,6 (3/4)
Custom
80 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM5,6 (3/4)
Custom
80 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM5,6 (3/4)
Custom
80 101Friday, June 28, 2013
<Core Design>
Normal(MF=0)
Mirrored(MF=1)
Place close VDD ball
Place close VDD ball
Place close VDD ball
Low
High
FBVREF%
Un-termination
FBVREF Termination
Type
0.749V50%
70%Termination
GPU_GPIO10
1.0617V
Voltage
Place close VDDQ ball
Place close VDDQ ball
Frame Buffer Patition B-Lower Half
SSID = VIDEO
1
2
R
8
0
0
7
1
K
3
3
R
2
F
-G
P
OPS
R
8
0
0
7
1
K
3
3
R
2
F
-G
P
OPS
1
2
R8004
549R2F-GPOPS
R8004
549R2F-GPOPS
1
2
R
8
0
0
8
1
2
1
R
2
F
-G
P
OPS
R
8
0
0
8
1
2
1
R
2
F
-G
P
OPS
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4
DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM6B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM6B
H5GQ2H24AFR-T2C-GP
OPS
1
2
C
8
0
1
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
0
2
1
S
C
1
U
6
D
3V
3
K
X
-2
G
P
OPS
C
8
0
2
1
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R
8
0
0
6
1
K
3
3
R
2
F
-G
P
OPS
R
8
0
0
6
1
K
3
3
R
2
F
-G
P
OPS
1
2
C
8
0
2
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
8
0
2
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
8
0
1
7
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
7
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
0
2
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
0
2
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
0
2
6
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
8
0
2
6
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM6A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM6A
H5GQ2H24AFR-T2C-GP
OPS
1 TP8002 TPAD14-OP-GPTP8002 TPAD14-OP-GP
1
2
R
8
0
1
3
1
2
1
R
2
F
-G
P
OPS
R
8
0
1
3
1
2
1
R
2
F
-G
P
OPS
1
2
C
8
0
0
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
0
0
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
0
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1 TP8003 TPAD14-OP-GPTP8003 TPAD14-OP-GP
1
2
C
8
0
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
0
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
12
R8012 1KR2J-1-GP
OPS
R8012 1KR2J-1-GP
OPS
1
2
C
8
0
1
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
0
1
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
R8005
549R2F-GP OPS
R8005
549R2F-GP OPS
1
2
C
8
0
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
8
0
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1 TP8001 TPAD14-OP-GPTP8001 TPAD14-OP-GP
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4
DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM5B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM5B
H5GQ2H24AFR-T2C-GP
OPS
1
2
R8001
40D2R2F-GP
OPS
R8001
40D2R2F-GP
OPS
1
2
R
8
0
0
9
9
3
1
R
2
F
-1
-G
P
OPS
R
8
0
0
9
9
3
1
R
2
F
-1
-G
P
OPS
1
2
R
8
0
0
3
9
3
1
R
2
F
-1
-G
P
OPS
R
8
0
0
3
9
3
1
R
2
F
-1
-G
P
OPS
1
2
R8002
40D2R2F-GP
OPS
R8002
40D2R2F-GP
OPS
1
2
C
8
0
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
0
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
0
1
4
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
4
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
0
2
0
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
8
0
2
0
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
8
0
0
8
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
0
0
8
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
0
0
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
0
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1 TP8004 TPAD14-OP-GPTP8004 TPAD14-OP-GP
1
2
C
8
0
0
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
0
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
0
1
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
0
0
3
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
0
0
3
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
0
2
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
8
0
2
3
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM5A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM5A
H5GQ2H24AFR-T2C-GP
OPS
1
2
C8025
SCD01U16V2KX-3GP
OPSC8025
SCD01U16V2KX-3GP
OPS
1
2
C
8
0
0
2
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
0
0
2
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
0
1
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
0
1
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2 R 8
0
1
1
1
K
R
2
J
-1
-G
P
OPS
R
8
0
1
1
1
K
R
2
J
-1
-G
P
OPS
1
2 R8
0
1
0
1
K
R
2
J
-1
-G
P
OPS
R
8
0
1
0
1
K
R
2
J
-1
-G
P
OPS
1
2
C
8
0
1
6
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
0
1
6
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
G S
D
Q8001
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
Q8001
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBB_D61
FBB_D62
FBB_D63
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_CLK1N
FBB_SEN2
FBB_MF3
FBB_DQM4
FBB_DQM6
FBB_VREFC1
FBB_VREFD_H
FBB_VREFC1
FBB_ZQ2
FBB_WCK67#
FBB_WCK67
FBB_WCK45#
FBB_WCK45
FBB_EDC5
FBB_EDC7
FBB_VREFC1
FBB_CLK1P
FBB_CMD29
FBB_VREFD_H
FBB_CMD30
FBB_VREF_FET_H
FBB_VREFD_H
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D32
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_EDC4
FBB_EDC6
FBB_D40
FBB_D42
FBB_D41
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD31
FBB_CMD20
FBB_CMD31
FBB_CMD27
FBB_CMD19
FBB_CMD21
FBB_CMD26
FBB_CMD17
FBB_DQM5
FBB_CMD23
FBB_CMD24
FBB_DQM7
FBB_CMD25
FBB_CMD28
FBB_CMD18
FBB_CMD16
FBB_CLK1N
FBB_CLK1_MIDPT
FBB_CMD29
FBB_SEN2
FBB_ZQ3
FBB_CMD30
FBB_MF4
FBB_CLK1P
FBB_WCK45#
FBB_WCK45
FBB_CMD22
FBB_WCK67#
FBB_WCK67
TP_VPPNC13
TP_VPPNC14
TP_VPPNC16
TP_VPPNC15
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0 1D35V_VGA_S0
1D35V_VGA_S0
FBB_CMD30[75]
FBB_CMD29[75]
FBB_CLK1N[75]
FBB_CLK1P[75]
FBB_EDC[4..7][75]
FBB_DQM[4..7] [75]
FBB_CMD18[75]
FBB_CMD20[75]
FBB_CMD19[75]
FBB_CMD17[75]
FBB_CMD25[75]
FBB_CMD22[75]
FBB_CMD27[75]
FBB_CMD26[75]
FBB_CMD23[75]
FBB_CMD24[75]
FBB_CMD28[75]
FBB_CMD16[75]
FBB_CMD31[75]
FBB_CMD21[75]GPIO10_FBVREF[76,78,79,80]
FBB_CMD30[75]
FBB_CMD29[75]
FBB_D[32..63] [75]
FBB_D[32..63] [75]
FBB_WCK67[75]
FBB_WCK67#[75]
FBB_WCK45[75]
FBB_CMD22[75]
FBB_CMD27[75]
FBB_WCK45#[75]
FBB_CMD26[75]
FBB_CMD23[75]
FBB_CMD25[75]
FBB_CMD18[75]
FBB_CMD20[75]
FBB_CMD19[75]
FBB_CMD17[75]
FBB_CMD24[75]
FBB_CMD28[75]
FBB_CMD16[75]
FBB_CMD31[75]
FBB_CMD21[75]
FBB_D[32..63] [75]
FBB_D[32..63] [75]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM7,8 (4/4)
Custom
81 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM7,8 (4/4)
Custom
81 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
GPU-VRAM7,8 (4/4)
Custom
81 101Friday, June 28, 2013
<Core Design>
SSID = VIDEO
Low
High
FBVREF%
Un-termination
FBVREF Termination
Type
0.749V50%
70%Termination
GPU_GPIO10
1.0617V
Voltage
Normal(MF=0)
Mirrored(MF=1)
Frame Buffer Patition B-Upper Half
Place close VDD ball
Place close VDD ball
Place close VDD ball
Place close VDDQ ball
Place close VDDQ ball
1
2 R 8
1
1
3
1
K
R
2
J
-1
-G
P
OPS
R
8
1
1
3
1
K
R
2
J
-1
-G
P
OPS
12
R8112 1KR2J-1-GPOPSR8112 1KR2J-1-GPOPS
1
2
C
8
1
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
1
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C8101
SCD01U16V2KX-3GP
OPSC8101
SCD01U16V2KX-3GP
OPS
1
2
C
8
1
2
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
2
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R
8
1
1
4
1
2
1
R
2
F
-G
P
OPS
R
8
1
1
4
1
2
1
R
2
F
-G
P
OPS
1
2
R
8
1
0
4
1
K
3
3
R
2
F
-G
P
OPS
R
8
1
0
4
1
K
3
3
R
2
F
-G
P
OPS
1
2
C
8
1
2
6
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
8
1
2
6
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
G S
D
Q8101
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
Q8101
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
OPS
1
2
C
8
1
1
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
1
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
R8109
549R2F-GPOPS
R8109
549R2F-GPOPS
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM7A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM7A
H5GQ2H24AFR-T2C-GP
OPS
1
2
C
8
1
1
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
8
1
1
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
1
2
C
8
1
1
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
1
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
R
8
1
0
1
1
K
3
3
R
2
F
-G
P
OPS
R
8
1
0
1
1
K
3
3
R
2
F
-G
P
OPS
1
2
C
8
1
0
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
8
1
0
2
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
C
8
1
1
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
1
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
1
2
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
2
3
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
1
1
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
1
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
1
2
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
2
0
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
1
0
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
0
4
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
1
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
0
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
C
8
1
0
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
0
8
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
1
1
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
1
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R8110
40D2R2F-GP
OPS
R8110
40D2R2F-GP
OPS
1
2
C
8
1
2
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
2
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1 TP8103 TPAD14-OP-GPTP8103 TPAD14-OP-GP
1
2
C
8
1
1
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
1
6
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1 TP8101 TPAD14-OP-GPTP8101 TPAD14-OP-GP
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4
DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM8B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM8B
H5GQ2H24AFR-T2C-GP
OPS
1
2 R8
1
1
1
1
K
R
2
J
-1
-G
P
OPS
R
8
1
1
1
1
K
R
2
J
-1
-G
P
OPS
1
2
C
8
1
0
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
C
8
1
0
9
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
DY
VREFD
A10
VREFC
J14
VREFD
U10
VDD
C5
VDD
C10
VDD
D11
VDD
G1
VDD
G4
VDD
G11
VDD
G14
VDD
L1
VDD
L4
VDD
L11
VDD
L14
VDD
P11
VDD
R5
VDD
R10
VDDQ
B1
VDDQ
B3
VDDQ
B12
VDDQ
B14
VDDQ
D1
VDDQ
D3
VDDQ
D12
VDDQ
D14
VDDQ
E5
VDDQ
E10
VDDQ
F1
VDDQ
F3
VDDQ
F12
VDDQ
F14
VDDQ
G2
VDDQ
G13
VDDQ
H3
VDDQ
H12
VDDQ
K3
VDDQ
K12
VDDQ
L2
VDDQ
L13
VDDQ
M1
VDDQ
M3
VDDQ
M12
VDDQ
M14
VDDQ
N5
VDDQ
N10
VDDQ
P1
VDDQ
P3
VDDQ
P12
VDDQ
P14
VDDQ
T1
VDDQ
T3
VDDQ
T12
VDDQ
T14
VSS
T10
VSS
T5
VSS
P10
VSS
L10
VSS
L5
VSS
K14
VSS
K1
VSS
H14
VSS
H1
VSS
G10
VSS
G5
VSS
D10
VSS
B10
VSS
B5
VSSQ
U14
VSSQ
U12
VSSQ
U3
VSSQ
U1
VSSQ
R14
VSSQ
R12
VSSQ
R11
VSSQ
R4
VSSQ
R3
VSSQ
R1
VSSQ
N14
VSSQ
N12
VSSQ
N3
VSSQ
N1
VSSQ
M10
VSSQ
M5
VSSQ
K13
VSSQ
K2
VSSQ
H13
VSSQ
H2
VSSQ
F10
VSSQ
F5
VSSQ
E14
VSSQ
E12
VSSQ
E3
VSSQ
E1
VSSQ
C14
VSSQ
C12
VSSQ
C11
VSSQ
C4
VSSQ
C3
VSSQ
C1
VSSQ
A14
VSSQ
A12
VSSQ
A3
VSSQ
A1
VPP/NC#A5
A5
VPP/NC#U5
U5
1 OF 2VRAM8A
H5GQ2H24AFR-T2C-GP
OPS
1 OF 2VRAM8A
H5GQ2H24AFR-T2C-GP
OPS
1
2
C
8
1
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
0
5
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R
8
1
0
6
1
2
1
R
2
F
-G
P
OPS
R
8
1
0
6
1
2
1
R
2
F
-G
P
OPS
1
2
C
8
1
2
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
2
1
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
R8103
549R2F-GP OPS
R8103
549R2F-GP OPS
1
2
R
8
1
0
2
9
3
1
R
2
F
-1
-G
P
OPS
R
8
1
0
2
9
3
1
R
2
F
-1
-G
P
OPS
1
2
C
8
1
0
3
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
C
8
1
0
3
S
C
8
2
0
P
5
0
V
2
K
X
-1
G
P
OPS
1
2
R8108
40D2R2F-GP
OPS
R8108
40D2R2F-GP
OPS
1
2
C
8
1
1
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
1
2
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
C
8
1
2
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
C
8
1
2
5
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
DQ0
A4
DQ1
A2
DQ10
B11
DQ11
B13
DQ12
E11
DQ13
E13
DQ14
F11
DQ15
F13
DQ16
U11
DQ17
U13
DQ18
T11
DQ19
T13
DQ2
B4
DQ20
N11
DQ21
N13
DQ22
M11
DQ23
M13
DQ24
U4
DQ25
U2
DQ26
T4
DQ27
T2
DQ28
N4
DQ29
N2
DQ3
B2
DQ30
M4
DQ31
M2
DQ4
E4DQ5
E2
DQ6
F4
DQ7
F2
DQ8
A11
DQ9
A13
EDC0
C2
EDC1
C13
EDC2
R13
EDC3
R2
A12/RFU#J5/NC#J5
J5
ZQ
J13
DBI0#
D2
DBI1#
D13
DBI3#
P2
DBI2#
P13
WCK01
D4
WCK01#
D5
WE#
L12
WCK23
P4
WCK23#
P5
BA3/A3
H10
BA0/A2
H11
BA1/A5
K10
BA2/A4
K11
CKE#
J3
CK#
J11
CK
J12
RAS#
G3
CS#
G12
A10/A0
H4
A9/A1
H5
MF
J1
RESET#
J2
ABI#
J4
SEN
J10
A8/A7
K4
A11/A6
K5
CAS#
L3
2 OF 2VRAM7B
H5GQ2H24AFR-T2C-GP
OPS
2 OF 2VRAM7B
H5GQ2H24AFR-T2C-GP
OPS
1 TP8102 TPAD14-OP-GPTP8102 TPAD14-OP-GP
1 TP8104 TPAD14-OP-GPTP8104 TPAD14-OP-GP
1
2
C
8
1
1
8
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
C
8
1
1
8
S
C
1
U
6
D
3
V
3
K
X
-2
G
P
OPS
1
2
R
8
1
0
5
9
3
1
R
2
F
-1
-G
P
OPS
R
8
1
0
5
9
3
1
R
2
F
-1
-G
P
OPS
1
2
C
8
1
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
C
8
1
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VGA_CORE_BST2 PWR_VGA_CORE_BST2_R
PWR_VGA_CORE_HG2
PWR_VGA_CORE_SW2
PWR_VGA_CORE_LG2
PWR_VGA_CORE_SW2
V
G
A
_
S
N
B
2
PWR_VGA_CORE_EN
PWR_VGA_CORE_HG1
PWR_VGA_CORE_BST1_R
PWR_VGA_CORE_VIDBUF
PWR_VGA_CORE_TSENSE
PWR_VGA_CORE_FB
PWR_VGA_CORE_FS
PWR_VGA_CORE_PSI
PWR_VGA_CORE_REFIN
PWR_VGA_CORE_VREF
PWR_VGA_CORE_COMP
PWR_VGA_CORE_VCC
PWR_VGA_CORE_EN
PWR_VGA_CORE_VID
PWR_VGA_CORE_REFIN
VGA_R4R5
PWR_VGA_CORE_PSI
PWR_VGA_CORE_TALERT#
PWR_VGA_CORE_FBRTN
PWR_VGA_CORE_BST1
PWR_VGA_CORE_SW1
PWR_VGA_CORE_HG1
PWR_VGA_CORE_SW1
PWR_VGA_CORE_LG1
PWR_VGA_CORE_HG2
PWR_VGA_CORE_SW2
PWR_VGA_CORE_LG2
V
G
A
_
S
N
B
1
PWR_VGA_CORE_SW1
PWR_VGA_CORE_LG1
VGA_R1R3
81172_AGND
81172_AGND
81172_AGND
81172_AGND
81172_AGND
3D3V_VGA_S0
5V_S5
5V_S5
DCBATOUT
3D3V_VGA_S0
81172_AGND
VGA_CORE
VGA_CORE
81172_AGND
81172_AGND
VGA_CORE
3D3V_VGA_S0
DCBATOUT
VIDEO_THERM_OVERT#[76]
GND_SENSE [73]
VGA_SENSE [73]
DGPU_PWROK[15,24,83]
VGA_CORE_VID[76]
VGA_CORE_PSI[76]
DGPU_PWR_EN[15,83]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
NCP81172_VGA_CORE
A2
82 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
NCP81172_VGA_CORE
A2
82 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
NCP81172_VGA_CORE
A2
82 101Friday, June 28, 2013
<Core Design>
SSID = PWR.Plane.Regulator_vga_core
EN
PSI
N14P-GT iis ConfigB
20K 20K 2K 18K 0 2.7nF
20K 20K 2K 18K 0 2.7nF
20K 20K 2K 18K 0 2.7nF
39K
39K
30K
30K
3K
3K
24K
24K
3K
3K
1.8nF
1.8nF
N14E-GS
N14E-GE-B
N14E-GE
N14E-GL
38.5A<OCP<45.5A
44A<OCP<52A
66A<OCP<78A
82.5A<OCP<97.5A
38.5A<OCP<45.5A
60.5A<OCP<71.5A
49.5A<OCP<58.5A
38.5A<OCP<45.5A
R4/PR8203 R5/PR8201 C/PC8219
38.96A<OCP<46.04A
44.98A<OCP<53.16A
137.5A<OCP<162.5A
96.66A<OCP<114.2A
108.5A<OCP<128.2A
108.5A<OCP<128.2A
79.01A<OCP<93.98A
20K
20K
20K
20K
20K
20K
20K
20K
39K
20K
20K
20K
20K
20K
20K
20K
20K
39K
2K
2K
2K
2K
2K
2K
2K
2K
1.5K
18K
18K
18K
18K
18K
18K
18K
18K
30K
0
24A 35A
32A 55A
26A 45A
22A 35A
24.33A 35.42A
35A 40.89A
95A 125A
65.16A 87.87A
65.37A 98.6A
65.37A 98.6A
46.35A 71.83A
A
B
B
B
B
0
0
VGA type Config Design 
Current
0
0
0
0
0
1.5K
2.7nF
2.7nF
2.7nF
2.7nF
2.7nF
2.7nF
2.7nF
2.7nF
1.5nF
EDP-peak OCP R1/PR8207 R2/PR8211 R3/PR8204
N14P-LP
N14P-GE
N14P-GS
N14P-GT
B
B
B
B
25A
27A
38A
45A
35A
40A
60A
75A
N14P-GV
N14P-GV2
N14M-GS
N14M-LP
N14M-GL
N14M-GE
N14E-GTX
C
C
B
B
B
B 20K 20K 2K 18K 0 2.7nF
C
R1
R3
R2
R4
R5
B=4250K
I/P cap: 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP IND 0.22UH M PCMC063T-R22MN/ 2.8mohm/ Isat =40A rms /68.R2210.10V
O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L
H/S: SIRA14DP-T1-GE3 / 6.8mohm/8.5mOhm@4.5Vgs/ 84.A14DP.037
L/S: SIRA12DP-T1-GE3 / 4.4mohm/6mOhm@4.5Vgs/ 84.SRA12.037
NTC close Phase1 MOSFET
ESR=6mohm
1225 change P/N
Phase1
Phase2
0307 DY PR8263, POP PR8265
0521 change resistor value from 12K ohm to 10K
A00 0621
1
2
PC8221S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8221S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
1
2
PR8203
18KR2F-GP OPS
PR8203
18KR2F-GP OPS
1
2
PR8208
34KR2F-GPOPS
PR8208
34KR2F-GPOPS
1
2
PC8238
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
PC8238
S
C
D
1
U
1
0
V
2
K
X
-4
G
P
OPS
1
2
PC8229S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8229S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
123
4
5 6 7 8
SSS
G
D D D D
PU8202
S
IR
A
1
4
D
P
-T
1
-G
E
3
-G
P
OPS
SSS
G
D D D D
PU8202
S
IR
A
1
4
D
P
-T
1
-G
E
3
-G
P
OPS
1
2
PR8204
2KR2F-3-GP
OPS
PR8204
2KR2F-3-GP
OPS
123
4
5 6 7 8
SSS
G
D D D D
PU8209
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
SSS
G
D D D D
PU8209
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
123
4
5 6 7 8
SSS
G
D D D D
PU8205
S
IR
A
1
4
D
P
-T
1
-G
E
3
-G
P
OPS
SSS
G
D D D D
PU8205
S
IR
A
1
4
D
P
-T
1
-G
E
3
-G
P
OPS
1 2PR8213 10KR2J-3-GP
OPS
PR8213 10KR2J-3-GP
OPS
12
PC8217
SC10P50V2JN-4GP
OPS
PC8217
SC10P50V2JN-4GP
OPS
1 2
PL8202
COIL-D15UH-2-GP
OPS
PL8202
COIL-D15UH-2-GP
OPS
1
2
PC8220S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8220S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
1
2
PR8226
2D2R5F-2-GP
DY
PR8226
2D2R5F-2-GP
DY
1 2
PR8216 21KR2F-GP
OPS
PR8216 21KR2F-GP
OPS
1 2
PR8257
0R0402-PAD-2-GPOPS
PR8257
0R0402-PAD-2-GPOPS
1 2
PR8209
10KR2F-2-GP
OPS
PR8209
10KR2F-2-GP
OPS
1 2
PR8228
10R2J-2-GP
OPS
PR8228
10R2J-2-GP
OPS
1 2
PC8230
SCD1U25V3KX-GP
OPSPC8230
SCD1U25V3KX-GP
OPS
1 2
PC8218
SC100P50V2JN-L-GP
OPS
PC8218
SC100P50V2JN-L-GP
OPS
1
2
PC8227
SCD1U25V3KX-GP
OPS
PC8227
SCD1U25V3KX-GP
OPS
1
2
PC8224
S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8224
S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
1
2
PC8234S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8234S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
1
2
PR8201
0R0402-PAD-2-GP
OPSPR8201
0R0402-PAD-2-GP
OPS
1 2
PR8227
10R2J-2-GP
OPS
PR8227
10R2J-2-GP
OPS
1 2PR8212 0R0402-PAD-2-GPOPSPR8212 0R0402-PAD-2-GPOPS
1
2
PR8229
2D2R5F-2-GPDY
PR8229
2D2R5F-2-GPDY
1
2
PC8231
SC330P50V2KX-3GP
DY
PC8231
SC330P50V2KX-3GP
DY
1
2
PC8236
SCD1U25V3KX-GP
OPS
PC8236
SCD1U25V3KX-GP
OPS
1 2 PC8215
SC47P50V2JN-3GP
OPS
PC8215
SC47P50V2JN-3GP
OPS1
2
PR8207
20KR2F-L-GP
OPS
PR8207
20KR2F-L-GP
OPS
1 2PR8263 10KR2J-3-GPDYPR8263 10KR2J-3-GPDY
1
2
PT8210S
E
3
3
0
U
2
D
5
V
M
-1
4
-G
P
OPS
PT8210S
E
3
3
0
U
2
D
5
V
M
-1
4
-G
P
OPS
123
4
5 6 7 8
SSS
G
D D D D
PU8206
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
SSS
G
D D D D
PU8206
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
123
4
5 6 7 8
SSS
G
D D D D
PU8207
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
SSS
G
D D D D
PU8207
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
1
2
PC8216
SCD1U10V2KX-4GP
OPS
PC8216
SCD1U10V2KX-4GP
OPS
1
2
PT8211S
E
3
3
0
U
2
D
5
V
M
-1
4
-G
P
OPS
PT8211S
E
3
3
0
U
2
D
5
V
M
-1
4
-G
P
OPS
1 2
PR8267
82KR2F-1-GP
OPS
PR8267
82KR2F-1-GP
OPS
1 2
PC8237
SCD1U25V3KX-GP
OPSPC8237
SCD1U25V3KX-GP
OPS
1
2
PC8223S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8223S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
1
2
PR8258
10KR2J-3-GPOPS
PR8258
10KR2J-3-GPOPS
1
2
PC8214
S
C
D
1
U
1
0
V
2
K
X
-4
G
P DY
PC8214
S
C
D
1
U
1
0
V
2
K
X
-4
G
P DY
1 2PR8211
20KR2F-L-GP
OPS
PR8211
20KR2F-L-GP
OPS
1
2
C8232
SC1KP25V2JX-GPOPS
C8232
SC1KP25V2JX-GPOPS
1 2
PC8212
SC4D7U6D3V2MX-GP-U
OPS
PC8212
SC4D7U6D3V2MX-GP-U
OPS
12
PR8230
0R3J-0-U-GP
OPSPR8230
0R3J-0-U-GP
OPS
1
2
PR8264
2D2R2J-GP
OPS
PR8264
2D2R2J-GP
OPS
12
PR8225
0R3J-0-U-GP
OPS
PR8225
0R3J-0-U-GP
OPS
1
2 PC8222
SCD01U50V2KX-1GP
OPS PC8222
SCD01U50V2KX-1GP
OPS
1 2
PR8205
0R0402-PAD-2-GP
OPS
PR8205
0R0402-PAD-2-GPOPS
1
2
PR8259
0R2J-2-GPDY
PR8259
0R2J-2-GPDY
1
2
PC8228S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8228S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
1 2
PR8265
10KR2J-3-GP
OPS
PR8265
10KR2J-3-GP
OPS
1 2PR8214 0R0402-PAD-2-GPOPSPR8214 0R0402-PAD-2-GPOPS
1 2
PR8206
49D9R2F-GP
OPS
PR8206
49D9R2F-GP
OPS
1
2
PR8202
3K92R2F-GP OPS
PR8202
3K92R2F-GP OPS
BST1
1
HG1
2
EN
3
PSI
4
VID
5
VIDBUF
6
REFIN
7
VREF
8
FS
9
FBRTN
10
FB
11
COMP
12
TSNS
13
TALERT#
14
VCC
15
PGOOD
16
HG2
17
BST2
18
PH2
19
LG2
20
PVCC
21
PGND
22
LG1
23
PH1
24
GND
25
PU8201
NCP81172MNTXG-1-GP-U
74.81172.A73
OPS
PU8201
NCP81172MNTXG-1-GP-U
74.81172.A73
OPS
1 2
PL8201
COIL-D15UH-2-GP
OPS
PL8201
COIL-D15UH-2-GP
OPS
1
2
PT8212
SE470UF2VDM-GP
OPS
PT8212
SE470UF2VDM-GP
OPS
1 2
PR8210
0R0402-PAD-2-GP
OPS
PR8210
0R0402-PAD-2-GP
OPS
1
2
PC8235S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
PC8235S
C
1
0
U
2
5
V
5
K
X
-G
P
OPS
1
2
PC8211
SC1U6D3V2KX-GPOPS
PC8211
SC1U6D3V2KX-GPOPS
1
2
PR8268
NTC-100K-10-GPOPS
PR8268
NTC-100K-10-GPOPS
1 2 PR82150R2J-2-GP DY PR82150R2J-2-GP DY
1
2
PC8233
SC330P50V2KX-3GP
DY PC8233
SC330P50V2KX-3GP
DY
123
4
5 6 7 8
SSS
G
D D D D
PU8208
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
SSS
G
D D D D
PU8208
S
IR
A
1
2
D
P
-T
1
-G
E
3
-G
P
OPS
1
2
PC8219
SC2700P50V2KX-1-GP
OPS
PC8219
SC2700P50V2KX-1-GP
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VTT_CT_105VC_2
VTT_CT_3VC_1
3D3V_VGA_OUT1
1D05V_VGA_OUT2
DIS_1D5V_VGA_S0
1D5V_VGA_EN#
1D5V_ENABLE_RC
1D5V_VGA_EN
1D05V_VGA_EN
1D05V_VGA_EN
1D5V_ENABLE
DGPU_PWR_EN#
DGPU_PWR_EN#
1D5V_VGA_EN#
3D3V_S01D05V_S0
1D05V_VGA_S0
5V_S0
3D3V_VGA_S0
1D35V_VGA_S0
1D35V_VGA_S0
3D3V_AUX_S5
1D35V_S3
15V_S5DCBATOUT
3D3V_AUX_S5
1D05V_VGA_S0
VGA_CORE
DGPU_PWR_EN[15,82]
DGPU_PWROK[15,24,82]
EC_FB_CLAMP[24,75,76]
DGPU_PWROK[15,24,82]
DGPU_PWR_EN[15,82]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DISCRETE VGA POWER
Custom
83 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DISCRETE VGA POWER
Custom
83 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
DISCRETE VGA POWER
Custom
83 101Friday, June 28, 2013
<Core Design>
1D35V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0 should ramp-up before VGA_Core
VGA_Core should ramp-up before 1D5V_VGA_S0
1D35V_VGA_S0 should ramp-up before 1D05V_VGA_S0
1D05V_VGA_S0 3D3V_S0 to 3D3V_VGA_S0
1D05V_S0 to 1D05V_VGA_S0
AO4468, SO-8
Id=?A, Qg=9~12nC
Rdson=17.4~22m ohm
0319 modify Discharge Circuit
G
GD S
S D
3.3V +/- 5%
4.88A
SSID = PWR.Plane.Regulator_3p3v_vga, 1p35v_vga, 1p05v_vga
G
GD S
S D
0307 Add Discharge Circuit
X01 0322
A00 0618
1
2
PC8307
SC10U6D3V3MX-GP
OPS
PC8307
SC10U6D3V3MX-GP
OPS
1
2
PC8303
SC10U6D3V3MX-GP OPS
PC8303
SC10U6D3V3MX-GP OPS
1 2
PR8311
100KR2J-1-GP
OPS
PR8311
100KR2J-1-GP
OPS
1 2
PR8313
100KR2J-1-GP
OPS
PR8313
100KR2J-1-GP
OPS
1
2
C8306S
C
D
1
U
1
0
V
2
K
X
-L
1
-G
P
OPS
C8306S
C
D
1
U
1
0
V
2
K
X
-L
1
-G
P
OPS
1
2
3
4
5
6
7
8 S
S
S
G
D
D
D
D
PQ8308
SIRA06DP-T1-GE3-GP
84.SRA06.037
OPS SS
S
G
D
D
D
D
PQ8308
SIRA06DP-T1-GE3-GP
84.SRA06.037
OPS
G S
D
PQ8306
2N7002K-2-GP
84.2N702.J31 OPS
PQ8306
2N7002K-2-GP
84.2N702.J31 OPS
1
2
PR8316
10R2J-2-GP
OPS PR8316
10R2J-2-GP
OPS
1 2
R8312
0R2J-2-GP
Non-GC6
R8312
0R2J-2-GP
Non-GC6
1 2
R8314
10KR2J-3-GP
OPS
R8314
10KR2J-3-GP
OPS
1
2
PR8317
10R2J-2-GP OPS
PR8317
10R2J-2-GP OPS
1
2
C8308
S
C
D
1
U
1
0
V
2
K
X
-L
1
-G
P
OPS
C8308
S
C
D
1
U
1
0
V
2
K
X
-L
1
-G
P
OPS
1
2
C
8
3
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
8
3
0
1
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
PR8315
10R2J-2-GP
OPS PR8315
10R2J-2-GP
OPS
VIN1#1
1
VIN1#2
2
ON1
3
VBIAS
4
ON2
5
VIN2#6
6
VIN2#7
7
VOUT2#8
8
VOUT2#9
9
CT2
10
GND
11
CT1
12
VOUT1#13
13
VOUT1#14
14
GND
15
U8301
TPS22966DPUR-GP
74.22966.093
OPS
U8301
TPS22966DPUR-GP
74.22966.093
OPS
1
2
PR8301
10MR2J-L-GP
DY PR8301
10MR2J-L-GP
DY
1 2 3
456
PQ8304
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
OPS
PQ8304
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
OPS
1
2
C
8
3
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
C
8
3
0
7
S
C
1
0
U
6
D
3
V
3
M
X
-G
P
DY
1
2
C8304S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C8304S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
C
8
3
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
OPS
C
8
3
0
5
S
C
2
2
0
P
5
0
V
2
K
X
-3
G
P
OPS
1
2
C8310
S
C
D
1
U
1
0
V
2
K
X
-L
1
-G
P
OPS
C8310
S
C
D
1
U
1
0
V
2
K
X
-L
1
-G
P
OPS
1 2
PG8315
GAP-CLOSE-PWR
PG8315
GAP-CLOSE-PWR
1 2
R8313
0R0402-PAD-2-GP
R8313
0R0402-PAD-2-GP
1 2
PG8312
GAP-CLOSE-PWR
PG8312
GAP-CLOSE-PWR
1
2
P
R
8
3
1
0
1
0
0
K
R
2
J
-1
-G
P
DY
P
R
8
3
1
0
1
0
0
K
R
2
J
-1
-G
P
DY
1
2
C8302S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
C8302S
C
1
U
6
D
3
V
2
K
X
-G
P
DY
1
2
P
R
8
3
1
2
3
3
0
K
R
2
J
-L
1
-G
P
OPS
P
R
8
3
1
2
3
3
0
K
R
2
J
-L
1
-G
P
OPS
1
2
PC8302
SCD01U50V2KX-1GP OPS
PC8302
SCD01U50V2KX-1GP OPS
1 2
PG8314
GAP-CLOSE-PWR
PG8314
GAP-CLOSE-PWR
G S
D
PQ8307
2N7002K-2-GP
84.2N702.J31 OPS
PQ8307
2N7002K-2-GP
84.2N702.J31 OPS
1
2
3
D8301
BAT54CPT-2-GP
75.00054.K7D
OPS GC6
D8301
BAT54CPT-2-GP
75.00054.K7D
OPS GC6
1 2
PG8313
GAP-CLOSE-PWR
PG8313
GAP-CLOSE-PWR
1 2 3
456
PQ8305
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
OPSPQ8305
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
OPS
1
2
C
8
3
0
9
S
C
1
K
P
2
5
V
2
J
X
-G
P
OPS
C
8
3
0
9
S
C
1
K
P
2
5
V
2
J
X
-G
P
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DCBATOUT
DCBATOUT
5V_S0 3D3V_S0 VGA_CORE 1D05V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
UNUSED PARTS/EMI Capacitors
A3
86 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
UNUSED PARTS/EMI Capacitors
A3
86 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
UNUSED PARTS/EMI Capacitors
A3
86 101Friday, June 28, 2013
<Core Design>
SSID = User.Interface
0116 Add RF CAP
0117 Add EMC CAP
0528 Add NPTH hole
1
S2
SPRING-52-GP
34.4T025.001
S2
SPRING-52-GP
34.4T025.001
1
SO1
STF217R128H83-2-GP
34.4Y702.301
OPS
SO1
STF217R128H83-2-GP
34.4Y702.301
OPS
1
2
E
C
8
6
0
4
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
0
4
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
1
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
1
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
SO3
STF217R128H83-2-GP
34.4Y702.301
OPS
SO3
STF217R128H83-2-GP
34.4Y702.301
OPS
1
2
E
C
8
6
1
0
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
1
0
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
0
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
E
C
8
6
0
3
S
C
D
1
U
2
5
V
2
K
X
-G
P
1
2
E
C
8
6
0
6
S
C
D
1
U
2
5
V
2
K
X
-G
P
E
C
8
6
0
6
S
C
D
1
U
2
5
V
2
K
X
-G
P
1
2
E
C
8
6
1
4
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
1
4
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
2
0
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
2
0
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
C3
HOLE197R166-1-GP
ZZ.00PAD.V71
C3
HOLE197R166-1-GP
ZZ.00PAD.V71
1
C1HOLE197R166-1-GP
ZZ.00PAD.V71
C1
HOLE197R166-1-GP
ZZ.00PAD.V71
1
2
E
C
8
6
1
5
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
1
5
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
1
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
1
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
0
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
0
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
H2
HOLET256B315R111-GP
ZZ.00PAD.M01
H2
HOLET256B315R111-GP
ZZ.00PAD.M01
1
2
E
C
8
6
0
7
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
0
7
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
2
1
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
2
1
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
0
8
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
0
8
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
H4
HOLET256B315R111-GP
ZZ.00PAD.M01
H4
HOLET256B315R111-GP
ZZ.00PAD.M01
1
S3
SPRING-52-GP
34.4T025.001
S3
SPRING-52-GP
34.4T025.001
1
2
3
PAD1
PAD-3P-GP
PAD1
PAD-3P-GP
1
2
E
C
8
6
0
5
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
0
5
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
2
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
2
2
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
S4
SPRING-52-GP
34.4T025.001
S4
SPRING-52-GP
34.4T025.001
1
2
E
C
8
6
0
1
S
C
D
1
U
2
5
V
2
K
X
-G
P
E
C
8
6
0
1
S
C
D
1
U
2
5
V
2
K
X
-G
P
1
S1
SPRING-52-GP
34.4T025.001
S1
SPRING-52-GP
34.4T025.001
1
2
E
C
8
6
1
6
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
1
6
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
C2
HOLE197R166-1-GP
ZZ.00PAD.V71
C2
HOLE197R166-1-GP
ZZ.00PAD.V71
1
H3
HT85BE85R29-U-5-GP
ZZ.00PAD.D41
H3
HT85BE85R29-U-5-GP
ZZ.00PAD.D41
1
2
E
C
8
6
1
1
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
E
C
8
6
1
1
S
C
D
1
U
2
5
V
2
K
X
-G
P
DY
1
2
E
C
8
6
0
9
S
C
D
1
U
2
5
V
2
K
X
-G
P
E
C
8
6
0
9
S
C
D
1
U
2
5
V
2
K
X
-G
P
1
SO2
STF217R128H83-2-GP
34.4Y702.301
OPS
SO2
STF217R128H83-2-GP
34.4Y702.301
OPS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP_BPM1
XDP_BPM5
XDP_BPM2
XDP_BPM6
XDP_PRDY#
XDP_BPM3
XDP_BPM7
XDP_BPM0
XDP_BPM4
XDP_PREQ#
CFG[19:0]
CFG14
CFG19
CFG3 CFG15
CFG1
CFG0 CFG12
CFG17
CFG2
CFG13
CFG18
CFG8
CFG10
CFG4
CFG5
CFG7
CFG6
CFG16
CFG9
CFG11
XDP_BPM[7:0]
PCIE_CLK_XDP_N
PCIE_CLK_XDP_P
3D3V_S5
XDP_PRDY#[4]
XDP_PREQ#[4]
CFG[19:0][6]
XDP_BPM[7:0][4]
PM_PWRBTN# [17,24]
SYS_PWROK [17,24]
PCIE_CLK_XDP_P [18]
PCIE_CLK_XDP_N [18]
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU XDP
A3
96 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU XDP
A3
96 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
CPU XDP
A3
96 101Friday, June 28, 2013
<Core Design>
CPU XDP
SSID = XDP
1 TP9608TP9608
1 TP9623TP9623
1 TP9601TP9601
1 TP9638TP96381 TP9621TP9621
1 TP9612TP9612
1 TP9636TP9636
1 TP9634TP9634
1 TP9616TP96161 TP9629TP9629
1 TP9609TP9609
1 TP9624TP9624
1 TP9606TP9606
1 TP9615TP9615
1 TP9632TP9632
1 TP9614TP9614
1 TP9627TP9627
1 TP9607TP9607
1 TP9618TP9618
1TP9639TP9639
1 TP9622TP9622
1 TP9630TP9630
1 TP9637TP9637
1 TP9619TP9619
1 TP9633TP9633
1 TP9635TP9635
1 TP9631TP9631
1 2
34
RN9602
SRN1KJ-11-GP-U XDP
RN9602
SRN1KJ-11-GP-U XDP
1TP9640TP9640
1 TP9613TP9613
1 TP9628TP9628
1 TP9617TP9617
1 TP9602TP9602
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Table of Content
A3
97 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Table of Content
A3
97 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Table of Content
A3
97 101Friday, June 28, 2013
<Core Design>
INTEL LAN82579
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is 
1 unless specified otherwise)
Default
Value
X
X
PCIE Routing
USB3.0 redriver PS8710 (Bottom Dock)
PS8122(HDMI Switch) (Bottom Dock)
0x16
0x9E
LANE2
LANE3
LANE4
0x12
0x40
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
Processor StrappingPCH Strapping
Voltage Rails
VOLTAGE DESCRIPTION
ACTIVE IN
POWER PLANE
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
Device
I C / SMBus Addresses2
SMBus ADDRESSES
CHIEF RIVER ORB
Address Bus
PCH
PS8321 HDMI level shifter
PCH SMBus
SATA Table
Pair
SATA
Device
0
5
Battery 1
4
3
2
1
Discrete VGA Thermal SML1_CLK/SML1_DATA
NCT7718W
HDD1
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDALANE1 X
LANE5
LANE6
LANE7
LANE8
CHARGER
EC SMBus 2
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
SO-DIMMA 
SO-DIMMB
Intel LAN 82579
G-Sensor
MINI WWAN
SMB2_CLK/SMB2_DATA
SMB2_CLK/SMB2_DATA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
EC SMBus 3
NCT5605Y-0
NCT5605Y-1
USB Table
PCH_SMBDATA/PCH_SMBCLK
USB port2 (usb redriver)
PCH_SMBDATA/PCH_SMBCLK
0
USB 2.0 HDMI
Pair
4
5
2
3
1
Device
6
7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Sequence
99 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Sequence
99 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Sequence
99 101Friday, June 28, 2013
<Core Design>
43
PM_PWRBTN#
KBC_PWRBTN#
T10
1.35V_VTT_PWRGD
1D05V_S0
1.05VTT_PWRGD / RUNPWROK
T11
T23
PCH_PWROK
T24
T25
T26
SYS_PWROK
PM_SLP_S3#
T27
T28
H_VCCST_PWRGD
(AC mode)
KBC GPIO43 to PCH
PCH_SUSCLK_KBC
Intel-Power Up Sequence
PM_RSMRST#
5V_S5
S5_ENABLE
3D3V_S5
3D3V_AUX_S5
T4
T5
RTC_RST#
DCBATOUT
+RTC_VCC
T2
T1
T3
T6
0ms<
>5msT8
AC_PRESENT
Red printings:KBC GPIO involved
KBC GPIO34 control
PM_SLP_S4#
PM_SLP_S3#
T12
T16
3D3V_S0
5V_S0
1D35V_S3
+5V_RUN & +3.3V_RUN need meet 0.7V difference
T13
T17
H_CPU_SVIDDAT
H_VR_ENABLE
IMVP_PWRGD
PLT_RST#
T15T14
DDR_VTT_PG_CTRL
T22
T18
0D675V_S0
T7
T9
KBC GPIO84 control
>9ms
<90ms
DCBATOUT
3D3V_AUX_S5
KBC_PWRBTN#
5V_S5
3D3V_S5
T3
T7
T8
T9 T10 >5ms
S5_ENABLE
(DC mode)
T4
T5
T6
PCH_SUSCLK_KBC
PM_PWRBTN#
+RTC_VCC T1
PCH_RSMRST#
T2
Red printings:KBC GPIO involved
1D5V_S0
RUNPWROK
VCC_CORE
T19
T20
T21
1D5V_S0
RUNPWROK
VCC_CORE
T19
T20
T21
1.35V_VTT_PWRGD
1D05V_S0
1.05VTT_PWRGD / RUNPWROK
T11
T23
PCH_PWROK
T24
T25
T26
SYS_PWROK
PM_SLP_S3#
T27
T28
H_VCCST_PWRGD
PM_SLP_S4#
PM_SLP_S3#
T12
T16
3D3V_S0
5V_S0
1D35V_S3
+5V_RUN & +3.3V_RUN need meet 0.7V difference
T13
T17
H_CPU_SVIDDAT
H_VR_ENABLE
IMVP_PWRGD
PLT_RST#
T15T14
DDR_VTT_PG_CTRL
T22
T18
0D675V_S0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Block Diagram
100 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd.,Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Block Diagram
100 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
Power Block Diagram
100 101Friday, June 28, 2013
<Core Design>
4b 5 6 7 8 9 10 11 121 2 3a 4 4a
Wistron SHARK BAY POWER UP SEQUENCE DIAGRAM
SWITCH
Page44
DDR_PG_CTL
VR_EN
H_VR_ENABLE
11
VCCST_PWRGD
+DC_IN
-3
DPWROK
PCH_PWROK
RUNPWROK
5
SLP_S3# de-assert, delay 20ms;
PCH_PWROK assert.
7
8
9
12
SYS_PWROK
4b
RUNPWROK
3a
3
TPS51367
VIN
SW
Page48
PGOOD
PM_SLP_S4#
DCBATOUT
EN
1D35V_S3
10
PM_SLP_S3#
Page51
TPS51312
VOUT
VIN
EN
3D3V_S5
1D5V_S0
PGOOD
RUNPWROK
4
4a
4b
7
H_VCCST_PWRGD
H_VCCST_PWRGD
VIDSOUT
H_CPU_SVIDDAT
EN1
S5_ENABLE
ACOK
5
SYS_PWROK be asserted after S0_PWR_GOOD
assertion and CPU core VR power good
assertion.
Page24
VR_READY
DCBATOUT
EN PGOOD
RUNPWROK
TPS51367
SW
VIN
4
4a
4b
1D05V_S0
PM_SLP_S3#
Page48
0D675V_S0
11
4
PCI_PLTRST#
IMVP_PWRGD
S0_PWR_GOOD
DCBATOUT
3D3V_AUX_S5
AC
SWITCH
Adapter in
Page42
Charger
BQ24715
AD+
Page44
DCBATOUT
Page44
VIN
(3.3V/5V)
TPS51225CRUKR
EN2
Page41
DC/DC
PCH_PWROK
APWROK
PWRBTN#
RSMRST#
VR_ON
H_CPU_SVIDDAT
DC
Battery
Page43
BT+
PLTRST#
RSMRST#_KBC
-1
PM_PWRBTN#
3D3V_S5
5V_S5
-7
Page24
GPIO20
GPIO43
PSL_IN2# KBC
NPCE985
GPIO34
Page46
VCC_CORE
PGOOD
 Level
Shifter
Page7
Haswell ULT CPU
 with
Lynx Point PCH
SWITCH
S5_ENABLE
PSL_IN1#
3D3V_AUX_KBC
AC_IN
KBC_PWRBTN#
1
-2
-3
-5
-4
DDR_VTT_PG_CTRL
1D35V_S3
-6
2
PM_SLP_S3#
PM_SLP_S4#
TPS51206
GPIO8
GPIO01
4b SWITCH
Page36
3D3V_S0
SWITCH
Page36
5V_S0
TPS51622
H_VR_ENABLE
RUNPWROK
RUNPWROK
VDIO
6
CSD97374
VSW
PWR_VCC_PWM1
GPIO80
S0_PWR_GOOD
SLP_S3# de-assert, delay 200ms;
S0_PWR_GOOD assert.
Page46
Page47
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
SMBUS Block Diagram
101 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
SMBUS Block Diagram
101 101Friday, June 28, 2013
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Hadley 15" X02
SMBUS Block Diagram
101 101Friday, June 28, 2013
<Core Design>
SML1_CLK
SML1_DATA
SCL2
SDA2
3D3V_S5
SRN2K2J-1-GP
SML0_CLK
SML0_DATA
GPIO73/SCL2
GPIO74/SDA2
PCH
SRN2K2J-1-GP
3D3V_S5
SML0CLK
SML0DATA
BQ24715
SCL
SDA
SRN4K7J-10-GP
PCH SMBus Block Diagram
PCH
SMBCLK
SMBDATA
KBC
CLK_SMB
3D3V_S0
SRN2K2J-1-GP
3D3V_S5‧‧ SRN2K2J-1-GP 3D3V_S0
2N7002SPT
‧ ‧‧
DAT_SMB
SML1DATA
SML1CLK
BAT_SCL
BAT_SDA
PCH_SMBCLK
PCH_SMBDATA
GPIO17/SCL1
GPIO22/SDA1
DIMM 1
SCL
SDA
3D3V_AUX_KBC‧
SMBus address:16
SMB_CLK
SMB_DATA
PCH_SMBCLK
PCH_SMBDATA
PBAT_SMBCLK1
PBAT_SMBDAT1
KBC SMBus Block Diagram
BAT1 CONN
‧‧
NPCE885
100R2J-2-GP
Minicard
WLAN
SMB_DATA
SMB_CLK
PCH_SMBDATA
PCH_SMBCLK
SMBus address:12
‧‧ ‧‧
‧‧‧‧
3D3V_S5
SRN2K2J-1-GP‧‧
MSATA
TouchPad
PCH_SMBCLK
PCH_SMBDATA‧‧
100R2J-2-GP
THM_SML1_DATA
THM_SML1_CLK‧‧switch ThermalNCT7718WSCLSDA SMBus address:XX
SML1_CLK
SML1_DATA
SRN2K2J-1-GP
3D3V_S0
KBC
NPCE985
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