Esquema Elétrico IPhone SE

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iPhone SE全套各内联座阻值维修图纸
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U_GPSLNA_RF
*
FD0514
*
SP0502
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FD0510
FD0505
PP0501
PP1005
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C5311_RF
L5302_RF
PP5302_RF
PP5303_RF
R
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3
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F
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5
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C5324_RF
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C3308
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L2041
L2080
L2030
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4
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3
7
0
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3
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0
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6
3
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1
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4
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R
0
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0
1
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0
5
0
0
PP3192_RF
PP3193_RF
PP3194_RF
PP3195_RF
C0540
C0543
C0542
C0541
T5301_RF
C
5
3
1
0
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R
F
R5303_RF
L
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3
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C5309_RF
C5308_RF
U5301_RF
C5302_RF
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C3226_RF
C3208_RF
C3204_RF
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C4300_RF
C4532_RF
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FR40A41A_RF
U_HBPAD_RF
C5201_RF*
R5316_RF
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R5302_RFR5301_RFR5309_RF
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C
3
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6
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3
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5
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3
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4
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4
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3
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U_LBPAD_RF
C4227_RFC4208_RF
U_VLBPAD_RF
L4712_RF
L4708_RFFR38X40B_RF
*
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4
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C5323_RF
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PP3174_RF
C4002
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4
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1
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C3270_RF
C3217_RF
C3603_RF
L4222_RF
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L4516_RF
U5201_RF
L5201_RF
C3022
C3020
C
4
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5
C4304
C3021
PP0907
R3021
R
4
3
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1
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4
3
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3
C
4
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C
5
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C3010
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0
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1
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R
0
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4
5
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C2122
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PP0610
C2125
C2124
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C1523
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C3230_RF
L3204_RF
C3219_RF
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R4100_RF
C3604_RF
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C4606_RF
C4710_RF
*
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4
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4
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6
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4
5
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4
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*
FT_41BC_RF
C4520_RFL4528_RF
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4
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4
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2
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W
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C3013
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W
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C1111
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C0742
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0
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4
1
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C2114
C1125
C1122
C2085
C2001
C
1
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4
6
C1548
C1521
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1
5
5
0
C
0
7
0
5
C
0
7
0
6
C
0
7
0
7
C
0
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U1500
*
C3221_RF
C1527C3222_RF
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3
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3
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F
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3
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C3228_RF
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3
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C3205_RF
C3201_RF
C3206_RF
C3413_RF
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3
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4
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4
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4
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C2110
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C3216_RF
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C
1
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2
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C
3
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C3202_RF
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3
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3
9
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F
R3306_RF
R3305_RF
R3307_RF
R3311_RF
R3301_RF
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3
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3
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4
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4
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4
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3
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3
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C
3
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C1151
C3670
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C1107
C1224C1113
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C
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C4108_RF
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L4802_RF
L4101_RF
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4
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4
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C4118_RF
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L4401_RF
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L5129_RF
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L5216_RF
L5208_RF
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3
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1
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C1106
C1109
C1112
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C1222
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0
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5
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C
2
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C2311
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C
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R3507_RF
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3
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U_EEP_RF
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2
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C3903_RF
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C4805_RF
L4805_RF
U_WFR_RF
FD40B41A_RF
*
U
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C4803_RFL4806_RF
FD0516
C5139_RF
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L5123_RF
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3
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4
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3
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4
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3
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3
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3
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R
1
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1
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2
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C2132
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2
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2
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6
LOW_COAX_RF
*
C3911_RF
C3910_RF
C3913_RF
R3901_RF
C3904_RF
C3916_RF
C3902_RF
U
P
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R
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B
M
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N
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C5101_RFC
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PP4304
PP4303
FL5146_RF
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U
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FD0501
w 
w 
w 
. c
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 a
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i x
 . 
c o
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N69 MLB - EVT
BRD 820-00282
BOM 639-00931 (N69 BETTER)
SCH 051-00648
MCO 056-01352
BOM 639-01271 (N69 ULTRA)
BOM 639-01272 (N69H ULTRA)
BOM 639-01231 (N69 BEST)
BOM 639-01012 (N69H BETTER)
BOM 639-01232 (N69H BEST)
1 OF 60
46
CAMERA:FOREHEAD FLEX B2B
CAMERA:REAR CAMERA B2B
AUDIO:CALTRA CODEC (1/2)
SENSORS:MOTION SENSORS
LAST_MODIFICATION=Wed Aug 19 11:42:47 2015
SYSTEM POWER:CHARGER
RF TRANSCEIVER (1 0F 3)
QFE DCDC
44
RX DIVERSITY (2)
SOC:SERIAL & GPIO
I/O:BUTTON FLEX B2B
BASEBAND PMU (2 OF 2)
MESA POWER AND IO FILTERS
38
BASEBAND (1 OF 2)
7
9
SOC:OWL
SOC:POWER (2/3)
SYSTEM:MECHANICAL
51
MOBILE DATA MODEM (2 OF2)
SYSTEM POWER:PMU (1/3)
21
DISPLAY FLEX
I/O:TRISTAR 2
AUDIO:CALTRA CODEC (2/2)
27 WIFI/BT: MODULE AND FRONT END
STOCKHOLM
OMIT_TABLE_RF
ANTENNA FEEDS
RX DIVERSITY
HIGH BAND SWITCH
ANTENNA SWITCH
HIGH BAND PAD
2
13
11
9
SYSTEM:BOM TABLES
SYSTEM POWER:PMU (2/3)
AUDIO:SPEAKER DRIVER
TABLE OF CONTENTS
SYSTEM:N69 SPECIFIC [4]
SOC:JTAG,USB,XTAL
SOC:PCIE
3
SOC:CAMERA & DISPLAY
CAMERA:STROBE DRIVER
D403 (TOUCH B2B, DRIVER ICS)29
SYSTEM POWER:PMU (3/3)
SYSTEM POWER:BATTERY CONN
DISPLAY:POWER
I/O:DOCK FLEX B2B
BASEBAND:RADIO SYMBOL
page1
CELL:ALIASES
AP INTERFACE & DEBUG CONNECTORS
RF TRANSCEIVER (2 OF 3)
RF TRANSCEIVER (3 OF 3)
2G PA
VERY LOW BAND PAD
LOW BAND PAD
MID BAND PAD
GPS
Radio Subdesign Ports
3
4
5
8
10
11
12
14
15
16
17
18
19
20
22
23
24
26
28
30
33
34
35
36
37
39
40
41
42
43
45
47
48
49
50
52
53
54
55
56
57
58
59
60
1
4
5
6
7
15
13
12
10
8
31
30
24
23
22
21
20
32
33
35
36
37
41
42
43
45
51
46
49
50
25
NAND
SOC:POWER (3/3)
SOC:POWER (1/3)
1
32
31
40
6
BASEBAND (1 OF 2)
BASEBAND PMU (1 0F 2)
SCH,MLB,N69
051-00648
2015-08-2400047524174 ENGINEERING RELEASED
1 OF 49
4.0.0
TABLE OF CONTENTS
CONTENTS SYNCSYNC<CSA>PAGE DATE PAGE DATECONTENTS <CSA>
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CK
APPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
D
SIZEDRAWING NUMBER
BRANCH
7
B
3
 II NOT TO REPRODUCE OR COPY IT
 IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
 
功
夫
手
机
维
修
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手
机
维
修
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 承
接
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Ap
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F.
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和
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13
73
70
83
76
8
Q：
33
83
23
06
57
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PMU/SOC BOM OPTIONS
SOC ALTERNATES
SCHEMATIC & PCB BOM CALLOUTS
USED 10 TIMES IN DESIGN. 
USED 4 TIMES IN DESIGN. 
USED 5 TIMES IN DESIGN. 
USED 9 TIMES IN DESIGN. 
USED 35 TIMES IN DESIGN. 
USED 1 TIME IN DESIGN. 
USED 20 TIMES IN DESIGN. 
USED 1 TIME IN DESIGN. 
USED 61 TIMES IN DESIGN. 
USED 61 TIMES IN DESIGN. 
USED 5 TIMES IN DESIGN. 
USED 91 TIMES IN DESIGN. 
USED 91 TIMES IN DESIGN.
NOT ALL REFERENCE DESIGNATORS LISTED.
USED 4 TIMES IN DESIGN. 
USED 1 TIME IN DESIGN. 
USED 1 TIME IN DESIGN. 
USED 1 TIME IN DESIGN. 
USED 1 TIME IN DESIGN. 
USED 1 TIME IN DESIGN. 
USED 8 TIMES IN DESIGN. 
USED 51 TIMES IN DESIGN. 
POWER INDUCTOR ALTERNATES
SHIELD PART NUMBERS
COMPASS PART NUMBER
S3E NAND BOM OPTIONS
USED 1 TIME IN DESIGN. 
USED 9 TIMES IN DESIGN. 
USED 51 TIMES IN DESIGN. 
ALTERNATE BOM OPTIONS
CARBON BOM OPTIONS
2 OF 60
3 OF 49
4.0.0
051-00648
117S0202 1 RES,MF,20OHM,5%,1/32W,01005 INVENSENSE_CARBONR3021
1 U3010 INVENSENSE_CARBON_1_1338S00087 IC,CARBON,MPU-6800-00,LGA16
1 INVENSENSE_CARBON117S0202 RES,MF,20OHM,5%,1/32W,01005 R3022
SYNC_MASTER=N/A
SYSTEM:BOM TABLES
SYNC_DATE=N/A
1 RES,MF,20OHM,5%,1/32W,01005 INVENSENSE_CARBONR3020117S0202
C3022 INVENSENSE_CARBON1 CAP,CER,X5R,0.1UF,20%,6.3V,01005132S0316
CAP,CER,X5R,0.1UF,20%,6.3V,010051132S0316 INVENSENSE_CARBONC3020
IC,ACCEL,3-AXIS,DIG,BMA282,LGA14 INVENSENSE_CARBONU3020338S1163 1
C3021 INVENSENSE_CARBON138S0692 1 CAP,CER,X5R,1UF,20%,6.3V,0201
U3010338S00017 1 INVENSENSE_CARBONIC,CARBON,MPU-6700-12,LGA16
335S00085 NAND_32G U1500 TOSHIBA 16G SLGA70335S00072
ALTERNATE339S00122 339S00121 MALTA DEV, H DRAMU0600
339S00123 339S00121
ALTERNATE339S00096339S00097 U0600 MAUI DEV, M DRAM
U0600ALTERNATE339S00096 MAUI DEV, S DRAM339S00098
138S0867138S00020 C1100ALTERNATE MURATA,10UF,0402
ALTERNATE335S0946 U0900 IC,EEPROM,16KX8,1.8V,I2C,WLCSP4335S00066
EEEE CODE FOR 639-01231 32GB CRITICAL EEEE_32GEEEE_GN7J1825-6838
EEEE CODE FOR 639-01232 32GB825-6838 1 CRITICALEEEE_GN7H EEEE_32GH
825-6838 EEEE_64GHCRITICALEEEE_GP3WEEEE CODE FOR 639-01272 64GB1
138S0652 ALTERNATE TY,4.7UF,0402C3650138S0648
825-6838 EEEE CODE FOR 639-01271 64GB EEEE_GP3V EEEE_64G1 CRITICAL
IC,COMPASS,MAGNESIUM,601A-19,FLGA14338S00084 U3000 COMMON1
SHIELD,EMI,LOWER FRONT,N69806-03630 1 COMMONSH0501
132S0436132S0400 ALTERNATE C1280 CAP,CER,X5R,0.22UF,20%,6.3V,01005
TY,10UF,0402C1100138S0867138S00022 ALTERNATE
ALTERNATE155S00095 FL1280155S00068 FERR BD,100 OHM,25%,100MA,2 OHM,01005
C5302_RFALTERNATE MURATA,CAP,CER,1UF,20%,10V,X5R,0201138S0739138S0706
ALTERNATE138S0945 KYOCERA,CAP,CER,1UF,20%,10V,X5R,0201C5302_RF138S0739
DIODES INC. ACT DIODEALTERNATE376S00047 Q2300376S00106
TY,4.3UF,0402ALTERNATE138S0835 C1106138S00006
ALTERNATE L2060 CYNTEC,1UH,1608152S1929152S2052
335S00054 NAND_16G U1500335S00071 HYNIX 16G SLGA70
1 EEEE_GJYD825-6838 CRITICAL EEEE_16GHEEEE CODE FOR 639-01012 16GB
PCBF,MLB,N69820-00282 PCB CRITICAL ?1
SCHSCH,MLB,N69051-00648 1 CRITICAL ?
EEEE CODE FOR 639-00931 16GB825-6838 CRITICAL1 EEEE_GH6K EEEE_16G
SHIELD,EMI,UPPER FRONT,N69 SH0500 COMMON1806-03629
SHIELD,EMI,BACK,N69 SH05031 COMMON806-03556
152S00123 TAIYO 3225 15UH? L4020152S1936
TAIYO 2016 1.2UHL3700152S00075152S00118 ?
152S00120 152S00077 TAIYO 2016 1.0UH 0.65MML2070?
152S00121 152S00081 L2001 TAIYO 2012 0.47UH?
155S0453 FL3101 TY,FERR,120-OHM,01005ALTERNATE155S0773
TDK,VARISTOR,6.8V,100PF,01005377S0168 377S0140 DZ3150ALTERNATE
MURATA,CHOKE,65-OHM,0605155S00009155S00012 L3100ALTERNATE
TDK,FERR,240-OHM,0201ALTERNATE FL4200155S0581155S00067
138S00003 ALTERNATE138S00005 TY,15UF,0402C1500
?152S00117 L2000 TAIYO 2016 1.0UH152S00074
138S0831 KYOCERA,2.2UF,0201ALTERNATE C0610138S00049
KYOCERA,15UF,0402C1500138S00048 138S00003 ALTERNATE
FL3100155S0513 ALTERNATE MURATA,FERR,22-OHM155S0660
118S0764 PANASONIC,3.92K-OHM,0201R2250ALTERNATE118S0717
138S0831138S00032 ALTERNATE TY,2.2UF,0201C0610
CUMULUS 2ND FLOWALTERNATE U4301343S0638343S0688
335S00072 NAND,1YNM,32GX8,S3E,64G,T,SLGA70 U15001 NAND_32GCRITICAL
C0731132S0316 NOSTUFF1 CAP,CER,X5R,0.1UF,20%,6.3V,01005
MALTA1 R0651118S00025 RES,MF,330OHM,1%,1/32W,01005
1 U0600POP,MALTA+2GB 25NM DDR,A1,M,DEV339S00121 MALTA
1 R0730 MAUIRES,MF,100OHM,1%,1/32W,01005118S0631
131S0307 C07301 MAUICAP,CER,NPO/COG,100PF,5%,16V,01005
339S00096 1 U0600 MAUIPOP,MAUI+2GB 25NM DDR,C0,H,DEV
132S0316 1 C0731CAP,CER,X5R,0.1UF,20%,6.3V,01005 MAUI
U20001 MAUI338S00171 IC,PMU,ANTIGUA,D2255A1,OTP-YG
117S0161 R06511 MAUIRES,MF,0OHM,1/32W,01005
1338S00170 U2000 MALTAIC,PMU,ANTIGUA,D2255A1,OTP-BG
1 NOSTUFFC0730131S0307 CAP,CER,NPO/COG,100PF,5%,16V,01005
R0730118S00009 RES,MF,3.01KOHM,1%,1/32W,010051 MALTA
NAND,1YNM,16GX8,S3E,64G,T,SLGA70335S00054 U1500 CRITICAL1 NAND_16G
ALTERNATE138S0986 CAP,CER,3-TERM,7.5UF,20%,4V,0402C5201_RF138S00024
ALTERNATE FERR BD,70 OHM,25%,300MA,0.4 DCR,01005FL3151155S0941155S0960
NAND_64GU1500NAND,1YNM,64GX8,S3E,TLC,128G,H,ULGA70335S00076 1 CRITICAL
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTY
TABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTY
TABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
PART NUMBER
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
PART NUMBER
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEMPART# DESCRIPTIONQTY
TABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
PART NUMBER
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
PART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
PART NUMBER
PART# DESCRIPTIONQTY
TABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_ALT_ITEM
TABLE_5_ITEM
PART# DESCRIPTIONQTY
TABLE_5_HEAD
BOM OPTIONREFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
TABLE_5_ITEM
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SELECTED -->
SELECTED -->
BOOTSTRAPPING:BOARD REV
BOARD ID
0110110X
N/A
0X6C0X36
1100011XLED DRIVER
REAR CAM
0X29
N69 I2C DEVICE MAP
I2C BUS
BACKLIGHT
TIGRIS
0X63
OWL
1110 PROTO1 
1111 PROTO0 MLB
BOARD_ID[4:0]
00010 N69 MLB
FLOAT=LOW, PULLUP=HIGH
00011 N69 DEV
BOOT_CONFIG[2:0]
000 SPI0
001 SPI0 TEST MODE
010 NVME0 x2 MODE
011 NVME0 x2 TEST MODE
0100111X
N/AN/AUNUSED
N/AN/AUNUSED
FRONT CAM
CHESTNUT
0X34
TRISTAR ACCESSORY ID
TRISTAR USB
RESET
VBUS
TOUCH I2C
I2C1
0xA20x511010001XSEP EEPROMSEP I2C
ISP I2C1
TBD TBDTBD
0XC6
N/A
ALS
0X80
0X52
0011010X 0X1A
0X401000000X
0X75
0X4E0X27
0X741110100X
100 NVME0 x1 MODE
101 NVME0 x1 TEST MODE
111 FAST SPI0 TEST MODE
SELECTED -->
RESISTOR NOSTUFF = LOW '0'
RESISTOR STUFF = HIGH '1'
7-BIT HEX
0XEA
I2C0
I2C2
FORCE DFU PROCEDURE:
LCM
MOJAVE
FLOAT=LOW, PULLUP=HIGH
VBATT
POWER GROUND
POWER
TESTPOINTS
SOC & BB RESET
FIXTURE SI
AMUX
BINARY
ANTIGUA PMU
DEVICE
0101001X
0XE8
8-BIT HEX
SPEAKER AMP
1110101X
0X62 0XC4
BOOT CONFIG
ISP I2C0
TRISTAR
1100010X
110 SLOW SPI0 TEST MODE
FLOAT=LOW, PULLUP=HIGH
XXXX DVT 
XXXX CARRIER 
ACCESSORY POWER
TRISTAR DEBUG UART
E75
DFU
2. PLUG IN E75 CABLE TO FORCE DFU
1. FROM OFF MODE SHORT TP07 TO PP07
TP 24 FOR USB
BOARD_REV[3:0]
1100 EVT 
1101 PROTO2 
3 OF 60
4 OF 49
4.0.0
051-00648
PP1V8
BOARD_ID2
BOARD_REV2
PMU_TO_SYSTEM_COLD_RESET_L
PP1V8
DFU_STATUS
PMU_AMUX_BY
PP_LCM_BL_ANODE_CONN
PP11V3_MESA
BOARD_ID0
BOARD_ID4
PP_LCM_BL_CAT2_CONN
BOOT_CONFIG2
BOOT_CONFIG1
BOOT_CONFIG0
PP_TRISTAR_ACC2
TRISTAR_CON_DETECT_L
FORCE_DFU
LCD_TO_AP_PIFA_CONN
PP5V0_USB
PP_TRISTAR_ACC1
90_TRISTAR_DP1_CONN_P
90_TRISTAR_DP1_CONN_N
90_TRISTAR_DP2_CONN_P
90_TRISTAR_DP2_CONN_N
PMU_AMUX_AY
PP_LCM_BL_CAT1_CONN
MESA_TO_BOOST_EN
PP_BATT_VCC
BOARD_ID3
BOARD_REV0
BOARD_REV3
BOARD_REV1
SYSTEM:N69 SPECIFIC [4]
SYNC_MASTER=N/A SYNC_DATE=N/A
TP-P55
ROOM=TEST
TP051
MF 1/32W
1.00K
5%
ROOM=SOC
01005
R0411 1 2
1.00K
01005 5% 1/32WMF
ROOM=SOCR0410 1 2
NOSTUFF
1/32W5%
1.00K
01005 MF
ROOM=SOCR0409 1 2
TP-P55
ROOM=TEST
TP141
8
8 
8
8 
8
8
8 
8 
8 
8 
8 
8 
1.00KROOM=SOC
5%MF01005 1/32W
R0400 1 2
5% 1/32WMF01005
1.00KROOM=SOCR0401 1 2
NOSTUFF
01005 MF
ROOM=SOC 1.00K
1/32W5%
R0402 1 2
ROOM=SOC
1/32W
1.00K
NOSTUFF
01005 MF 5%
R0404 1 2
NOSTUFF
1.00K
1/32W5%MF01005
ROOM=SOCR0403 1 2
1/32W
ROOM=SOC 1.00K
MF01005
NOSTUFF
5%
R0406 1 2
NOSTUFF
1.00K
5%MF 1/32W
ROOM=SOC
01005
R0405 1 2
5%MF 1/32W
1.00KROOM=SOC
01005
R0407 1 2
NOSTUFF
ROOM=SOC
1/32W01005 MF 5%
1.00KR0408 1 2
TP-P55
ROOM=TEST
TP071
TP-P55
ROOM=TEST
TP161
ROOM=TEST
TP-P55
TP061
TP-P55
ROOM=TEST
TP171
ROOM=TEST
TP-P6
TP031
TP-P6
ROOM=TEST
TP001
TP-P6
ROOM=TEST
TP011
TP-P55
ROOM=TEST
TP221
ROOM=TEST
TP-P55
TP211
ROOM=TEST
TP-P55
TP201
TP-P55
ROOM=TEST
TP151
TP-P55
ROOM=TEST
TP131
TP-P55
ROOM=TEST
TP121
TP-P55
ROOM=TEST
TP111
TP-P55
ROOM=TEST
TP101
TP-P55
ROOM=TEST
TP091
ROOM=TEST
TP-P55
TP081
ROOM=TEST
TP-P55
TP191
TP-P55
ROOM=TEST
TP181
ROOM=TEST
P4MM-NSM
SM
PP07
1
P4MM-NSM
ROOM=TEST
SM
PP08
1
TP-P55
ROOM=TEST
TP241
TP-P55
ROOM=TEST
TP231
ROOM=TEST
TP-P6
TP021
29 
28 21 20 14 13 12 9 8 7 6 5 3 
16 9 5 
29
28 21 20 14 13 12 9 8 7 6 5 3 
8 
16 
28 
27 26 
28 
31 30 
31 30 
8 
28 
31 30 17 
31 30 
31 30 
31 30 
31 30 
31 30 
16 
28 
27 26 
33 18 17 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
A
A
OUT
OUT
OUT
BI
OUT
OUT
OUT
OUT
OUT
OUT
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
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A
PP
PP
A
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COMPASS RETURN CURRENTS 
BOARD STANDOFFS
TOP-SIDE, EAST
TOP-SIDE, WEST
AND AC COUPLING CAPS FOR 
LOWER FRONT SHIELD
FIDUCIALS
SHIELDS
TOP-SIDE, GROUND SPRING
PLATED SHIELD SLOT
UPPER FRONT SHIELD
NORTH WIFI UNDERFILL BLOCKING
COMPASS AC GROUNDING CAPS
4 OF 60
5 OF 49
4.0.0
051-00648
EAST_STANDOFF_AC_GND_SCREW
WEST_STANDOFF_AC_GND_SCREW
COMPASS_AC_GND_SCREW
SYNC_MASTER=N/A SYNC_DATE=N/A
SYSTEM:MECHANICAL
SPRING-SUPER-COWLING-GROUND-X145
CLIP-SM
SP0502
1
STDOFF-2.7OD1.4ID-1.04H-SM-1
BS0502
1
STDOFF-2.7OD1.4ID-1.04H-SM-1
BS0501
1
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP
FD0515
1
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP
FD0514
1
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP
FD0512
1
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP
FD0511
1
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP
FD0510
1
ROOM=ASSEMBLY
FID
0P5SM1P0SQ-NSP
FD0505
1
ROOM=ASSEMBLY
FID
0P5SM1P0SQ-NSP
FD0504
1
ROOM=ASSEMBLY
FID
0P5SM1P0SQ-NSP
FD0503
1
ROOM=ASSEMBLY
FID
0P5SM1P0SQ-NSP
FD0502
1
MF 1/32W0%
0.00
01005
CKPLUS_WAIVE=TERMSHORTED
R0501 1 2
0% 1/32W
0.00
MF01005
CKPLUS_WAIVE=TERMSHORTED
R0500 1 2
56PF
NP0-C0G
01005
5%
16V
C05231
2
NP0-C0G
56PF
5%
16V
01005
C05131
2
3.3PF
CERM
01005
16V
+/-0.1PF
C05221
2
3.3PF
01005
CERM
+/-0.1PF
16V
C05121
2
56PF
NP0-C0G
01005
5%
16V
C05211
2
16V
5%
01005
NP0-C0G
56PF
C05111
2
100PF
NP0-C0G
01005
5%
16V
C05201
2
100PF
NP0-C0G
01005
5%
16V
C05101
2
ROOM=ASSEMBLY
FID
0P5SQ-SMP3SQ-NSP
FD0516
1
ROOM=ASSEMBLY
3.3PF
C0G-CERM
0201
+/-0.1PF
25V
C05431
2
ROOM=ASSEMBLY
NP0-C0G-CERM
2%
0201
50V
56PF
C05421
2
ROOM=ASSEMBLY
100PF
C0G
0201
2%
50V
C05411
2
ROOM=ASSEMBLY
0.01UF
X5R-CERM
0201
10%
25V
C05401
2
SL-1.20X0.40-1.50X0.70-NSP
TH-NSP
SL0501
1
P4MM-NSM
SMPP05011
SHLD-EMI-LOWER-FRONT-N69
SM
OMIT_TABLE
SH0501
1
SM
SHLD-EMI-UPPER-FRONT-N69
OMIT_TABLE
SH0500
1
ROOM=ASSEMBLY
FID
0P5SM1P0SQ-NSP
FD0501
1
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
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DRAWING NUMBER SIZE
D
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SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
w 
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i x
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c o
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SOC - USB, JTAG, XTAL
VDD12_PLL_SOC: 1.14-1.26V @12mA MAX
VDD12_PLL_CPU:1.14-1.26V @2mA MAX
VDD18_USB: 1.71-1.89V @20mA MAX
VDD18_XTAL:1.62-1.98V @2mA MAX
VDD33_USB:3.14-3.46V @5mA MAX
VDD12_PLL_LPDP:1.14-1.26V @2mA MAX
051-00648
4.0.0
6 OF 49
5 OF 60
45_SOC_24M_O
45_XTAL_AP_24M_IN
USB_REXT
45_XTAL_AP_24M_OUT
USB_VBUS_DETECT
PP1V2_PLL PP1V8
90_USB_AP_DATA_AP_P
90_USB_AP_DATA_N
90_USB_AP_DATA_P
AP_TO_PMU_AMUX_OUT
AP_TO_PMU_WDOG_RESET
AP_TO_NAND_RESET_L
PMU_TO_SYSTEM_COLD_RESET_L
PP1V8_XTAL
PP3V3_USB
PMU_TO_OWL_ACTIVE_READY
SWD_DOCK_BI_AP_SWDIO
90_USB_AP_DATA_AP_N
45_AP_XTAL_GND
PP1V2
50_AP_BI_BB_HSIC0_DATA
50_AP_BI_BB_HSIC0_STB
AP_TO_PMU_TEST_CLKOUT
SWD_DOCK_TO_AP_SWCLK
SOC:JTAG,USB,XTAL
SYNC_MASTER=N/A SYNC_DATE=N/A
ROOM=SOC
P2MM-NSM
SM
PP0621
1
ROOM=SOC
P2MM-NSM
SM
PP0620
1
33 
33 
0201 ROOM=TRISTAR
15NH-250MA
L0601
1 2
ROOM=TRISTAR
0201
15NH-250MA
L0602
1 2
30 
30 
20%
6.3V
0.22UF
ROOM=PMU
0201
X5R
C06041
2
P3MM-NSM
SM
ROOM=SOC
PP0610 1
FCMSP
ROOM=SOC
SC58980X0B-A040
MAUI-2GB-25NM-DDR-H
CRITICAL
OMIT_TABLE
U0600
AP24
H33
AC31
AL22
AG25
H32
Y32
AA31
AA32
AB31
AB32
AC32
AN23
AF6
AR23
AN22
AN21
C16
D15
AT19
AT20
AR19
AP18
AP19
AF
13
F2
2
U2
0
T1
9
W
19
AP
21
C1
5
AL
21
AL
34
AN
20
Y33
AK35
AL35
16 
1%
MF
1/32W
511K
01005
ROOM=SOC
R06501
2
01005
ROOM=SOC
1/32W
0%
OMIT_TABLE
MF
0.00
R0651
1 2
17 
6.3V
X5R-CERM
0201
2.2UF
ROOM=SOC
20%
C06101
26.3V
01005
20%
ROOM=SOC
0.1UF
X5R-CERM
C06111
2
1KOHM-25%-0.2A
0201
ROOM=SOC
FL0610
1 2
13 
16 
16 
30 26 16 9 
16 9 3 
30 
30 
ROOM=SOC
01005
16V
5%
CERM
12PF
C06511
2
CRITICAL
1.60X1.20MM-SM
24.000MHZ-30PPM-9.5PF-60OHM
ROOM=SOC
Y0600
2 4
1 3
01005
ROOM=SOC
CERM
16V
5%
12PF
C06501
2
01005
X5R-CERM
ROOM=SOC
6.3V
20%
0.1UF
C06011
2
6.3V
20%
0.1UF
ROOM=SOC
01005
X5R-CERM
C06201
2
ROOM=SOC
SHORT-10L-0.1MM-SM
XW0650
1 2
0.1UF
20%
ROOM=SOC
01005
X5R-CERM
6.3V
C06121
26.3V
ROOM=SOC
X5R
01005
0.01UF
10%
C06031
2
1/32W
0.00
01005
MF
ROOM=SOC
0%
R0600
1 2
10%
X5R
01005
6.3V
0.01UF
ROOM=SOC
C06021
26.3V
0.1UF
X5R-CERM
20%
ROOM=SOC
01005
C06001
2
200
1%
MF
01005
1/32W
ROOM=SOC
R06401
2
29 28 21 20 14 13 12 9 8 7 6 3 
15 
15 7 6 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
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SHEET
PAGE TITLE
C
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
NC
NC
BI
BI
BI
BI
PP
SYM 1 OF 14
USB_D_N
USB_D_P
S3E_RESET*
TST_CLKOUT
HOLD_RESET
TESTMODE
WDOG
XO0
XI0
USB_REXT
FUSE1_FSRC
FUSE2_FSRC
COLD_RESET*
JTAG_TCK
JTAG_TMS
JTAG_TDI
CFSB
JTAG_TRST*
JTAG_TDO
UH2_HSIC1_DATA
UH1_HSIC0_DATA
UH1_HSIC0_STB
JTAG_SEL
UH2_HSIC1_STB
USB_ID
VD
D1
2_
UH
1_
HS
IC
0
VD
D1
2_
UH
2_
HS
IC
1
VD
D1
8_
XT
AL
VD
D3
3_
US
B
VD
D1
2_
PL
L_
LP
DP
ANALOGMUX_OUT
USB_VBUS
VD
D1
8_
US
B
VD
D1
2_
PL
L_
CP
U
VD
D1
2_
PL
L_
SO
C
OUT
IN
OUT
OUT
OUT
IN
IN
IN
BI
NC
NC
NC
NC
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SOC - PCIE INTERFACES
VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX
VDD12_PCIE: 1.14-1.26V @115mA MAX
VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX
PC
IE
 L
IN
K 
0
PC
IE
 L
IN
K 
1
VDD085_PCIE:0.802-TBDV @TBDmA MAX
6 OF 60
7 OF 49
4.0.0
051-00648
90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_TXD1_C_N
PP_FIXED
90_PCIE_NAND_TO_AP_RXD0_C_P
PCIE_AP_TO_NAND_RESET_L
PCIE_AP_TO_WLAN_RESET_L
90_PCIE_AP_TO_NAND_TXD0_C_P
90_PCIE_NAND_TO_AP_RXD1_C_N
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_NAND_TXD1_N
90_PCIE_AP_TO_NAND_TXD0_P
90_PCIE_AP_TO_NAND_TXD0_N 90_PCIE_AP_TO_NAND_TXD0_C_N
90_PCIE_AP_TO_WLAN_TXD_C_N
90_PCIE_AP_TO_NAND_REFCLK_N
90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_AP_TO_NAND_TXD1_P
90_PCIE_NAND_TO_AP_RXD0_P
90_PCIE_WLAN_TO_AP_RXD_C_P
90_PCIE_AP_TO_WLAN_TXD_C_P
90_PCIE_AP_TO_NAND_TXD1_C_P
PP1V2
PCIE_EXT_C
90_PCIE_NAND_TO_AP_RXD1_P 90_PCIE_NAND_TO_AP_RXD1_C_P
45_PCIE_RCAL_N
90_PCIE_WLAN_TO_AP_RXD_C_N
90_PCIE_NAND_TO_AP_RXD0_N
PP1V2_PCIE_TXPLL
90_PCIE_NAND_TO_AP_RXD0_C_N
PCIE_WLAN_TO_AP_CLKREQ_L
PP1V8
90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
PCIE_NAND_TO_AP_CLKREQ_L
90_PCIE_NAND_TO_AP_RXD1_N
SYNC_DATE=N/ASYNC_MASTER=N/A
SOC:PCIE
P2MM-NSM
SM
PP07011
P2MM-NSM
SM
PP07001
0.1UF
20%
6.3V
X5R-CERM
01005
ROOM=SOC
C07441
2
3.01K
1%
1/32W
MF
01005
ROOM=SOC
OMIT_TABLE
R07301
2
ROOM=SOC
SHORT-10L-0.1MM-SM
XW0740
1 2
CRITICAL
ROOM=SOC
FCMSP
MAUI-2GB-25NM-DDR-H
SC58980X0B-A040
OMIT_TABLE
U0600
AT11
AP12
AR12
AT12
AP29
AT33
AR33
AR10
AT10
AP11
AR11
AR30
AT30
AP35
AN35
AP34
AN34
AN32
AM32
AN31
AM31
AN30
AM30
AN28
AM28
AN27
AM27
AN26
AM26
AN25
AM25
AR29
AT29
AR32
AT32
AR31
AT31
AR28
AT28
AR26
AT26
AT24
AR24
AK
28
AK
25
AL
24
AL
27
AJ
26
AL
26
AH
28
AJ
25
AL
23
AJ
29
AL
29
AJ
24
AK
27
AJ
27
01005
1/32W
100K
MF
5%
ROOM=SOC
R07211
2
100K
01005
ROOM=SOC
MF
5%
1/32W
R07201
2
33 
13 
33 
33 
13 
13 
100K
5%
MF
ROOM=SOC
1/32W
01005
R07001
2
100K
5%
ROOM=SOC
MF
1/32W
01005
R07011
2
33 
13 
NP0-C0G
ROOM=SOC
5%
16V
01005
100PF
OMIT_TABLE
C07301
2
OMIT_TABLE
0.1UF
X5R-CERM
01005
6.3V
ROOM=SOC
20%
C07311
2
33 
33 
33 
33 
13 
13 
13 
13 
13 
13 
20%ROOM=SOC
0.1UF
010056.3V
X5R-CERM
C0712 1 2
ROOM=SOC X5R-CERM
6.3V
0.1UF
20%
01005
C0711 1 2
0.1UF
20%ROOM=SOC
6.3V 01005
X5R-CERM
C0710 1 2
20%
0.1UF
6.3V
ROOM=SOC
01005
X5R-CERM
C0709 1 2
0.1UF
ROOM=SOC
6.3V
20%
01005
X5R-CERM
C0707 1 2
6.3V
ROOM=SOC 20%
01005
X5R-CERM
0.1UFC0708 1 2
6.3V
X5R-CERM20%ROOM=SOC
01005
0.1UFC0706 1 2
X5R-CERM
6.3V
20%ROOM=SOC
01005
0.1UFC0705 1 2
01005
X5R-CERM20%ROOM=SOC
6.3V
0.1UFC0704 1 2
13 
13 
20%ROOM=SOC
0.1UF
01005
X5R-CERM
6.3V
C0703 1 2
6.3V
20%ROOM=SOC
0.1UF
X5R-CERM
01005
C0702 1 2
X5R-CERM
6.3V
20%ROOM=SOC
01005
0.1UFC0701 1 2
20%
ROOM=SOC
0201
2.2UF
6.3V
X5R-CERM
C07501
2
ROOM=SOC
X5R-CERM
2.2UF
0201
20%
6.3V
C07401
2
ROOM=SOC
0201-1
6.3V
1.0UF
X5R
20%
C07411
2
01005
X5R-CERM
20%
0.1UF
ROOM=SOC
6.3V
C07521
2
X5R-CERM
01005
0.1UF
20%
6.3V
ROOM=SOC
C07431
2
0.1UF
X5R-CERM
20%
ROOM=SOC
6.3V
01005
C07421
2
X5R
6.3V
20%
ROOM=SOC
0201-1
1.0UF
C07511
2
14 11 7 15 7 5 
29 28 21 20 14 13 12 9 8 7 5 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
NC
NC
NC
NC
NC
NC
NC
NC
SYM 2 OF 14
PCIE_RX4_P
VD
D1
2_
PC
IE
PCIE_REF_CLK2_P
PCIE_REF_CLK1_N
PCIE_REF_CLK0_P
PCIE_PERST3*
PCIE_PERST0*
PCIE_PERST2*
PCIE_PERST1*
PCIE_CLKREQ3*
PCIE_CLKREQ1*
PCIE_CLKREQ0*
PCIE_CLKREQ2*
PCIE_RX_TX_BYPASS_CLK_P
PCIE_RX_TX_BYPASS_CLK_N
PCIE_EXT_REF_CLK_N
PCIE_EXT_REF_CLK_P
PCIE_REF_CLK3_N
PCIE_REF_CLK3_P
PCIE_REF_CLK2_N
PCIE_RCAL_N
PCIE_RCAL_P
PCIE_TX4_N
PCIE_TX4_P
PCIE_RX4_N
PCIE_TX3_N
PCIE_TX3_P
PCIE_RX3_N
PCIE_RX3_P
PCIE_TX2_N
PCIE_TX2_P
PCIE_RX2_N
PCIE_RX2_P
PCIE_TX1_N
PCIE_TX1_P
PCIE_RX1_P
PCIE_RX1_N
PCIE_TX0_P
PCIE_TX0_N
PCIE_EXT_C
PCIE_RX0_N
PCIE_REF_CLK1_P
PCIE_REF_CLK0_N
PCIE_RX0_P
VD
D1
2_
PC
IE
_T
XP
LL
VD
D1
2_
PC
IE
_R
EF
BU
F
VD
D0
85
_P
CI
E
NC
BI
BI
NC
NC
OUT
OUT
OUT
OUT
NC
OUT
OUT
NC
NC
NC
NC
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
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SOC - CAMERA & DISPLAY INTERFACES
NOTE:VDD12_LPDP SHOULD BE POWERED
1.62-1.98V @23mA MAX
EVEN WHEN LPDP IS NOT USED
0.756-0.893V @11mA MAX7 OF 60
8 OF 49
4.0.0
051-00648
90_MIPI_RCAM_TO_AP_DATA2_CONN_N
90_MIPI_RCAM_TO_AP_DATA2_CONN_P
90_MIPI_RCAM_TO_AP_DATA1_CONN_N
90_MIPI_RCAM_TO_AP_CLK_CONN_P
90_MIPI_RCAM_TO_AP_DATA3_CONN_N
90_MIPI_RCAM_TO_AP_DATA1_CONN_P
I2C_ISP_BI_FCAM_SDA
I2C_ISP_TO_FCAM_SCL
I2C_ISP_TO_RCAM_SCL
I2C_ISP_BI_RCAM_SDA
90_MIPI_FCAM_TO_AP_CLK_P
PP1V2
PP1V8
PP_FIXED
90_MIPI_AP_TO_LCM_DATA0_N
45_RCAM_REXT
90_MIPI_AP_TO_LCM_DATA0_P
45_AP_TO_RCAM_CLK
45_AP_TO_FCAM_CLK
90_MIPI_RCAM_TO_AP_CLK_CONN_N
90_MIPI_RCAM_TO_AP_DATA3_CONN_P
90_MIPI_RCAM_TO_AP_DATA0_CONN_N
90_MIPI_RCAM_TO_AP_DATA0_CONN_P
90_MIPI_FCAM_TO_AP_DATA0_P
90_MIPI_FCAM_TO_AP_DATA0_N
PP1V8
90_MIPI_AP_TO_LCM_CLK_N
90_MIPI_AP_TO_LCM_CLK_P
90_MIPI_AP_TO_LCM_DATA1_P
45_LCM_REXT 90_MIPI_FCAM_TO_AP_CLK_N
90_MIPI_AP_TO_LCM_DATA1_N
AP_TO_STOCKHOLM_DWLD_REQUEST
AP_TO_RCAM_SHUTDOWN_L
45_AP_TO_FCAM_CLK_R
45_FCAM_REXT
45_AP_TO_RCAM_CLK_R
AP_TO_FCAM_SHUTDOWN_L
AP_TO_MUON_BL_STROBE_EN
SYNC_DATE=N/ASYNC_MASTER=N/A
SOC:CAMERA & DISPLAY
26 
CRITICAL
FCMSP
ROOM=SOC
MAUI-2GB-25NM-DDR-H
SC58980X0B-A040
OMIT_TABLE
U0600
H35
AL4
B29
A29
D24
D25
B33
A33
B32
A32
B31
A31
B30
A30
E2
3
E2
5
E2
7
F2
4
MAUI-2GB-25NM-DDR-H
CRITICAL
SC58980X0B-A040
ROOM=SOC
FCMSP
OMIT_TABLE
U0600
G31
G32
F35
G34
B12
A12
A8
B8
B9
A9
B13
A13
A14
B14
D12
B18
A18
A17
B17
A19
B19
D14
G35
B5
A5
B3
A3
A4
B4
A6
B6
B7
A7
D9
D33
D34
D32
F32
F33
C35
E34
C34
D1
0
E7 D8 E
11 E1
4
E1
0
E1
3
E8 D1
3
20 
20 
20 
20 
33 
20 
21 
20 
21 
33.2
1/32W
ROOM=SOC
MF1%
01005
R0809
1 2
28 
28 
28 
28 
28 
28 
21 
21 
21 
21 
21 
21 
21 
21 
21 
21 
20 
20 
22 21 
22 21 
1/32W
1.00K
01005
MF
5%
ROOM=SOC
R08071
2
5%
1/32W
1.00K
01005
ROOM=SOC
MF
R08061
2
1.00K
01005
1/32W
ROOM=SOC
MF
5%
R08051
201005ROOM=SOC
1.00K
5%
1/32W
MF
R08041
2
20%
0.1UF
01005
X5R-CERM
6.3V
ROOM=SOC
C08151
2
20%
0.1UF
01005
X5R-CERM
6.3V
ROOM=SOC
C08141
2
0.1UF
01005
X5R-CERM
6.3V
ROOM=SOC
20%
C08021
2
4.02K
1%
1/32W
01005
MF
ROOM=SOC
R0802 1
2
4.02K
1%
1/32W
01005
ROOM=SOC
MF
R08031
201005
4.02K
1%
1/32W
ROOM=SOC
MF
R0801 1
2
ROOM=SOC
1/32W
01005
33.2
MF1%
R0808
1 2
20%
0.1UF
01005
X5R-CERM
6.3V
ROOM=SOC
C08011
2
15 6 5 
29 
28 21 20 14 13 12 9 8 7 6 5 3 
14 11 6 
29 
2821 20 14 13 12 9 8 7 6 5 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
NC
NC
NC
NC
NC
NC
NC
SYM 4 OF 14
LPDP_TX3_P
LPDP_TX3_N
LPDP_TX2_P
LPDP_TX2_N
LPDP_TX1_P
LPDP_TX1_N
LPDP_TX0_P
LPDP_TX0_N
VD
D1
2_
LP
DP
LPDP_AUX_P
LPDP_AUX_N
EDP_HPD
DP_WAKEUP
LPDP_CAL_DRV_OUT
LPDP_CAL_VSS_EXT
SYM 3 OF 14
MIPID_DATA3_P
MIPID_DATA2_P
MIPID_DATA1_P
MIPID_DATA0_P
MIPID_CLK_P
MIPID_DATA3_N
MIPID_DATA2_N
MIPID_DATA1_N
MIPID_DATA0_N
MIPID_CLK_N
MIPI1C_DATA1_P
MIPI1C_DATA0_P
MIPI1C_CLK_P
MIPI1C_DATA1_N
MIPI1C_DATA0_N
MIPI1C_CLK_N
MIPI0C_DATA3_P
MIPI0C_DATA2_P
MIPI0C_DATA1_P
MIPI0C_DATA0_P
MIPI0C_CLK_P
MIPI0C_DATA3_N
MIPI0C_DATA2_N
MIPI0C_DATA1_N
MIPI0C_DATA0_N
MIPI0C_CLK_N
ISP_I2C0_SDA
ISP_I2C0_SCL
SENSOR0_RST
SENSOR0_CLK
ISP_I2C1_SCL
ISP_I2C1_SDA
SENSOR1_XSHUTDOWN
SENSOR0_XSHUTDOWN
SENSOR0_ISTRB
SENSOR1_RST
SENSOR1_ISTRB
SENSOR1_CLK
MIPICSI_MUXSEL
MIPI1C_REXT
MIPI0C_REXT
MIPID_REXT
VD
D1
8_
M
IP
I
VD
D0
85
_M
IP
I
IN
IN
IN
IN
NC
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
OUT
BI
OUT
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
w 
w 
w 
. c
 h
 i n
 a
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i x
 . 
c o
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SOC - GPIO & SERIAL INTERFACES
SPI PROBE POINTS
128kbit
. 
APN:335S0946
ANTI-ROLLBACK EEPROM
BUTTON PULL-UP RESISTORS AND BUFFERS
I2C PROBE POINTS
8 OF 60
9 OF 49
4.0.0
051-00648
AP_TO_PMU_SOCHOT1_L
PP1V8_ALWAYS
I2C0_AP_SDA
I2C2_AP_SCL
I2C2_AP_SDA
PP1V8
PMU_TO_AP_SOCHOT0_R_L PMU_TO_AP_SOCHOT0_L
45_I2S_AP_TO_SPEAKERAMP_MCLK_R
AP_TO_VIBE_TRIG
SPEAKERAMP_TO_AP_INT_L
BOARD_ID2
BOARD_ID1
BOARD_ID0
SPI_TOUCH_TO_AP_MISO
SPI_AP_TO_CODEC_MOSI
SPI_CODEC_TO_AP_MISO
45_AP_TO_TOUCH_CLK32K_RESET_L
SPI_AP_TO_CODEC_CS_L
SPI_AP_TO_CODEC_SCLK
UART_AP_TO_STOCKHOLM_TXD
UART_BB_TO_AP_CTS_L
SPI_AP_TO_TOUCH_MOSI
SPI_AP_TO_TOUCH_CS_L
SPI_MESA_TO_AP_MISO
SPI_AP_TO_MESA_MOSI
SPI_AP_TO_MESA_SCLK_R
I2S_AP_TO_CODEC_MSP_DOUT
I2S_CODEC_TO_AP_MSP_DIN
45_I2S_AP_TO_BB_BCLK
SPI_CODEC_TO_AP_MISO
I2S_AP_TO_CODEC_MSP_LRCLK
I2S_AP_TO_BB_LRCLK
BUTTON_VOL_UP_L
BUTTON_VOL_DOWN_L
AP_TO_BT_WAKE
AP_TO_SPEAKERAMP_RESET_L
AP_TO_BB_RESET_L
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_DOUT
ALS_TO_AP_INT_L
SPI_AP_TO_CODEC_MOSI
SPI_AP_TO_MESA_SCLK
45_I2S_AP_TO_SPEAKERAMP_MCLK
45_I2S_AP_TO_CODEC_MCLK_R
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
45_I2S_AP_TO_BT_BCLK
I2S_CODEC_TO_AP_OWL_XSP_DIN
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
45_I2S_AP_TO_CODEC_MCLK
I2S_CODEC_TO_AP_ASP_DIN
I2C_SEP_BI_EEPROM_SDA
I2S_AP_TO_CODEC_ASP_LRCLK
I2C1_AP_SCL
I2C1_AP_SDA
I2C_SEP_TO_EEPROM_SCL
I2S_AP_TO_BT_LRCLK
I2S_AP_TO_CODEC_ASP_DOUT
PP1V8
I2S_AP_TO_CODEC_XSP_DOUT
AP_TO_NAND_SYS_CLK
PP1V8
I2C_SEP_BI_EEPROM_SDA
SPI_AP_TO_TOUCH_SCLK
45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_BB_TO_AP_DIN
45_I2S_AP_TO_CODEC_MSP_BCLK
AP_TO_NAND_SYS_CLK_R
I2C_SEP_TO_EEPROM_SCL
PP1V8_SDRAM
PP1V8_SDRAM
BUTTON_HOLD_KEY_L
BUTTON_MENU_KEY_L
TRISTAR_TO_AP_INT
I2S_AP_TO_BB_DOUT
PMU_TO_AP_IRQ_L
BB_TO_AP_GPS_TIME_MARK
FORCE_DFU
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_CTS_L
UART_AP_TO_BB_RTS_L
UART_STOCKHOLM_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L
UART_AP_TO_ACCESSORY_TXD
UART_ACCESSORY_TO_AP_RXD
UART_AP_TO_BB_TXD
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD
SWI_AP_BI_TIGRIS
UART_BB_TO_AP_RXD
AP_TO_TOUCH_RESET_L
AP_TO_LED_DRIVER_EN
AP_TO_LCM_RESET_L
BOOT_CONFIG0
AP_TO_BB_WAKE_MODEM
BOARD_ID3
AP_TO_STOCKHOLM_DEV_WAKE
LCM_TO_AP_HIFA_BSYNC
BB_TO_AP_HSIC_DEVICE_RDY
AP_TO_BB_HSIC_HOST_RDY
BB_TO_AP_RESET_DETECT_L
BOOT_CONFIG1
BOOT_CONFIG2
BOARD_ID4
CODEC_TO_AP_PMU_INT_L
AP_TO_BB_RADIO_ON_L
TOUCH_TO_AP_INT_L
BOARD_REV3
BOARD_REV2
BOARD_REV1
BOARD_REV0
AP_TO_BB_COREDUMP
BB_TO_AP_IPC_GPIO
BUTTON_RINGER_A
AP_TO_BB_MESA_ON
CAM_EXT_LDO_EN
UART_STOCKHOLM_TO_AP_RXD
UART_AP_TO_BT_TXD
UART_AP_DEBUG_TXD
UART_BT_TO_AP_RXD
UART_AP_DEBUG_RXD
BUTTON_RINGER_A
PP1V8_ALWAYS
BUTTON_HOLD_KEY_BUFF_L
BUTTON_MENU_KEY_BUFF_L
UART_AP_TO_STOCKHOLM_RTS_L
I2C0_AP_SCL
PP1V8
PCIE_AP_TO_WLAN_DEV_WAKE
DFU_STATUS
AP_TO_NAND_FW_STRAP
SPI_AP_TO_TOUCH_MOSI
MESA_TO_AP_INT
SPI_AP_TO_TOUCH_SCLK_R
SPI_TOUCH_TO_AP_MISO
SPI_AP_TO_CODEC_SCLKI2C0_AP_SDA
I2C0_AP_SCL
I2C2_AP_SDA
I2C2_AP_SCL
I2C1_AP_SDA
I2C1_AP_SCL SYNC_DATE=N/A
SOC:SERIAL & GPIO
SYNC_MASTER=N/A
P3MM-NSM
SM
ROOM=SOC
PP09041
ROOM=SOC
P3MM-NSM
SM
PP09051
P3MM-NSM
ROOM=SOC
SM PP09021
ROOM=SOC
P3MM-NSM
SM
PP09031
P3MM-NSM
ROOM=SOC
SM
PP09011
SM
ROOM=SOC
P3MM-NSM
PP09001
ROOM=SOC
5%
2.2K
1/32W
MF
01005
R09001
2
01005
ROOM=SOC
10K
MF
5%
1/32W
R09411
2
ROOM=SOC
SM
P2MM-NSM
PP09010
1
ROOM=SOC
P2MM-NSM
SM
PP0909
1
P2MM-NSM
SM
ROOM=SOC
PP0908
1
SM
ROOM=SOC
P2MM-NSM
PP0907
1
ROOM=SOC
SM
P2MM-NSM
PP0906
1
33 
33 
33 
33 
33 
33 
33 
33 
01005
392K
1/32W
1%
MF
R09521
2
16 9 
16 9 
32 
27 
74LVC1G34GX
SOT1226
U0902
2
3
1
5
4
SOT1226
74LVC1G34GX
U0901
2
3
1
5
4
33 
33 
33 
33 
392K
MF
1%
1/32W
01005
R09501
2
32 
21 
ROOM=SOC
0.00
01005 0% 1/32W MF
R0960
1 2
1/32W
1.33K
01005
ROOM=SOC
1%
MF
R0905 1
2ROOM=SOC
MF
1/32W
01005
1%
1.33K
R0904 1
2
24 
24 
24 
24 
29 
ROOM=SOC
01005
1/32W
MF
0%
0.00
R0945
1 2
CRITICAL
FCMSP
ROOM=SOC
MAUI-2GB-25NM-DDR-H
SC58980X0B-A040
OMIT_TABLE
U0600
H34
H31
E31
D35
AH1
AG4
L31
M32
R34
N35
M33
N34
P34
M3N3
L4
P1
M4
V33
T33
V34
U33
U32
AM4
AP1
AN1
AN2
AM3
R31
P31
P32
V32
R32
AM24
Y3
AB4
V3
Y4
AA4
U2
W3
AM1
AM2
AD4
AC3
AB2
AD3
P33
V35
N32
M31
E33
E35
F34
F31
AA2
Y2
AA3
AC4
SC58980X0B-A040
ROOM=SOC
CRITICAL
FCMSP
MAUI-2GB-25NM-DDR-H
OMIT_TABLE
U0600C1D2
D1
F1
E2
F3
F2
H3
G3
J1
H4
K1
J3
K2
J4
L2
K3
L3
N1
AH2
AH3
AH4
AJ1
AJ2
AJ3
AJ4
AK1
AP3
AN4
AP4
AP5
AR2
AR3
AR4
AP6
AT3
AT4
AR6
AP7
AT5
AP8
AP9
AP10
AE1
AF2
AF3
AE3
AE4
K31
K32
L33
L32
AT23
AR20
AP23
AP22
N4
P3
R3
R2
J33
J34
J35
K33
T32
AF1
AE2
J31
J32
13 
30 16 
24 
24 9 
24 9 
24 9 
25 24 
25 24 
25 24 
25 24 
25 
24 
33 
01005
MF
5%
100K
1/32W
ROOM=SOC
R09511
2
ROOM=SOC
1/32W MF0%01005
0.00
R0930
1 2
29 
33 
3 
33 
32 16 8 
33 29 28 9 
16 
29 
33 
33 
33 
24 16 
16 
16 
0.00
01005
1/32W
ROOM=SOC
MF0%
R0940
1 2
01005
NOSTUFF
ROOM=SOC
MF
1/32W
5%
10K
R09101
2
8 
8 
8 
8 
2.2K
MF
01005
1/32W
ROOM=SOC
5%
R0907 1
2
1/32W
5%
01005
MF
ROOM=SOC
2.2K
R0906 1
2
WLCSP
M34128-FCS6_P/T
ROOM=SOC
CRITICAL
U0900
B1 A2
A1
B2
27 
27 
27 
27 
29 
29 8 
29 8 
24 
24 8 
24 8 
24 8 
20 
33 
33 
33 
33 
33 
33 
33 
33 
30 
30 
33 
33 
33 
33 
33 
33 
33 
33 
30 
30 
13 
3 
3 
28 
29 
33 
25 
25 
32 16 
32 16 
33 
3 
3 
3 
3 
3 
3 
3 
3 
3 
3 
3 
33 
22 
17 9 
1/32W
MF
01005
ROOM=SOC
2.2K
5%
R0902 1
2 ROOM=SOC
5%
MF
01005
2.2K
1/32W
R0903 1
2
26 16 8 
26 16 8 
30 25 17 8 
30 25 17 8 
20 8 
20 8 
1.0UF
0201-1
6.3V
X5R
20%
ROOM=SOC
C09001
2
01005
33.2
ROOM=SOC
MF
1%
1/32W
R0922
1 2
01005
10K
ROOM=SOC
5%
1/32W
MF
R09091
2
01005
MF
1/32W
2.2K
5%
ROOM=SOC
R0901 1
2
33.2
1%
MF
ROOM=SOC
01005
1/32W
R0920
1 2
17 15 12 8 
29 
28 21 20 14 13 12 9 8 7 6 5 3 
29 8 
24 8 
24 8 
29 
28 21 20 14 13 12 9 8 7 6 5 3 
29
28 21 20 14 13 12 9 8 7 6 5 3 
33 30 26 24 17 16 15 14 12 8 
33 30 26 24 17 16 15 14 12 8 
32 16 8 
17 15 12 8 
29 
28 21 20 14 13 12 9 8 7 6 5 3 
29 8 
24 8 
26 16 8 
26 16 8 
20 8 
20 8 
30 25 17 8 
30 25 17 8 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
NC
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
OUT
IN
IN
NC
NC
NC
NC
NC
NC
OUT
NC
NC
NC
OUT
IN
OUT
OUT
NC
OUT
OUT
IN
OUT
OUT
OUT
SYM 6 OF 14
CPU_ACTIVE_STATUS
CLK32K_OUT
NAND_SYS_CLK
SOCHOT0
SOCHOT1
SEP_SPI0_SCLK
SEP_SPI0_MISO
SEP_SPI0_MOSI
SEP_I2C_SCL
SEP_I2C_SDA
SEP_GPIO0
SEP_GPIO1
SPI2_SCLK
I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S2_MCK
I2S1_DOUT
SPI1_SSIN
SPI1_SCLK
SPI1_MOSI
SPI1_MISO
SPI0_SSIN
SPI0_SCLK
SPI0_MOSI
SPI0_MISO
I2S4_LRCK
I2S4_DOUT
I2S4_DIN
I2S4_BCLK
I2S3_DIN
I2S3_DOUT
I2S3_MCK
I2S2_BCLK
I2S2_DIN
I2S3_BCLK
I2S1_LRCK
I2S1_DIN
I2S0_DOUT
I2S1_BCLK
I2S1_MCK
I2C0_SCL
I2C1_SCL
I2C2_SCL
I2C0_SDA
SPI2_SSIN
SPI2_MOSI
SPI2_MISO
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
I2C1_SDA
I2S0_DIN
I2S2_DOUT
I2C2_SDA
I2S4_MCK
I2S3_LRCK
I2S2_LRCK
SYM 5 OF 14
GPIO_13
GPIO_22
TMR32_PWM0
GPIO_1
GPIO_26
UART0_RXD
UART4_RTS*
UART4_CTS*
UART3_RTS*
UART3_CTS*
UART2_RTS*
UART2_CTS*
UART1_RTS*
UART1_CTS*
UART6_TXD
UART6_RXD
TMR32_PWM2
TMR32_PWM1
UART3_TXD
UART4_RXD
UART4_TXD
UART5_RTXD
UART3_RXD
UART7_RXD
UART7_TXD
GPIO_9
GPIO_8
GPIO_7
GPIO_11
GPIO_10
GPIO_12
GPIO_14
GPIO_18
GPIO_19
GPIO_17
GPIO_16
GPIO_15
GPIO_20
GPIO_21
GPIO_23
GPIO_24
GPIO_25
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
UART2_RXD
UART2_TXD
UART1_TXD
UART1_RXD
UART0_TXD
GPIO_6
GPIO_5
GPIO_4
GPIO_3
GPIO_2
GPIO_0
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
OUT
OUT
NC
NC
OUT
OUT
IN
NC
OUT
OUT
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
IN
IN
OUT
IN
BI
BI
OUT
NC
NC
NC
SDASCL
VC
C
VS
S
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
OUT
OUT
IN
IN
OUT
IN
OUT
OUT
IN
OUT
OUT
OUT
NC
OUT
IN
OUT
IN
OUT
IN
OUT
OUT
IN
IN
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
BI
OUT
BI
OUT
BI
OUT
BI
NC
NC
NC
w 
w 
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c o
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SOC - OWL
OWL SYSTEM SHUTDOWN OPTION
POWER STATE CONTROL PROBE POINTS
9 OF 60
10 OF 49
4.0.0
051-00648
OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_ACTIVE_READY
45_DWI_PMGR_TO_PMU_SCLK
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
PMU_TO_OWL_CLK32K
SWD_AP_PERIPHERAL_SWCLK
SWD_AP_BI_BB_SWDIO
BUTTON_HOLD_KEY_BUFF_L
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
ACCEL_TO_OWL_INT1_R
SPI_OWL_TO_IMU_SCLK
OWL_TO_WLAN_CONTEXT_A
OWL_TO_WLAN_CONTEXT_B
SPI_OWL_TO_ACCEL_GYRO_CS_L
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
UART_BB_TO_OWL_RXD
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_CODEC_TO_AP_OWL_XSP_DIN
PP1V8
SWI_AP_BI_TIGRIS
OWL_TO_PMU_SHDN
PMU_TO_OWL_SLEEP1_READY
OWL_TO_PMU_ACTIVE_REQUEST
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
SPI_OWL_TO_COMPASS_CS_L
PMU_TO_OWL_SLEEP1_READY
COMPASS_TO_OWL_INT
OWL_TO_PMU_SLEEP1_REQUEST
UART_OWL_TO_BB_TXD
OWL_TO_PMU_SLEEP1_REQUEST
PMU_TO_OWL_ACTIVE_READY
45_DWI_PMGR_TO_BACKLIGHT_SCLK
BUTTON_MENU_KEY_BUFF_L
PMU_TO_SYSTEM_COLD_RESET_L
SWD_AP_BI_NAND_SWDIO
ACCEL_TO_OWL_INT2_R
ACCEL_GYRO_TO_OWL_INT1
ACCEL_GYRO_TO_OWL_INT2
LCM_TO_AP_HIFA_BSYNC
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
SPI_OWL_TO_IMU_MOSI
SPI_IMU_TO_OWL_MISO
SPI_OWL_TO_IMU_MOSI
SPI_IMU_TO_OWL_MISO
SPI_OWL_TO_IMU_SCLK
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
SPI_OWL_TO_COMPASS_CS_L
SPI_OWL_TO_ACCEL_GYRO_CS_L
DWI_PMU_TO_PMGR_MISO
SOC:OWL
SYNC_MASTER=N/A SYNC_DATE=N/A
16 9 
ROOM=SOC
FCMSP
MAUI-2GB-25NM-DDR-H
SC58980X0B-A040
CRITICAL
OMIT_TABLE
U0600
AA33
AD32
W33
U3
V4
AD30
AB33
AF35
AH32
AG32
AG31
AG30
AF33
AE34
AF34
AF31
AF32
AH31
AH33
AD34
AA34
AE31
AE32
AK31
AK32
AL33
AE33
AD35
AC33
AJ32
AK33
AH30
AJ31
AJ34
AJ33
AL2
AL1
AK4
AL3
AD31
W4
U31
T31
16 9 
NOSTUFF
01005
ROOM=SOC
1/32W
5%MF
10
R1021
1 2
5%
1/32W
01005MF
10
NOSTUFF
ROOM=SOC
R1020
1 2 17 8 
16 
30 26 16 9 5 
16 5 3 
33 29 28 8 
19 
19 9 
19 
33 
19 
16 
26 
26 16 
16 
33 
19 9 
19 9 
19 9 
24 8 
24 8 
24 8 
33 
19 9 
16 8 
33 
16 8 
13 
P2MM-NSM
SMPP1010 1
P2MM-NSM
SMPP1009 1
P2MM-NSM
SMPP1008 1
P2MM-NSM
SMPP1007 1
P2MM-NSM
SMPP1006 1
33 13 
P2MM-NSM
SMPP1005 1
P2MM-NSM
SM PP10041
SM
P2MM-NSM
PP10031
33 
19 
19 
19 9 
16 
P2MM-NSM
SM PP10021
ROOM=SOC
MF
5%
1/32W
01005
1.00K
R10021
2
ROOM=SOC
SM
P3MM-NSM
PP10201
P3MM-NSM
ROOM=SOC
SM PP10221
ROOM=SOC
SM
P3MM-NSM
PP10231
P3MM-NSM
SM
ROOM=SOC
PP10211
16 11 9 
29 28 21 20 14 13 12 8 7 6 5 3 
16 11 9 
16 9 
9 
16 9 
30 26 16 9 5 
9 
19 9 
19 9 
19 9 
19 9 
19 9 
19 9 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
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PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
OUT
SYM 7 OF 14
OWL_DDR_REQ
OWL_I2CM_SCL
OWL_FUNC_1
OWL_FUNC_3
OWL_UART2_TXD
OWL_UART2_RXD
OWL_UART1_TXD
OWL_UART1_RXD
OWL_UART0_TXD
OWL_UART0_RXD
OWL_SWD_TMS1
OWL_SWD_TMS0
OWL_SPI_SCLK
OWL_SPI_MOSI
OWL_SPI_MISO
OWL_I2S_MCK
OWL_I2S_LRCK
OWL_I2S_DIN
OWL_I2S_BCLK
OWL_I2CM_SDA
OWL_FUNC_9
OWL_FUNC_8
OWL_FUNC_2
OWL_FUNC_0
CFSB_AOP
AWAKE_RESET*
PMGR_SCLK0
PMGR_SSCLK1
RT_CLK32768
HOLD_KEY*
MENU_KEY*
SKEY*
AWAKE_REQ
PMGR_MISO
PMGR_MOSI
OWL_FUNC_4
OWL_FUNC_5
OWL_FUNC_6
OWL_FUNC_7
OWL_SWD_TCK_OUT
SWD_TMS3
SWD_TMS2
OWL_DDR_RESET*
OUT
NC
BI
OUT
IN
NC
NC
ININ
IN
OUT
IN
OUT
IN
IN
OUT
OUT
OUT
IN
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
IN
OUT
IN
BI
PP
PP
PP
PP
PP
OUT
PP
PP
PP
BI
IN
IN
OUT
NC
NC
INNC
NC
PP
PP
PP
PP
PP
IN
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
SOC - CPU, GPU & SOC RAILS
0.8V @10.5A MAX
1.0V @12.5A MAX
0.625V @TBDA MAX
0.825V @4.7A MAX
0.725V @TBDA MAX
0.9V @10.5A MAX
10 OF 60
11 OF 49
4.0.0
051-00648
45_BUCK1_PP_GPU_FB
PP_CPU
45_BUCK0_PP_CPU_FB
PP_CPU
45_BUCK2_PP_SOC_FB
PP_GPU
AP_SOC_SENSE_N
AP_SOC_SENSE_P
AP_GPU_SENSE_N
AP_GPU_SENSE_P
AP_CPU_SENSE_N
AP_CPU_SENSE_P
PP_SOC
PP_GPU
SOC:POWER (1/3)
SYNC_MASTER=N/A SYNC_DATE=N/A
0402
ROOM=SOC
1UF
20%
CERM
4V
C1156
1
2
3
4
P2MM-NSM
SM
ROOM=SOC
PP11051
P2MM-NSM
SM
ROOM=SOC
PP11041
P2MM-NSM
SM
ROOM=SOC
PP1103 1
SM
ROOM=SOCP2MM-NSM
PP1102 1
P2MM-NSM
SM
ROOM=SOC
PP1101 1
P2MM-NSM
SM
ROOM=SOC
PP1100 1
0.50MM
SM
TP1100
1
SM
0.50MM
TP1120
1
SHORT-10L-0.1MM-SM
ROOM=SOC
XW1120
1 2 14 
14 
ROOM=SOC
SHORT-10L-0.1MM-SM
XW1100
12
16 14 
ROOM=SOC
SHORT-10L-0.1MM-SM
XW1110
1 2 CRITICAL
ROOM=SOC
FCMSP
SC58980X0B-A040
MAUI-2GB-25NM-DDR-H
OMIT_TABLE
U0600AA17AA19
AA23
AB14
AB16
AB20
AB22
AB24
AB26
AC17
AC19
AC23
AD16
AD20
AD22
AD24
AD26
AE5
AE15
AE17
AE19
AE23
AF14
AF16
AF20
AF22
AF24
AF26
AG17
AG19
AG23
AH16
AH20
AH22
AH24
AH26
AJ15
AJ17
AJ19
AJ23
AK14
J29
G23
AK22
F6
F14
AL15
AM5
G25
G27
H24
H26
H28
J27
K24
K26
K28
L27
L23
M26
M28
AL19
N7
N27
P24
P26
P28
R17
R27
R29
T22
T26
T7
T28
U17
V8
V20
V22
V24
V26
W7
W11
Y28
W23
Y14
Y16
Y20
Y22
Y24
Y26
G29
AA27
F17
F20
L29
N29
V28
AJ20
L22
L24
L26
L28
M1
M5
M7
M9
M11
M13
M17
M21
M23
M25
M27
M29
M35
N6
N10
N12
N14
N16
N18
G19
N22
N24
N26
N28
N30
N33
P9
P11
P13
P15
P17
P19
P21
P23
P25
P27
P29
P35
R4
R6
R8
R10
R12
R14
M19
R18
R20
R22
R24
R26
R28
R30
T1
T2
R33
T9
T11
T13
T15
T17
P7
T23
T25
T27
T30
T35
U6
U10
U12
AK21
SC58980X0B-A040
FCMSP
MAUI-2GB-25NM-DDR-H
ROOM=SOC
CRITICAL
OMIT_TABLE
U0600
AA7
AA9
AA11
AB6
AB10
AB12
AC13
AD6
AD8
AD10
AD12
AE7
AE9
AE11
AE13
AF8
AF10
AF12
AH6
AH8
AH10
AH12
AJ5
AJ7
AJ9
AJ11
AJ13
AK6
AK10
AL7
AL9
AL11
AM6
AM8
AM10
AN7
AN11
AL13
Y8
Y10
Y12
AM12
Y6
G15
W13
T12
M6
U9
V12
W9
M12
M18
N15
N21
N9
F10
H14
H16
H20
H22
H6
H8
J11
J13
J17
J19
J23
J7
K10
K14
K16
K20
K22
K6
K8
L11
L13
L15
L17
L19
L21
M24
L7
L9
F8
M8
N11
N13
N17
N19
P10
G11
P12
P14
P16
P20
R15
R19
G13
R9
T10
T14
T16
U11
V14
V16
G7
R23
G9
H10
T24
P22
W17
N23
G17
G21
T18
T20
G20
Y7 H19
20%
ROOM=SOC
0201
2.2UF
6.3V
X5R-CERM
C11221
2 6.3V
2.2UF
20%
ROOM=SOC
X5R-CERM
0201
C11231
2
6.3V
ROOM=SOC
X5R-CERM
0201
20%
2.2UF
C11031
2
X5R-CERM
ROOM=SOC
0201
6.3V
2.2UF
20%
C11251
2
2.2UF
ROOM=SOC
X5R-CERM
0201
6.3V
20%
C11051
2X5R-CERM
6.3V
20%
ROOM=SOC
0201
2.2UF
C11041
2
6.3V
20%
0.47UF
0402
CERM
ROOM=SOC
C1157
1
2
3
4
ROOM=SOC
1UF
20%
4V
0402
CERM
C1154
1
2
3
4
4V
0402
ROOM=SOC
1UF
20%
CERM
C1155
1
2
3
4
ROOM=SOC
0402
4V
CERM
4.3UF
20%
C1153
1
2
3
4
6.3V
ROOM=SOC
CERM-X5R
20%
10UF
0402-9
C11501
2 CERM-X5R
20%
0402-9
6.3V
10UF
ROOM=SOC
C11511
2
0402
CERM
ROOM=SOC
4V
1UF
20%
C1134
1
2
3
4
ROOM=SOC
4V
CERM
1UF
0402
20%
C1135
1
2
3
4
0402
ROOM=SOC
CERM
1UF
20%
4V
C1136
1
2
3
4
0402
4V
CERM
1UF
20%
ROOM=SOC
C1137
1
2
3
4
ROOM=SOC
4V
CERM
0402
20%
4.3UF
C1130
1
2
3
4
4V
0402
CERM
4.3UF
ROOM=SOC
20%
C1131
1
2
3
4
0402
4V
CERM
4.3UF
ROOM=SOC
20%
C1110
1
2
3
4
4V
0402
4.3UF
CERM
ROOM=SOC
20%
C1111
1
2
3
4
0.47UF
6.3V
ROOM=SOC
CERM
20%
0402
C1117
1
2
3
4
CERM
0.47UF
6.3V
20%
0402
ROOM=SOC
C1116
1
2
3
4
20%
ROOM=SOC
1UF
CERM
4V
0402
C1113
1
2
3
4
CERM
1UF
4V
0402
ROOM=SOC
20%
C1112
1
2
3
4
ROOM=SOC
1UF
4V
20%
CERM
0402
C1114
1
2
3
4
20%
ROOM=SOC
CERM
4V
0402
4.3UF
C1106
1
2
3
4
0402-9
ROOM=SOC
6.3V
CERM-X5R
20%
10UF
C11001
2
0402
CERM
4V
20%
1UF
ROOM=SOC
C1115
1
2
3
4
4V
0402
CERM
ROOM=SOC
4.3UF
20%
C1107
1
2
3
4
0402
CERM
4V
ROOM=SOC
4.3UF
20%
C1108
1
2
3
4
4V
4.3UF
0402
CERM
20%
ROOM=SOC
C1109
1
2
3
4
10UF
20%
6.3V
ROOM=SOC
CERM-X5R
0402-9
C11011
2
10UF
CERM-X5R
0402-9
6.3V
ROOM=SOC
20%
C11201
2
0402-9
ROOM=SOC
10UF
6.3V
20%
CERM-X5R
C11211
2
4.3UF
4V
0402
CERM
ROOM=SOC
20%
C1126
1
2
3
4
ROOM=SOC
4V
0402
20%
4.3UF
CERM
C1127
1
2
3
4
ROOM=SOC
4.3UF
4V
0402
CERM
20%
C1128
1
2
3
4
4V
0402
ROOM=SOC
CERM
4.3UF
20%
C1129
1
2
3
4
0.47UF
CERM
0402
ROOM=SOC
6.3V
20%
C1138
1
2
3
4
CERM
0.47UF
0402
ROOM=SOC
6.3V
20%
C1139
1
2
3
4
0.47UF
0402
CERM
ROOM=SOC
6.3V
20%
C1140
1
2
3
4
0402
CERM
ROOM=SOC
6.3V
20%
0.47UF
C1141
1
2
3
4
4V
CERM
4.3UF
ROOM=SOC
20%
0402
C1132
1
2
3
4
ROOM=SOC
0402
4V
CERM
4.3UF
20%
C1133
1
2
3
4
14 10 
14 10 
14 10 
14 
14 10 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
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PAGE TITLE
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
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D
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
PP
PP
PP
PP
PP
PP
OUT
OUT
OUT
SYM 9 OF 14
VSS
VDD_SOC
VDD_SOC_SENSE
VSS_SOC_SENSE
VDD_SOC
SYM 8 OF 14
VSS_CPU_SENSE
VDD_CPU_SENSE
VDD_GPU
VDD_GPU_SENSE
VSS_GPU_SENSE
VDD_CPU
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
SOC - POWER SUPPLIES
1.0V @1.0A MAX
0.8V @TBDA MAX
0.756-TBDV @44mA MAX
1.06 - 1.17V
0.8V @0.5A MAX
DDR IMPEDANCE CONTROL
INTERNALLY SUPPLIES VDDQ
0.802-TBDV @1.1A MAX
1.1V @7mA MAX
1.06 - 1.17V @635mA MAX
0.9V @TBDA MAX
11 OF 60
12 OF 49
4.0.0
051-00648
45_PP1V1_DDR_PLL
PP_GPU_SRAM
PP_FIXED
PMU_TO_OWL_SLEEP1_READY
PP_CPU_SRAM
PP1V1
PP1V1_SDRAM
SYSTEM_ALIVE
PP1V1
PP1V1
PP0V8_OWL
45_DDR0_ZQ
45_DDR3_RREF
45_DDR2_RREF
45_DDR0_RREF
45_DDR3_ZQ
45_DDR1_RREF
SOC:POWER (2/3)
SYNC_MASTER=N/A SYNC_DATE=N/A
6.3V
20%
X5R
ROOM=SOC
0201-1
1.0UF
C12491
2
ROOM=SOC
0201-1
X5R
6.3V
20%
1.0UF
C12471
2
4.3UF
CERM
4V
0402
20%
ROOM=SOC
C1228
1
2
3
4
ROOM=SOC
X5R-CERM
0201
6.3V
2.2UF
20%
C12441
2
ROOM=SOC
6.3V
X5R-CERM
0201
2.2UF
20%
C12481
2
100OHM-25%-0.12A
01005
ROOM=SOC
FL1280
1 2
17 16 13 
20%
X5R
01005-1
0.22UF
ROOM=SOC
6.3V
C12801
2
CRITICAL
FCMSP
SC58980X0B-A040
MAUI-2GB-25NM-DDR-H
OMIT_TABLE
ROOM=SOC
U0600
C18
C21
C19
B21
AP15
AP17
AP16
Y31
V31
W32
U4
P5
T3
P2
A20
A22
B11
B15
B23
B25
D16
D20
D22
E15
E17
E19
E21
AN19
AR18
AR21
AR8
AT13
AT16
AM14
AM16
AM18
AM20
AR15
AN13
AN15
AB29
V29
Y29
Y35
AB35
AG34
M34
R35
T29
T34
AA30
U30
AC30
AA1
AC2
V6
W2
H2
M2
U5
P6
T6
U1
N5
R5
W5
F19
AK18
W26
P8
D19
AN17
W31
T4
CRITICAL
ROOM=SOC
FCMSP
SC58980X0B-A040
MAUI-2GB-25NM-DDR-H
OMIT_TABLE
U0600 AC11
AC7
AC9
AA13
AG11
AG7
AG9
AK12
AA15
AA21
AA25
AB18
AC15
AC21
AC25
AD14
AD18
AE21
AE25
AF18
AG15
AG21
AH25
AH14
AH18
AJ21
AK16
F12
G10
V18
AL17
J25
L25
N25
R25
R7
AN6
U25
W15
W21
W25
Y18
F21
F26
AB28
AC27
G18
AK20
F16
R16
T8
V7
U19
W27
U27
AF4
AF27
U21
H12
H18
R21
U15
J15
J21
J9
K12
K18
M10
M14
M16
M20
P18
R11
R13
U13
V10
M22
AH29
AD29
AF29
20%
2.2UF
X5R-CERM
6.3V
ROOM=SOC
0201
C12271
2
6.3V
0201
20%
2.2UF
X5R-CERM
ROOM=SOC
C12231
2
ROOM=SOC
6.3V
2.2UF
20%
X5R-CERM
0201
C12431
2
1.0UF
0201-1
6.3V
ROOM=SOC
X5R
20%
C12501
2
20%
0201
ROOM=SOC
6.3V
X5R-CERM
2.2UF
C12421
2
20%
2.2UF
0201
ROOM=SOC
6.3V
X5R-CERM
C12411
2
ROOM=SOC
1/32W
1%
01005
MF
240
R12041
2 ROOM=SOC
240
MF
01005
1/32W
1%
R12051
2
16 9 
6.3V
CERM
0402
ROOM=SOC
0.47UF
20%
C1220
1
2
3
4
1UF
CERM
0402
4V
20%
ROOM=SOC
C1221
1
2
3
4
4.3UF
20%
0402
ROOM=SOC
4V
CERM
C1222
1
2
3
4
4.3UF
ROOM=SOC
20%
0402
4V
CERM
C1226
1
2
3
4
0402
CERM
4V
1UF
ROOM=SOC
20%
C1225
1
2
34
0.47UF
6.3V
CERM
ROOM=SOC
0402
20%
C1224
1
2
3
4
0402
6.3V
ROOM=SOC
CERM
0.47UF
20%
C1203
1
2
3
4
4V
0402
CERM
ROOM=SOC
1UF
20%
C1202
1
2
3
4
ROOM=SOC
20%
CERM
0402
4V
4.3UF
C1245
1
2
3
4
6.3V
CERM-X5R
10UF
0402-9
20%
ROOM=SOC
C12401
2
ROOM=SOC
CERM
20%
4V
1UF
0402
C1246
1
2
3
4
ROOM=SOC
240
MF
01005
1/32W
1%
R12031
2
1/32W
1%
MF
240
01005
ROOM=SOC
R12021
2ROOM=SOC
01005
MF
1/32W
240
1%
R12011
2
1%
ROOM=SOC
1/32W
240
01005
MF
R12001
2
6.3V
0402-9
CERM-X5R
10UF
ROOM=SOC
20%
C12001
2
4.3UF
CERM
4V
ROOM=SOC
0402
20%
C1201
1
2
3
4
14 
14 7 6 14 
14 11 
15 14 12 
14 11 
14 11 
15 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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DRAWING NUMBER SIZE
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
SYM 11 OF 14
DDR0_RET*
DDR3_ZQ
DDR0_ZQ
DDR2_RET*
VDDIO11_DDR3
VDDIO11_DDR2
VDDIO11_DDR1
VDDIO11_DDR0
DDR1_SYS_ALIVE
DDR3_SYS_ALIVE
DDR2_SYS_ALIVE
DDR0_SYS_ALIVE
VDDIO11_RET_DDR
VDDIO11_PLL_DDR
DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF
DDR1_RET*
DDR3_RET*
SYM 10 OF 14
VDD_CPU_SRAM
VDD_GPU_SRAM
VDD_FIXED
VDD_LOW
IN
w 
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i x
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c o
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SOC - POWER SUPPLIES
VDD18_TSADC:1.645-1.89V @2mA MAX
VDD18_UVD :1.62-1.98V @5mA MAX
VDD18_FMON :1.62-1.98V @1mA MAX
(AON)
(OWL)
1.62-1.98V @1mA MAX
VDDIO18_GRP10:1.62-1.98V @8mA MAX
VDD18_AMUX :1.62-1.98V @1mA MAX
VDDIO18_LPOSC:1.62-1.98V @1mA MAX
1.62-1.98V @41mA MAX
1.06-1.17V @1.3A(TBD) MAX
1.70-1.95V @100mA(TBD) MAX
12 OF 60
13 OF 49
4.0.0
051-00648
PP1V8_SDRAM
PP1V8
PP1V8_IMU_OWL
PP1V8_ALWAYS
PP1V8
PP1V1_SDRAM
SYNC_DATE=N/ASYNC_MASTER=N/A
SOC:POWER (3/3)
FCMSP
SC58980X0B-A040
CRITICAL
ROOM=SOC
OMIT_TABLE
MAUI-2GB-25NM-DDR-H
U0600AN12AN14
AN18
AN29
AN33
AP2
AP13
AP14
AP20
AP25
AP26
AP27
AP30
AP31
AP32
AP33
AR1
AR5
AR9
AR14
AR16
AR25
AR34
AR35
AT1
AT2
AT6
AT8
AT9
AT14
AT17
AT18
AT21
AT25
AT34
AT35
B1
B2
B16
B20
B22
B24
B27
B34
B35
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C20
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
D3
D4
D5
D6
D11
D17
D21
D23
D26
D27
D28
D29
D30
E1
E3
E4
E5
D7
E9
E12
E16
E18
E20
E22
E24
E26
E29
E32
F4
F5
F7
F9
F11
F13
F15
F18
D18
F23
E30
F25
F27
F28
F29
G4
G5
G6
G8
G12
G14
G16
E6
G22
G24
G26
G28
G33
H1
H7
H9
H11
H13
H15
H17
E28
H21
H23
H25
H27
H29
J2
J5
J6
J30
J8
J10
J12
J14
J16
J18
J20
J22
J24
J26
J28
K7
K9
K11
K13
K15
K17
K19
K21
K23
K25
K27
K29
K34
K35
L1
L5
L6
K4
L8
L10
L12
L14
L16
L18
L20
FCMSP
SC58980X0B-A040
ROOM=SOC
CRITICAL
OMIT_TABLE
MAUI-2GB-25NM-DDR-H
U0600A1A2
A11
A16
A21
A24
A25
A27
A34
A35
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA24
AA26
N8
AA28
AA35
AB1
C17
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AB27
AB30
AC1
AC6
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC26
T5
AC28
AC34
AC35
AD5
AD7
AD9
AD11
AD15
AD17
AD19
AD21
AD23
AD25
AD27
AD33
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE22
AE24
AE26
AE29
AE30
AE35
AF5
AF7
AF9
AF11
AF15
AF17
AF19
AF21
AF23
AF25
AF30
AG1
AG2
AG3
AG6
AG8
AG10
AG14
AG16
AG18
AG20
AG22
AG24
U7
AG29
AG33
AG35
AH5
AH7
AH9
AH11
AH13
AH15
AH17
AH19
AH21
AH23
AH27
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
W8
AJ22
AG12
AK24
AJ28
AK2
AK3
AK5
AK7
AK9
AK11
AK13
AK15
B28
AK17
M15
AP28
AK26
AK30
AK34
AK29
AL6
AL8
AL10
AL12
AF28
AL14
AM29
AL16
AR27
AL18
Y30
AL20
AL25
AL28
AL30
AL31
AM7
AM9
AM11
AM13
AM15
AM17
AM19
AM21
AM33
AM34
AM35
AN3
AN5
AN16
AN8
AN10
FCMSP
ROOM=SOC
SC58980X0B-A040
MAUI-2GB-25NM-DDR-H
CRITICAL
OMIT_TABLE
U0600A10A26
AD1
AH35
AT22
AT7
G1
L35
A15
A23
AB34
AD2
AH34
AR13
AR17
AR22
AR7
AT15
B10
B26
G2
L34
N2
R1
U34
V2
W35
AN24
AM22
AG26
AG13
AK8
AB8
N20
U23
AK23
AD13
F30
H30
K30
M30
N31
P30
H5
K5
AN9
AA5
AC5
AG5
AL5
AM23
AE28
AG28
Y5
U14
U16
U18
U22
U24
U26
U28
U35
V1
V5
AA29
U29
V9
V11
V13
V15
V17
V19
V21
V23
V25
V27
W30
W1
W6
W10
W12
W14
W16
W18
W20
W22
W24
W28
W29
W34
Y1
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
Y27
Y34
AC29
AD28
AE27
AG27
AJ30
AJ35
AK19
AT27
D31
G30
L30
P4
U8
V30
A28
AL32
T21
20%
2.2UF
ROOM=SOC
X5R-CERM
0201
6.3V
C13141
2
ROOM=SOC
X5R-CERM
0201
6.3V
2.2UF
20%
C13001
2
ROOM=SOC
X5R-CERM
0201
6.3V
2.2UF
20%
C13301
2
2.2UF
ROOM=SOC
X5R-CERM
6.3V
0201
20%
C13131
2
2.2UF
ROOM=SOC
X5R-CERM
0201
6.3V
20%
C13121
2
ROOM=SOC
X5R-CERM
0201
6.3V
2.2UF
20%
C13231
2
ROOM=SOC
X5R-CERM
0201
6.3V
2.2UF
20%
C13221
2
ROOM=SOC
X5R-CERM
0201
6.3V
2.2UF
20%
C13211
2
0201
2.2UF
ROOM=SOC
X5R-CERM
6.3V
20%
C13021
2
ROOM=SOC
X5R-CERM
0201
6.3V
2.2UF
20%
C13011
2
ROOM=SOC
CERM
0402
1UF
4V
20%
C1316
1
2
3
4
ROOM=SOC
CERM
1UF
0402
4V
20%
C1317
1
2
3
4
10UF
ROOM=SOC
CERM-X5R
6.3V
20%
0402-9
C13101
2
CERM-X5R
10UF
ROOM=SOC
0402-9
6.3V
20%
C13201
2
33 30 26 24 17 16 15 14 8 
29
28 21 20 14 13 12 9 8 7 6 5 3 
19 14 
17 15 8 
29
28 21 20 14 13 12 9 8 7 6 5 3 
15 14 11 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 14 OF 14
VSS VSS
SYM 13 OF 14
VSSVSS
SYM 12 OF 14
VDDIO18_GRP4
VDD18_AMUX
VDD18_UVD
VDD18_FMON
VDD18_TSADC
VDD18_LPOSC
VDDIO18_GRP11
VDDIO18_GRP10
VDDIO18_GRP1
VDDIO18_GRP2
VDDIO18_GRP3
VDD2
VDD1
VSS
w 
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c o
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PCIE RECEIVE-SIDE PROBE POINTS
S3E NAND
13 OF 60
15 OF 49
4.0.0
051-00648
PP0V9_NAND
PP1V8_NAND_AVDD
90_PCIE_NAND_TO_AP_RXD1_N
AP_TO_NAND_RESET_L
45_NAND_ZQ
NAND_AGND
90_PCIE_NAND_TO_AP_RXD0_N
90_PCIE_NAND_TO_AP_RXD1_P
AP_TO_NAND_SYS_CLK
90_PCIE_AP_TO_NAND_TXD1_P
SWD_AP_PERIPHERAL_SWCLK
SWD_AP_BI_NAND_SWDIO
AP_TO_NAND_FW_STRAP
SYSTEM_ALIVE
PCIE_AP_TO_NAND_RESET_L
NAND_AGND
90_PCIE_AP_TO_NAND_TXD1_N
PCIE_NAND_TO_AP_CLKREQ_L
90_PCIE_NAND_TO_AP_RXD0_P
90_PCIE_AP_TO_NAND_TXD0_N
90_PCIE_AP_TO_NAND_TXD0_P
PP1V8
PMU_TO_NAND_LOW_BATT_BOOT_L
NAND_VREF
90_PCIE_AP_TO_NAND_TXD0_N
90_PCIE_AP_TO_NAND_TXD0_P
90_PCIE_AP_TO_NAND_TXD1_N
90_PCIE_AP_TO_NAND_TXD1_P
90_PCIE_AP_TO_NAND_REFCLK_N
90_PCIE_AP_TO_NAND_REFCLK_P
45_PCIE_NAND_RESREF
90_PCIE_AP_TO_NAND_REFCLK_N
90_PCIE_AP_TO_NAND_REFCLK_P
PP3V0_NAND
PP1V8
SWD_AP_BI_NAND_SWDIO_R
SWD_AP_NAND_SWCLK_R
SYNC_DATE=N/A
NAND
SYNC_MASTER=N/A
ROOM=NAND
P3MM-NSM
SM PP15201
ROOM=NAND
P3MM-NSM
SM
PP15211
SM
ROOM=NAND
P3MM-NSM
PP15041
SM
P3MM-NSM
ROOM=NAND
PP15051
SM
P3MM-NSM
ROOM=NAND
PP15021
SM
ROOM=NAND
P3MM-NSM
PP15031
ROOM=NAND
P3MM-NSM
SM PP15001
ROOM=NAND
P3MM-NSM
SM
PP15011
2.2UF
6.3V
X5R-CERM
0201
20%
ROOM=NAND
C15281
2
2.2UF
X5R-CERM
20%
6.3V
0201
ROOM=NAND
C15271
2
15UF
0402-1
6.3V
X5R
20%
ROOM=NAND
C15051
2
100PF
NP0-C0G
ROOM=NAND
5%
16V
01005
C15101
2
100PF
NP0-C0G
ROOM=NAND
5%
01005
16V
C15091
2
ROOM=NAND
NP0-C0G
01005
16V
5%
100PF
C15261
2 6.3V
15UF
20%
0402-1
ROOM=NAND
X5R
C15231
2
ROOM=NAND
15UF
20%
6.3V
0402-1
X5R
C15461
2
ROOM=NAND
0402-1
6.3V
20%
15UF
X5R
C15481
2
15UF
0402-1
6.3V
X5R
20%
ROOM=NAND
C15041
2
0402-1
6.3V
X5R
20%
15UF
ROOM=NAND
C15061
2
ROOM=NAND
THGBX5G7D2KLFXG
WLGA
BOMOPTION=OMIT_TABLE
CRITICAL
U1500
C3
D2
D4
H4
G3
J3
H2
E3
E7
F6
C7
B8
G1
F4
C5
G5
M
4
J5 J7
M6
K4 K6
G9
H6
H8
K8
M8
N3
N5
N7
P8
K2
M2
F8
D8
O
A0
O
A1
0
O
D0
O
D1
0
O
G
0
O
G
10
A3 A7 F2 J1 J9 R3 R7 A5 O
B0
O
B1
0
O
F0
O
F1
0
R5E5
B4 B6 G
7 L3 L5 L7
O
C0
O
C1
0
O
E0
O
E1
0 P2 P4 P6B2
D6
5%
16V
100PF
01005
NP0-C0G
ROOM=NAND
C152512
33 9 
0.00
01005
ROOM=NAND
1/32WMF0%
R1521
1 2
9 
1/32W0%
0.00
MF 01005
ROOM=NAND
R1520
1 2
ROOM=NAND
01005
10%
6.3V
X5R
0.01UF
C15611
2
01005
ROOM=NAND
0.01UF
10%
6.3V
X5R
C15601
2
01005
10K
MF
1%
ROOM=NAND
NOSTUFF
1/32W
R15611
2
ROOM=NAND
01005
MF
1/32W
1%
10K
NOSTUFF
R15601
2
2.2UF
20%
6.3V
0201
ROOM=NAND
X5R-CERM
C15301
2
1000PF
10%
6.3V
X5R-CERM
ROOM=NAND
01005
C15541
2
MF
1/32W
0.5%
ROOM=NAND
34.8
01005
R15001
2
X5R
ROOM=NAND
20%
6.3V
0402-1
15UF
C15031
26.3V
ROOM=NAND
0402-1
X5R
20%
15UF
C15021
2
20%
15UF
ROOM=NAND
6.3V
X5R
0402-1
C15011
2
15UF
0402-1
6.3V
X5R
20%
ROOM=NAND
C15001
2
20%
15UF
ROOM=NAND
6.3V
X5R
0402-1
C15411
2
ROOM=NAND
15UF
0402-1
6.3V
X5R
20%
C15401
2
ROOM=NAND
0402-1
X5R
15UF
6.3V
20%
C15211
2
0402-1
ROOM=NAND
6.3V
15UF
20%
X5R
C15201
2
0.1UF
01005
X5R-CERM
6.3V
20%
ROOM=NAND
C15311
2
MF
1%
24.9
01005
ROOM=NAND
1/32W
R1530
1 2
16V
NP0-C0G
01005
ROOM=NAND
100PF
5%
C15081
2
100PF
5%
16V
NP0-C0G
ROOM=NAND
01005
C15071
2
ROOM=NAND
X5R-CERM
20%
6.3V
0.1UF
01005
C15241
2
6.3V
20%
10UF
CERM-X5R
ROOM=NAND
0402-9
C15221
2
ROOM=NAND
0.1UF
01005
X5R-CERM
6.3V
20%
C15511
26.3VX5R-CERM
01005
20%
ROOM=NAND
0.1UF
C15501
2
CERM-X5R
0402-9
ROOM=NAND
20%
10UF
6.3V
C15421
2
10UF
6.3V
20%
ROOM=NAND
CERM-X5R
0402-9
C15431
2
17 16 11 
16 
8 
8 
6 
5 
6 
6 
6 
6 
6 
13 6 
13 6 
13 6 
13 6 
13 6 
13 6 
201
MF
3.01K
1%
1/20W
ROOM=NAND
R15011
2
15 
13 
13 
29
28 21 20 14 13 12 9 8 7 6 5 3 
13 6 
13 6 
13 6 
13 6 
13 6 
13 6 
15 
29
28 21 20 14 13 12 9 8 7 6 5 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PP
PP
PP
PP
PP
PP
PP
PP
VER-1
PC
I_
AV
DD
_C
LK
1
PC
I_
AV
DD
_C
LK
2
CLK_IN
PCIE_REFCLK_P
PCIE_REFCLK_M
PC
I_
VD
D1
PC
I_
VD
D2
VR
EF
VD
DI
O
VD
DI
O
VD
DI
O
VD
DI
O
VD
DI
O
VC
C
VD
DI
O
VC
C
VC
C
VC
C
VC
C
VC
C
AV
DD
1
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
VD
D
EXT_ALE
EXT_CLE
EXT_RNB
EXT_NWE
EXT_NRE
EXT_NCE
EXT_D7
EXT_D6
EXT_D5
EXT_D4
EXT_D3
EXT_D2
EXT_D1
EXT_D0
VS
SA
VS
S
VS
S
VS
S
VS
S
VS
S
VS
S
VS
S
VS
S
VS
S
VS
S
VS
S
ZQ
PCIE_RX1_P
PCI_RESREF
PCIE_RX0_M
PCIE_RX0_P
VS
S
VS
S
PCIE_TX0_M
PCIE_TX0_P
PCIE_RX1_M
RESET*
TRST*
PCIE_CLKREQ*
PCIE_TX1_P
PCIE_TX1_M
PC
I_
AV
DD
_H
IN
BI
NC
NC
NC
NC
NC
NC
NC
NC
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
w 
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c o
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ANTIGUA PMU - Buck Supplies
REMOVED FOR N69
0.70V/0.80V/0.9V
BUCK1
2X 15UF BULK CAPS
REMOVED FOR N69
10.5A MAX
0.625V/0.9V/1.03V
4.7A MAX
BUCK3
BU
CK
8
1.
1A
 M
AX
BU
CK
6
0.80V/0.90V/1.0V
1.5A MAX
BUCK2
1.
1A
 M
AX
BU
CK
5
40
0m
A 
MA
X
BU
CK
7
1.
1A
 M
AX 0.80V/0.90V/1.0V
BUCK4
4.7A MAX
0.725V/0.825V
12.5A MAX
BUCK0
4TH PHASE INDUCTOR
14 OF 60
VOLTAGE=1.1V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.1V
VOLTAGE=1.0V
VOLTAGE=1.0V
VOLTAGE=1.2V
VOLTAGE=0.825V
VOLTAGE=0.9V
VOLTAGE=1.03V
VOLTAGE=0.85V
20 OF 49
4.0.0
051-00648
PP1V1_SDRAM
PP1V8_SDRAM
PP1V8_IMU_OWL
PP1V8_TOUCH
PP1V8
PP1V1
PP_CPU_SRAM
PP_GPU_SRAM
PP_VCC_MAIN
BUCK1_LX2
BUCK0_LX2
BUCK1_LX1
45_BUCK1_PP_GPU_FB
BUCK2_LX0
BUCK1_LX0
45_BUCK2_PP_SOC_FB
45_BUCK8_FB
45_BUCK7_FB
BUCK8_LX0
45_BUCK6_FB
45_BUCK5_FB
45_BUCK4_FB
BUCK4_LX0
BUCK4_LX1
45_BUCK3_FB
BUCK2_LX1
VCC_MAIN_SNS
BUCK5_LX0
BUCK6_LX0
BUCK7_LX0
BUCK3_LX0
BUCK0_LX1
45_BUCK0_PP_CPU_FB
BUCK0_LX3
BUCK0_LX0
PP1V2_CAMERA
PP_SOC
PP_GPU
PP_CPU
PP_FIXED
SYNC_MASTER=N/A
SYSTEM POWER:PMU (1/3)
SYNC_DATE=N/A
0.47UH-20%-3.8A-0.048OHM
PIQA20121T-SM
CRITICAL
ROOM=PMU
L2003
12
10UF
20%
CERM-X5R
0402-9
ROOM=SOC
VOLTAGE=6.3V
C20951
2
CRITICAL
ROOM=PMU
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
L2012
12
1.0UH-20%-3.6A-0.060OHM
CRITICAL
ROOM=PMU
PIQA20161T-SM
L2002
12
NP0-C0G
01005
100PF
5%
ROOM=PMU
VOLTAGE=16V
C20621
2
15 
ROOM=PMU
CSP
CRITICAL
OMIT_TABLE
ANTIGUA-D2255A080
U2000
F8
A3
B3
C3
A5
B5
C5
A7
B7
C7
A9
B9
C9
F12
A17
B17
C17
A15
B15
C15
A13
B13
C13
A11
B11
C11
J14
H17
H18
H19
K17
K18
K19
V19
R18
R19
U18
V18
Y18
Z18
U16
U15
T9
V11
Y11
Z11
V13
Y13
Z13
V16
Y16
Z16
M13
M17
M18
M19
J5
H1
H2
C1
F1
F2
C19
F17
F18
F19
U17
V17
Y17
Z17
V15
Y15
Z15
A4
B4
C4
A8
B8
C8
A16
B16
C16
A12
B12
C12
J17
J18
J19
T18
T19
V12
Y12
Z12
N17
N18
N19
J1
J2
E1
E2
E17
E18
E19
F10
L5
L13
R6
R8
L4
V3
ROOM=PMU
NP0-C0G
100PF
01005
5%
VOLTAGE=16V
C20441
2
0.47UH-20%-3.8A-0.048OHM
PIQA20121T-SM
ROOM=PMUCRITICAL
L2041
1 2
PIQA20121T-SM
ROOM=PMU
CRITICAL
0.47UH-20%-3.8A-0.048OHM
L2021
1 2
ROOM=PMU
CRITICAL
0.47UH-20%-3.8A-0.048OHM
PIQA20121T-SM
L2011
1 2
CRITICAL
ROOM=PMU
PIQA20121T-SM
0.47UH-20%-3.8A-0.048OHM
L2001
1 2
ROOM=PMU
1.0UH-20%-2.25A-0.15OHM
CRITICAL
PIXB2016FE-SM
L2080
12
1.0UH-20%-2.25A-0.15OHM
CRITICAL
PIXB2016FE-SM
ROOM=PMU
L2070
12
ROOM=PMU
CRITICAL
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
L2050
12
PIQA20161T-SM
ROOM=PMU
CRITICAL
1.0UH-20%-3.6A-0.060OHM
L2040
1 2
CRITICAL
ROOM=PMU
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
L2030
1 2
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
ROOM=PMU
CRITICAL
L2020
1 2
1.0UH-20%-3.6A-0.060OHM
ROOM=PMU
PIQA20161T-SM
CRITICAL
L2010
1 2
CRITICAL
ROOM=PMU
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
L2000
1 2
21 
X5R-CERM
2.2UF
ROOM=PMU
0201
20%
VOLTAGE=6.3V
C20941
2X5R-CERM
0201
2.2UF
20%
ROOM=PMU
VOLTAGE=6.3V
C20931
2
X5R-CERM
2.2UF
20%
ROOM=PMU
0201
VOLTAGE=6.3V
C20921
2
ROOM=PMU
X5R-CERM
0201
2.2UF
20%
VOLTAGE=6.3V
C20911
2
0201
ROOM=PMU
X5R-CERM
20%
2.2UF
VOLTAGE=6.3V
C20901
2
2.2UF
0201
20%
X5R-CERM
ROOM=PMU
VOLTAGE=6.3V
C20891
2
5%
100PF
ROOM=PMU
NP0-C0G
01005
VOLTAGE=16V
C20321
2
0402-1
15UF
ROOM=PMU
X5R
20%
VOLTAGE=6.3V
C20811
2
ROOM=PMU
0402-1
X5R
20%
15UF
VOLTAGE=6.3V
C20711
2
20%
X5R
15UF
ROOM=PMU
0402-1
VOLTAGE=6.3V
C20611
2
15UF
0402-1
ROOM=PMU
X5R
20%
VOLTAGE=6.3V
C20511
2
0402-1
15UF
ROOM=PMU
X5R
20%
VOLTAGE=6.3V
C20801
2
0402-1
ROOM=PMU
15UF
X5R
20%
VOLTAGE=6.3V
C20701
2
20%
X5R
0402-1
ROOM=PMU
15UF
VOLTAGE=6.3V
C20601
2
ROOM=PMU
15UF
0402-1
X5R
20%
VOLTAGE=6.3V
C20501
2
0402-1
ROOM=PMU
15UF
X5R
20%
VOLTAGE=6.3V
C20431
2
15UF
ROOM=PMU
0402-1
X5R
20%
VOLTAGE=6.3V
C20421
2
0402-1
15UF
ROOM=PMU
X5R
20%
VOLTAGE=6.3V
C20411
2
20%
0402-1
ROOM=PMU
X5R
15UF
VOLTAGE=6.3V
C20401
2
ROOM=PMU
0402-1
15UF
X5R
20%
VOLTAGE=6.3V
C20311
2
0402-1
ROOM=PMU
15UF
X5R
20%
VOLTAGE=6.3V
C20301
2
15UF
ROOM=PMU
0402-1
X5R
20%
VOLTAGE=6.3V
C20261
2
0402-1
ROOM=PMU
15UF
X5R
20%
VOLTAGE=6.3V
C20251
2
0402-1
15UF
ROOM=PMU
X5R
20%
VOLTAGE=6.3V
C20241
2
0402-1
ROOM=PMU
15UF
X5R
20%
VOLTAGE=6.3V
C20231
2
0402-1
ROOM=PMU
X5R
20%
15UF
VOLTAGE=6.3V
C20221
2
15UF
0402-1
ROOM=PMU
X5R
20%
VOLTAGE=6.3V
C20191
2
ROOM=PMU
X5R
20%
15UF
0402-1
VOLTAGE=6.3V
C20181
2
0402-1
20%
ROOM=PMU
15UF
X5R
VOLTAGE=6.3V
C20171
2
ROOM=PMU
0402-1
X5R
20%
15UF
VOLTAGE=6.3V
C20161
2
20%
15UF
0402-1
ROOM=PMU
X5R
VOLTAGE=6.3V
C20151
2
0402-1
ROOM=PMU
15UF
X5R
20%
VOLTAGE=6.3V
C20141
2
0402-1
X5R
ROOM=PMU
20%
15UF
VOLTAGE=6.3V
C20131
2X5R
ROOM=PMU
0402-1
20%
15UF
VOLTAGE=6.3V
C20121
2
15UF
0402-1
ROOM=PMU
X5R
20%
VOLTAGE=6.3V
C20111
2
ROOM=PMU
15UF
0402-1
X5R
20%
VOLTAGE=6.3V
C20101
2X5R
ROOM=PMU
0402-1
15UF
20%
VOLTAGE=6.3V
C20091
2
15UF
ROOM=PMU
0402-1
X5R
20%
VOLTAGE=6.3V
C20081
2
15UF
20%
X5R
0402-1
ROOM=PMU
VOLTAGE=6.3V
C20071
2
0402-1
ROOM=PMU
20%
X5R
15UF
VOLTAGE=6.3V
C200612
X5R
ROOM=PMU
15UF
20%
VOLTAGE=6.3V
0402-1
C20051
2
0402-1
ROOM=PMU
15UF
X5R
20%
VOLTAGE=6.3V
C20041
2
ROOM=PMU
0402-1
15UF
X5R
20%
VOLTAGE=6.3V
C20031
2
15UF
ROOM=PMU
0402-1
X5R
20%
VOLTAGE=6.3V
C20021
2
15UF
ROOM=PMU
0402-1
X5R
20%
VOLTAGE=6.3V
C20011
2
01005
5%
NP0-C0G
100PF
ROOM=PMU
VOLTAGE=16V
C20991
2
10 
CERM-X5R
10UF
ROOM=PMU
0402-9
20%
VOLTAGE=6.3V
C20881
2
ROOM=PMU
SHORT-10L-0.1MM-SM
XW2080
12
SHORT-10L-0.1MM-SM
ROOM=PMU
XW2070
12
ROOM=PMU
SHORT-10L-0.1MM-SM
XW2050
12
16 10 
10 
0603
ROOM=PMU
CRITICAL
1UH-20%-1.2A-0.320OHM
L2060
12
SHORT-10L-0.1MM-SM
ROOM=PMU
XW2030
1 2
SHORT-10L-0.1MM-SM
ROOM=PMU
XW2040
1 2
CERM-X5R
0402-9
10UF
ROOM=PMU
20%
VOLTAGE=6.3V
C20871
2
ROOM=PMU
CERM-X5R
0402-9
10UF
20%
VOLTAGE=6.3V
C20861
2
10UF
20%
0402-9
CERM-X5R
ROOM=PMU
VOLTAGE=6.3V
C20851
2
15UF
0402-1
X5R
20%
ROOM=PMU
VOLTAGE=6.3V
C20001
2
15 12 11 
33 30 26 24 17 16 15 12 8 
19 12 
29 
29 28 21 20 13 12 9 8 7 6 5 3 
11 
11 
11 
33 26 25 24 22 21 17 15 
21 
10 
10 
10 
11 7 6 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
NC
IN
B
U
C
K
 IN
P
U
T
B
A
T
/U
S
B
SYM 2 OF 5
BUCK0_LX1
BUCK0_LX3
BUCK0_FB
BUCK1_LX0
VBUCK3_SW
BUCK2_FB
BUCK3_FB
BUCK3_LX0
VDD_BUCK0_01
VDD_BUCK0_23
VDD_BUCK1_01
VDD_BUCK3
BUCK8_FB
BUCK8_LX0
BUCK7_LX0
BUCK7_FB
BUCK6_LX0
BUCK6_FB
BUCK5_FB
BUCK3_SW3
BUCK4_SW1
BUCK5_LX0
VDD_BUCK8
BUCK3_SW1
BUCK3_SW2
VDD_BUCK6
VDD_BUCK5
VDD_BUCK7
VDD_BUCK4
VDD_BUCK2
VDD_BUCK1_23
VBUCK4_SW
BUCK4_FB
BUCK1_FB
BUCK2_LX0
BUCK2_LX1
BUCK4_LX0
BUCK4_LX1
BUCK1_LX1
BUCK1_LX2
BUCK1_LX3
VDD_MAIN_SNS
VDD_MAIN
BUCK0_LX0
BUCK0_LX2
IN
IN
IN
IN
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
LDO15 (B) 1.2-2.0V
1.2-1.9V
200MA
200MA
50MA
+/-2.5%
+/-25MV
+/-2.5%
+/-2.5%
LDO2 (B) +/-2.5%
LDO#
2.5-3.3V
50mA
LDO1
LDO2
ANTIGUA LDO SPECS
+/-2.5%
+/-2.5%
+/-2.5%
2.5-3.3V
2.5-3.3V
0.7-1.2V
2.5-3.3V
LDO13 (C)
LDO14 (H)
LDO8
LDO7
+/-2.5%
LDO12
150mA
LDO7 (C) 2.5-3.3V
LDO12 (E)
LDO11 (C)
LDO6 (C1)
LDO8 (C)
LDO9 (C)
0.8-1.5V
2.5-3.3V
1.2-3.6V
1.8V
LDO5 (F)
LDO4 (D)
LDO3 (A)
LDO1 (A)
ADJ.RANGE
2.5-3.3V
0.7-1.2V
2.5-3.3V
ACCURACY
+/-25mV
+/-25mV
+/-25mV
+/-2.5%
+/-5%
50mA
250mA
250mA
10mA
50mA
50mA
MAX.CURRENT
1000mA
250mA
LDO9
LDO6
LDO4
LDO10 (G) 1335mA
+/-25mV
250mA
LDO11
LDO10
LDO15
VPUMP:10nF min. @ 4.6V
NOTE: T3 IS XTAL REF GND
LDO5
LDO14
LDO13
LDO3
ANTIGUA PMU - LDOs
15 OF 60
VOLTAGE=3.1V
VOLTAGE=3.0V
VOLTAGE=3.3V
VOLTAGE=3.0V
VOLTAGE=3.0V
VOLTAGE=1.8V
VOLTAGE=3.3V
VOLTAGE=3.1V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=2.5V
VOLTAGE=0.9V
VOLTAGE=1.2V
VOLTAGE=1.9V
VOLTAGE=0.8V
21 OF 49
4.0.0
051-00648
PP3V1_VIBE
PP3V0_PROX_ALS
PP3V3_ACC
PP3V0_NAND
PP3V0_TRISTAR
PP1V8_VA
PP3V3_USB
PP3V1_MESA
PP1V8_ALWAYS
PP3V0_PROX_IRLED
45_PMU_VPUMP
PP_VCC_MAIN
PP1V8_SDRAM RCAM_AF_FB
PP1V1_SDRAM
VCC_MAIN_SNS
45_PMU_VSS_RTC
PP2V5_RCAM_AF
PP0V9_NAND
PP1V2
PP1V9_MESA
PP0V8_OWL
SYNC_DATE=N/ASYNC_MASTER=N/A
SYSTEM POWER:PMU (2/3)
ROOM=SOC
20%
01005
X5R-CERM
0.1UF
6.3V
C21121
2
2.2UF
20%
0201
ROOM=PMU
6.3V
X5R-CERM
C21151
2
20%
0201
ROOM=PMU
6.3V
X5R-CERM
2.2UF
C21161
2
ROOM=PMU
X5R-CERM
0201
6.3V
2.2UF
20%
C21111
2
20%
2.2UF
6.3V
0201
X5R-CERM
ROOM=PMU
C21071
2
ROOM=PMU
01005
X5R-CERM
47NF
20%
6.3V
C21001
2
SHORT-10L-0.1MM-SMROOM=PMU
XW21001 2
ROOM=PMU
0402-9
CERM-X5R
10UF
6.3V
20%
C21201
2
14 
SHORT-10L-0.1MM-SM
ROOM=PMU
XW2105
12
ROOM=PMU
CRITICAL
CSP
ANTIGUA-D2255A080
OMIT_TABLE
U2000
D10
D11
D12
D13
D14
D15
D16
D17
D18
D2
D5
D6
D7
D8
D9
D3
E10
E11
E12
E13
D4
E15
E16
E3
E4
E5
E7
E8
E9
F14
F15
F16
F3
F4
G14
G15
G16
G3
G4
H15
H16
H3
H4
J15
J16
J3
J4
K15
K16
L15
L16
M14
M15
M16
N14
N15
N16
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T10
T11
T12
T13
T14
T15
T17
U10
U11
U12
U13
U14
U4
U5
U6
V4
V5
V6
ROOM=PMU
CSP
CRITICAL
ANTIGUA-D2255A080
OMIT_TABLE
U2000
A1
A10
A14
A18
A19
A2
A6
B1
B10
B14
B18
B19
B2
B6
C10
C14
C18
C2
C6
D1
D19
E14
G1
G17
G18
G19
G2
H7
J6
K12
K7
L17
L18
L19
L6
L7
L9
M8
M9
N10
N12
N13
N9
P10
P11
P18
P19
P5
R10
R11
R12
R9
T16
T3
T6
T8
U3
U9
V10
V14
V8
V9
Y1
Y10
Y14
Y19
Z1
Z10
Z14
Z19
Z2
CSP
ROOM=PMU
ANTIGUA-D2255A080
CRITICAL
OMIT_TABLE
U2000
K2
K3
M3
V2
M2
U1
U2
L2
Y6
Y4
Y3
Y9
Z9
R3
Y5
Y7
N2
M1
V1
L1
N1
T1
T2
K1
Z6
Z4
Z3
Y2
Y8
Z8
R2
K6
Z5
Z7
P2
P12
U19
0201
ROOM=PMU
2.2UF
6.3V
20%
X5R-CERM
C21091
2
X5R-CERM
0201
ROOM=PMU
6.3V
20%
2.2UF
C21081
2
ROOM=PMU
X5R-CERM
0201
6.3V
20%
2.2UF
C2131 1
2
2.2UF
ROOM=PMU
X5R-CERM
0201
6.3V
20%
C2132 1
2
ROOM=PMU
X5R-CERM
0201
6.3V
2.2UF
20%
C2130 1
2
2.2UF
20%
0201
6.3V
X5R-CERM
ROOM=PMU
C21131
2
ROOM=PMU
6.3V
X5R-CERM
20%
2.2UF
0201
C21141
2
2.2UF
X5R-CERM
ROOM=PMU
20%
6.3V
0201
C21061
2
ROOM=PMU
X5R-CERM
0201
6.3V
2.2UF
20%
C21101
2
20%
ROOM=PMU
X5R-CERM
0201
6.3V
2.2UF
C21041
2
ROOM=PMU
0201
X5R-CERM
20%
6.3V
2.2UF
C21031
2
ROOM=PMU
X5R-CERM
0201
6.3V
2.2UF
20%
C21021
2
20%
2.2UF
6.3V
0201
X5R-CERM
ROOM=PMU
C21011
2
ROOM=PMU
10UF
0402-9
CERM-X5R
6.3V
20%
C21271
2
0402-9
ROOM=PMU
CERM-X5R
10UF
6.3V
20%
C21261
2
0402-9
10UF
CERM-X5R
ROOM=PMU
6.3V
20%
C21231
2
ROOM=PMU
0402-9
CERM-X5R
10UF
6.3V
20%
C21241
2
ROOM=PMU
0402-9
CERM-X5R
10UF
6.3V
20%
C21211
2
10UF
20%
ROOM=PMU
0402-9
CERM-X5R
6.3V
C21251
2
ROOM=PMU
CERM-X5R
10UF
6.3V
20%
0402-9
C21221
2
32 
20 
30 
13 
33 31 30 26 
25 24 
5 
27 
17 12 8 
20 
33 26 25 24 22 21 17 14 
33 30 26 24 17 16 14 12 8 
14 12 11 
16 
21 
13 
7 6 5 
27 
11 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
SYM 5 OF 5
NC NC
SYM 4 OF 5
VSS
SYM 1 OF 5
LD
O
 IN
P
U
T
LD
O
VDD_LDO2
VDD_LDO4
VDD_LDO6
VDD_LDO7
VDD_LDO5
VPP_OTP
VDD_BYPASS
VDD_LDO15
VDD_LDO14
VDD_LDO13
VDD_LDO11
VDD_LDO10
VDD_LDO9
VDD_LDO8
VPUMP
VLDO9_FB
VLDO9
VLDO8
VLDO7
VLDO6
VLDO5
VLDO4
VLDO3
VLDO2
VLDO15
VLDO14
VLDO13
VLDO12
VLDO11
VLDO10
VLDO1
VBYPASS
VDD_LDO1_3
w 
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c o
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(2)
(3)
(4)
(1)
BUTTON1 + BUTTON2 ASSERTED FOR
>TBD SECONDS CAUSES TWO-FINGER RESET
REAR CAMERA NTC
(1)
ANTIGUA PMU - GPIOs, NTCs
(1)
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC
RADIO PA NTC
AP NTC
(1)
(1)
(3)
CONTROL PIN NOTES:
NOTE (2):INPUT PULL-DOWN 1M
NOTE (3):INPUT PULL-UP OR DOWN 100k-300k
NOTE (4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UP
NOTE (1):INPUT PULL-DOWN 100-300k
(4)
(3)
FOREHEAD NTC
NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHz(4)
16 OF 60
22 OF 49
4.0.0
051-00648
PMU_TO_BB_PMIC_RESET_R_L
TRISTAR_TO_AP_INT
STOCKHOLM_TO_PMU_HOST_WAKE
PMU_TO_NAND_LOW_BATT_BOOT_L
WLAN_TO_PMU_HOST_WAKE
CODEC_TO_PMU_MIKEY_INT_L
PMU_TO_BT_REG_ON
CHESTNUT_TO_PMU_ADCMUX
BUTTON_HOLD_KEY_BUFF_L
DWI_PMU_TO_PMGR_MISO
I2C0_AP_SCL
PMU_TO_AP_IRQ_L
I2C0_AP_SDA
PMU_TO_WLAN_REG_ON
PMU_TO_BB_USB_VBUS_DETECT
CODEC_TO_AP_PMU_INT_L
PMU_TO_CODEC_DIGLDO_PULLDN
WLAN_TO_PMU_PCIE_WAKE_L
PMU_TO_LCM_PANICB
I2C0_AP_SCL
PMU_TO_STOCKHOLM_EN
PMU_TO_BB_PMIC_RESET_L
AP_TO_PMU_AMUX_OUT
LCM_TO_CHESTNUT_PWR_EN
TRISTAR_TO_PMU_USB_BRICK_ID
CHESTNUT_TO_PMU_ADCMUX
PMU_VDROOP_DET_IN
BUTTON_MENU_KEY_BUFF_L
45_PMU_TO_WLAN_CLK32K
45_PMU_XTAL1
45_PMU_XTAL2PA_NTC_RETURN
FOREHEAD_NTC_RETURN
AP_NTC_RETURN
PP1V8_SDRAM
45_BUCK1_PP_GPU_FB
OWL_TO_PMU_SLEEP1_REQUEST
AP_TO_PMU_SOCHOT1_L
45_PMU_VSS_RTC
PMU_VDD_RTC
45_PMU_IREFAP_TO_PMU_WDOG_RESET
OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_ACTIVE_READY
PMU_VREF
BB_TO_PMU_HOST_WAKE_L
TRISTAR_TO_PMU_USB_BRICK_ID
PMU_TO_AP_SOCHOT0_L
PMU_TO_OWL_SLEEP1_READY
PMU_AMUX_BY
PMU_TO_SYSTEM_COLD_RESET_L
PMU_VDROOP_OUT
BUTTON_RINGER_A
TIGRIS_TO_PMU_INT_L
BB_TO_PMU_AMUX_SMPS4
TRISTAR_TO_PMU_HOST_RESET
OWL_TO_PMU_SHDN
PMU_TO_OWL_CLK32K
BUTTON_MENU_KEY_BUFF_L
FOREHEAD_NTC
AP_TO_PMU_TEST_CLKOUT
REAR_CAMERA_NTC
RADIO_PA_NTC
AP_NTC
BB_TO_PMU_AMUX_LDO11
45_PMU_TCAL
RCAM_NTC_RETURN
BT_TO_PMU_HOST_WAKE
BB_TO_PMU_AMUX_LDO5
BB_TO_PMU_AMUX_SMPS1
45_PMU_TO_WLAN_CLK32K
BUTTON_VOL_UP_L
BUTTON_VOL_DOWN_L
PMU_AMUX_AY
BUTTON_RINGER_A
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
45_DWI_PMGR_TO_PMU_SCLK
BUTTON_HOLD_KEY_BUFF_L
SYSTEM_ALIVE
SYNC_DATE=N/ASYNC_MASTER=N/A
SYSTEM POWER:PMU (3/3)
SHORT-10L-0.1MM-SM
ROOM=PMU XW22301 2
SHORT-10L-0.1MM-SM
ROOM=PMU XW22101 2
26 16 8 
16 9 8 
32 8 
16 9 8 
26 16 
30 16 
0.00
010050%MF
ROOM=PMU
1/32W
R2201
1 2
33 
33 
100K
1/32W
MF
01005
5%
ROOM=PMU
R22601
2
28 
33 
01005
ROOM=CHESTNUT
6.3V
10%
1000PF
X5R-CERM
C22031
2
24 
ROOM=PMU
CRITICAL
1.60X1.00-SM
32.768KHZ-20PPM-12.5PF
Y2200
1 2
ANTIGUA-D2255A080
ROOM=PMU
CSP
OMIT_TABLE
CRITICAL
U2000
P4
P3
R5
F13
G13
J12
H13
H14
K10
K11
K13
J13
N11
M12
L11
M10
L14
L12
M11
L10
K14
T5
G6
F6
E6
F5
F7
G7
J7
G8
H8
J8
K8
F9
G9
H9
J9
G10
H10
J10
F11
G11
H11
K9
J11
G12
H12
K5
L8
V7
U8
R4
M5
K4
P7
P8
P9
R7
U7
T7
N8
N7
N3
T4
H6
N6
M6
M7
N4
N5
L3
P6
G5
H5
M4
P1
R1
5 
24 8 
17 13 11 
9 5 3 
ROOM=PMU
6.3V
10%
1000PF
01005
X5R-CERM
C22601
2
8 
33 
3 
32 8 
33 
33 16 
33 
3 
8 
1/32W
MF
ROOM=PMU
01005
5%
100K
R22611
2
33 16 
9 
9 
30 26 9 5 
9 
11 9 
9 
8 
30 
5 
9 
26 9 
9 
26 8 
26 16 8 
28 26 
5 
32 16 8 
33 
33 
33 
33 
24 
33 
13 
33 
30 8 
33 
SHORT-10L-0.1MM-SM
ROOM=PMU XW22201 2
17 
ROOM=PMU
5%
01005
1/32W
MF
1.00K
R2200
1 2 33 
26 16 
30 16 
ROOM=PMU
10%
01005
1000PF
X5R
10V
C22051
2
NO_XNET_CONNECTION=1
01005
ROOM=PMU
150
1/32W
1%MF
R22051 2
ROOM=PMU
X5R
20%
0201
0.22UF
6.3V
C22701
2 1/20W
ROOM=PMU
200K
1%
MF
201
R22701
2
14 10 
ROOM=PMU
SHORT-10L-0.1MM-SM
XW2200
1 2
0.22UF
0201
ROOM=PMU
X5R
6.3V
20%
C22021
2
18PF
CERM
16V
ROOM=PMU
01005
5%
C22011
2
18PF
5%
01005
CERM
16V
ROOM=PMU
C2200 1
2
32 16 8 
16 9 8 
16 9 8 
5%
100PF
01005
NP0-C0G
16V
ROOM=PMU
C2240 1
2
5%
100PF
01005
NP0-C0G
16V
ROOM=PMU
C22501
2
3.92K
ROOM=PMU
MF
1/20W
0.1%
0201
R22501
2
01005
ROOM=PMU
10KOHM-1%
R2240
1
2
01005
10KOHM-1%
ROOM=PMU
R2230
1
2
01005
10KOHM-1%
ROOM=PMU
R2220
1
2
5%
100PF
01005
NP0-C0G
16V
ROOM=PMU
C2210 1
2
5%
100PF
01005
NP0-C0G
16V
ROOM=PMU
C2220 1
2
5%
100PF
01005
NP0-C0G
16V
ROOM=PMU
C2230 1
2
01005
10KOHM-1%
ROOM=PMU
R2210
1
2
SHORT-10L-0.1MM-SM
ROOM=PMU XW22401 2
33 30 26 24 17 15 14 12 8 
15 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
D
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SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
IN
NC
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
NC
NC
NC
R
E
S
E
T
S
R
E
F
S
P
M
G
R
A
D
C
B
U
T
T
O
N
S
A
M
U
X
N
T
C
X
T
A
L
SYM 3 OF 5
C
O
M
P
A
R
A
T
O
R
G
P
IO
VDD_RTC
XTAL2
XTAL1
TDEV4
TDEV3
TCAL
TDEV2
TDEV1
AMUX_BY
AMUX_B7
AMUX_B6
AMUX_B5
AMUX_B4
AMUX_B2
AMUX_B3
AMUX_B0
AMUX_B1
AMUX_A7
AMUX_A6
AMUX_AY
AMUX_A4
AMUX_A5
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_A0
GPIO21
GPIO20
GPIO19
GPIO17
GPIO18
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
BUTTON4
BUTTON3
BUTTON2
BUTTON1
BRICK_ID
ADC_IN
SCLK
MOSI
MISO
IRQ*
SCL
SDA
TMPR_DET
SYS_ALIVE
OUT_32K
SLEEP_32K
ACTIVE_RDY
ACTIVE_REQ
SLEEP1_RDY
SLEEP1_REQ
RESET*
SHDN
RESET_IN2
RESET_IN3
RESET_IN1
PRE_UVLO
VDROOP
VDROOP_DET
VREF
IREF
IN
IN
OUT
OUT
OUT
IN
OUT
IN
IN
IN
IN
OUT
OUT
OUT
OUT
IN
OUT
IN
OUT
IN
IN
IN
IN
OUT
IN
IN
BI
IN
IN
IN
IN
NC
OUT
OUT
IN
OUT
IN
IN
OUT
IN
IN
IN
IN
OUT
IN
IN
IN
IN
IN
IN
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APN:343S00033
TIGRIS CHARGER
17 OF 60
VOLTAGE=4.3V
23 OF 49
4.0.0
051-00648
VBATT_SENSE
TIGRIS_BUCK_LX
TIGRIS_LDO
PP_BATT_VCC
SWI_AP_BI_TIGRIS
TIGRIS_TO_BATTERY_SWI_1V8
TIGRIS_ACTIVE_DIODE
TIGRIS_TO_BATTERY_SWI_1V8TIGRIS_TO_BATTERY_SWI_1V8_RTIGRIS_TO_BATTERY_SWI
PP1V8_SDRAM
TIGRIS_PMID
SYSTEM_ALIVE
TRISTAR_TO_TIGRIS_VBUS_OFF
TIGRIS_TO_PMU_INT_R_L
TIGRIS_VBUS_DETECT
TIGRIS_TO_PMU_INT_L
USB_VBUS_DETECT
PP1V8_ALWAYS
I2C1_AP_SCL
I2C1_AP_SDA
PP5V0_USB TIGRIS_BOOT
PP_VCC_MAIN
SYSTEM POWER:CHARGER
SYNC_MASTER=N/A SYNC_DATE=N/A
16V
10%
0402-1
4.2UF
X5R-CERM
ROOM=CHARGER
C23201
2
ROOM=CHARGER
16V
5%
01005
100PF
NP0-C0G
C23061
2
16 
5 
30 
30 25 8 
30 25 8 
ROOM=CHARGER
NOSTUFF
MF
1/32W
5%
100K
01005
R2300 1
2
0402-9
CERM-X5R
10UF
20%
6.3V
ROOM=CHARGER
C23301
2
9 8 
18 
100PF
16V
5%
NP0-C0G
ROOM=CHARGER
01005
C2301 1
2
5%
100PF
NP0-C0G
ROOM=CHARGER
01005
16V
C2302 1
2
100K
01005
ROOM=CHARGER
1/32W
5%
MF
R23101
2
ROOM=CHARGER
4.2UF
0402-1
10%
16V
X5R-CERM
C23101
2
18 
ROOM=CHARGER
100
MF
01005
5%
1/32W
R2303
1 2
1/32W
MF 0%
NOSTUFF
01005
0.00
R2301
1 2
40.2K
1%
01005
1/32W
MF
R23021
2
DFN0806
DMN2990UFA
Q2301
3
2
1
SN2400AB0
ROOM=CHARGER
CRITICAL
WCSP
U2300
E2
A1
B1
D1
C1
E1
G5
A4
B4
D4
C4
F2
G1
G2
G4
A3 B3 D3 C3
F5
E4
G3
E3
F3
A5
B5
D5
C5
E5
F1
F4
A2 B2 D2 C2
100PF
35V
NP0-C0G
ROOM=CHARGER
5%
01005
C23221
2
100PF
NP0-C0G
5%
35V
ROOM=CHARGER
01005
C23111
2
CRITICAL
BGA
ROOM=CHARGER
CSD68827W
Q2300
C1 C2 C3
A1
A2 A3 B1 B2 B3
01005
MF
30.1K
1%
1/32W
ROOM=CHARGER
R2320
1 2
ROOM=CHARGER
1.0UH-20%-3.6A-0.060OHM
CRITICAL
PIQA20161T-SM
L2300
1 2
X5R
0201
ROOM=CHARGER
16V
10%
0.047UF
C2300
1 2
ROOM=CHARGER
01005
MF
100
1%
1/32W
R2311
1 2
ROOM=CHARGER
10UF
20%
6.3V
CERM-X5R
0402-9
C23311
2
ROOM=CHARGER
16V
NP0-C0G
100PF
01005
5%
C23071
2
20%
2.2UF
6.3V
0201
X5R-CERM
ROOM=CHARGER
C23041
2
20%
2.2UF
6.3V
0201
X5R-CERM
ROOM=CHARGER
C23031
2
6.3V
X5R-CERM
ROOM=CHARGER
20%
2.2UF
0201
C23051
2
4.2UF
0402-1
16V
10%
ROOM=CHARGER
X5R-CERM
C23211
2
33 18 3 
17 
17 
33 30 26 24 16 15 14 12 8 
16 13 11 
15 12 8 
31 30 3 
33 26 25 24 22 21 15 14 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
D
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SHEET
PAGE TITLE
C
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PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
OUT
IN
IN
BI
BI
IN
BI
D
S
G
PMID
VBUS
PG
ND
PG
ND
PG
ND
PG
ND
HDQ_HOST
HDQ_GAUGE
ACT_DIODE
BAT_SNS
BAT
BAT
BAT
BAT
BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW
BOOT
LDO
TEST
VBUS_DET
INT
VBUS_OVP_OFF
SCL
SDA
SYS_ALIVE
VBUS
VBUS
VBUS
VBUS
VD
D_
M
AI
N
VD
D_
M
AI
N
VD
D_
M
AI
N
VD
D_
M
AI
N
G
S
D
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516S00104 (RCPT)
516S00105 (PLUG)
THIS ONE ON MLB --->
BATTERY CONNECTOR
18 OF 60
VOLTAGE=4.3V
24 OF 49
4.0.0
051-00648
VBATT_SENSE
TIGRIS_TO_BATTERY_SWI TIGRIS_BATTERY_SWI_CONN
PP_BATT_VCC
SYNC_DATE=N/ASYNC_MASTER=N/A
SYSTEM POWER:BATTERY CONN
10V
10%
01005
X7R-CERM
220PF
ROOM=BATTERY_B2B
C24121
2
100PF
ROOM=BATTERY_B2B
NP0-C0G
010055%
16V
C24111
2NP0-C0G
56PF
5%
16V
ROOM=BATTERY_B2B
01005
C24101
2
01005
ROOM=BATTERY_B2B
120-OHM-210MA
FL2400
1 2
ROOM=BATTERY_B2B
NP0-C0G
01005
27PF
5%
16V
C24141
2
ROOM=BATTERY_B2B
NP0-C0G
56PF
16V
01005
5%
C24131
2
CRITICAL
ROOM=BATTERY_B2B
F-ST-SM
RCPT-BATT-2BLADES
J2400
1
23
4
5
6
7 8
9 10
11
12
01005
ROOM=BATTERY_B2B
NP0-C0G
16V
5%
56PF
C24001
2
17 
17 
ROOM=BATTERY_B2B
SHORT-10L-0.25MM-SM
XW2400
1 2
33 17 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
BI
OUT
w 
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c o
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MAGNESIUM - COMPASS
INVENSENSE (APN 338S00017): C3013=0.22UF
INVENSENSE 1.1 (APN 338S00087): C3013=0.22UF
CARBON - ACCEL & GYRO
ALPS (APN:338S00084)
114K INT PD
114K INT PU
1.09M INT PU
BOSCH (APN:338S1163)
DISCRETE ACCEL
19 OF 60
30 OF 49
4.0.0
051-00648
SPI_OWL_TO_IMU_MOSI
ACCEL_TO_OWL_INT2
ACCEL_TO_OWL_INT1
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
ACCEL_TO_OWL_INT2_R
ACCEL_TO_OWL_INT1_R
SPI_OWL_TO_IMU_SCLK
PP1V8_IMU_OWLSPI_OWL_TO_IMU_MOSISPI_IMU_TO_OWL_MISO
ACCEL_GYRO_TO_OWL_INT1
SPI_OWL_TO_IMU_SCLK
ACCEL_TO_OWL_SDO
PP1V8_IMU_OWL
SPI_IMU_TO_OWL_MISO
SPI_OWL_TO_IMU_MOSI
SPI_OWL_TO_IMU_SCLK
SPI_OWL_TO_COMPASS_CS_L
COMPASS_TO_OWL_INT
ACCEL_GYRO_TO_OWL_INT2
SPI_IMU_TO_OWL_MISO
PP1V8_IMU_OWL
GYRO_CHARGE_PUMP
SPI_OWL_TO_ACCEL_GYRO_CS_L
PP1V8_IMU_OWL
SYNC_MASTER=N/A SYNC_DATE=N/A
SENSORS:MOTION SENSORS
01005-1
6.3V
0.22UF
X5R
20%
ROOM=CARBON
C30131
2
9 
MPU-6700-12-COMBO
CRITICAL
OMIT_TABLE
ROOM=CARBON
LGA
U3010
5
6
8
9 10 11 12 13 15
7
14 4
2
3
16 1
CRITICAL
ROOM=MAGNESIUM
OMIT_TABLE
FLGA-POP
COMPASS-MODULE
U3000
A2
A1
D4
B1
B3
D1
D2
A3
A4
B4
C3
C4
C2
C1
9 
9 
9 
19 9 
19 9 
19 9 
20.0
OMIT_TABLE
5%
1/32W
MF
01005
R3022
1 2
1/32W
01005
MF
OMIT_TABLE
5%
20.0
R3020
1 2
20.0
OMIT_TABLE
01005
MF
1/32W
5%
R3021
1 2
1.0UF
20%
X5R
0201-1
OMIT_TABLE
6.3V
C30211
2
0.1UF
20%
6.3V
01005
OMIT_TABLE
X5R-CERM
C30201
2
0.1UF
OMIT_TABLE
X5R-CERM
6.3V
01005
20%
C30221
2
OMIT_TABLE
LGA
BMA282
U3020
4
9 11 12 14 10
6
5
13
1
3
2
8 7
9 
9 
19 9 
19 9 
19 9 
ROOM=MAGNESIUM
6.3V
0201
X5R-CERM
20%
2.2UF
C30001
2
2.2UF
20%
6.3V
ROOM=CARBON
0201
X5R-CERM
C30121
2
ROOM=MAGNESIUM
0.1UF
20%
6.3V
X5R-CERM
01005
C30011
2
5%
56PF
NOSTUFF
NP0-C0G
16V
01005
ROOM=MAGNESIUM
C30021
2
ROOM=CARBON
6.3V
X5R-CERM
0.1UF
20%
01005
C30101
2
19 9 
19 9 
9 
9 
19 9 
0.1UF
20%
6.3V
X5R-CERM
01005
ROOM=CARBON
C30111
2
19 14 12 
19 14 12 
19 14 12 
19 14 12 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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PAGE TITLE
C
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
CS
FSYNC/GND
REGOUT/GND_CAP
INT/INT2
G
ND
1
G
ND
2
G
ND
3
G
ND
4
G
ND
5
G
ND
6
SCL/SPC
DRDY/INT1
SDA/SDI
SA0/SDO
VDDIOVDD
NC
VPP
RSV
RSV
RSV
VDD
VSS
SDO
SCL/SCK
SDA/SDI
CSB
TRG/SE
DRDY
RSV
RST*
OUT
OUT
IN
IN
IN
OUT
CS*
PS
VDDIO
SCX
INT1
INT2
GNDIOGND
VDD
SDO
SDX
IN
OUT
OUT
IN
IN
NC
NC
NC
IN
IN
IN
OUT
OUT
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
PROX & ALS INTERFACE
MIC3/HAC/RCVR INTERFACE
PROX & ALS POWER
CAMERA POWER
FOREHEAD FLEX (FCAM)
CAMERA MIPI
CAMERA I/O
FOREHEAD CONNECTOR
516S0986 (RCPT)
516S0987 (PLUG)
THIS ONE ON MLB --->
20 OF 60
31 OF 49
4.0.0
051-00648
ALS_TO_AP_INT_L
I2C2_AP_BI_ALS_SDA_CONN
I2C2_AP_BI_ALS_SDA_CONN
I2C_ISP_TO_FCAM_SCL_CONN
AP_TO_FCAM_SHUTDOWN_CONN_L
PP3V0_PROX_CONN
FRONTMIC3_TO_CODEC_AIN4_CONN_N
I2C_ISP_BI_FCAM_SDA_CONN
I2C2_AP_TO_ALS_SCL_CONN
CODEC_TO_HAC_CONN_P
CODEC_TO_HAC_N
I2C_ISP_TO_FCAM_SCL_CONN
I2C_ISP_BI_FCAM_SDA_CONN
I2C_ISP_TO_FCAM_SCL
AP_TO_FCAM_SHUTDOWN_L
I2C_ISP_BI_FCAM_SDA
CODEC_TO_RCVR_CONN_P
PP3V0_ALS_CONN
PP3V0_PROX_CONN
CODEC_TO_RCVR_N
90_MIPI_FCAM_TO_AP_CLK_P 90_MIPI_FCAM_TO_AP_CLK_CONN_P
CODEC_TO_HAC_CONN_N
CODEC_TO_HAC_CONN_P
MAKE_BASE=TRUE
I2C2_AP_SCL
I2C2_AP_SDA
MAKE_BASE=TRUE
45_PROX_TO_CUMULUS_RX
CUMULUS_TO_PROX_TX_EN_BUFF
PGND_IRLED_D
ALS_TO_AP_INT_CONN_L
I2C2_AP_TO_ALS_SCL_CONN
PGND_IRLED_K
FRONTMIC3_TO_CODEC_AIN4_P
FRONTMIC3_TO_CODEC_AIN4_N
CODEC_TO_RCVR_P
CODEC_TO_HAC_P
PP_CODEC_TO_FRONTMIC3_BIAS
FRONTMIC3_TO_CODEC_AIN4_CONN_P
FRONTMIC3_TO_CODEC_AIN4_CONN_N
CODEC_TO_RCVR_CONN_N
PP_CODEC_TO_FRONTMIC3_BIAS_CONN
PP1V8
PP2V85_CAM_AVDD_LDO PP2V85_FCAM_AVDD_CONN
90_MIPI_FCAM_TO_AP_CLK_N 90_MIPI_FCAM_TO_AP_CLK_CONN_N
CODEC_TO_RCVR_CONN_N
90_MIPI_FCAM_TO_AP_DATA0_CONN_P
PP1V8_FCAM_CONN
CODEC_TO_HAC_CONN_N
AP_TO_FCAM_CLK_CONN
90_MIPI_FCAM_TO_AP_CLK_CONN_P
PP_CODEC_TO_FRONTMIC3_BIAS_CONN
FRONTMIC3_TO_CODEC_AIN4_CONN_P
PP3V0_PROX_IRLED
PGND_IRLED_K
PP2V85_FCAM_AVDD_CONN
90_MIPI_FCAM_TO_AP_DATA0_N 90_MIPI_FCAM_TO_AP_DATA0_CONN_N
90_MIPI_FCAM_TO_AP_DATA0_CONN_P
AP_TO_FCAM_CLK_CONN
ALS_TO_AP_INT_CONN_L
CODEC_TO_RCVR_CONN_P
90_MIPI_FCAM_TO_AP_CLK_CONN_N
AP_TO_FCAM_SHUTDOWN_CONN_L
CUMULUS_TO_PROX_RX_EN_1V8_CONN
PP3V0_ALS_CONN
PP3V0_PROX_ALSPP1V8_FCAM_CONN 90_MIPI_FCAM_TO_AP_DATA0_CONN_N
90_MIPI_FCAM_TO_AP_DATA0_P
45_PROX_TO_CUMULUS_RX_CONN
PP3V0_PROX_IRLED
45_PROX_TO_CUMULUS_RX_CONN
45_AP_TO_FCAM_CLK
SYNC_MASTER=N/A
CAMERA:FOREHEAD FLEX B2B
SYNC_DATE=N/A
5%
16V
56PF
NP0-C0G
01005
ROOM=CG_B2B
C31441
2
20 
20 
MF 0%
0.00
01005
ROOM=CG_B2B
1/32W
R3103
1 2
MF 0%
ROOM=CG_B2B
01005
1/32W0.00
R3102
1 2
01005
120-OHM-210MA
FL3102
1 2
01005
120-OHM-210MA
FL3101
1 2
11.5
201
MF
1%
1/20W
R31011
2
F-ST-SM
AA22L-S034VA1
J3100
35 36
37 38
39
40
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
NP0-C0G
16V
5%
100PF
ROOM=CG_B2B
01005
C31111
2
ROOM=CG_B2B
NP0-C0G
16V
5%
100PF
01005
C31101
2
01005
120-OHM-210MA
ROOM=CG_B2B
FL3126
1 2
01005
120-OHM-210MA
ROOM=CG_B2B
FL3125
12
ROOM=CG_B2B
01005
120-OHM-210MA
FL3111
1 2
ROOM=CG_B2B
01005
120-OHM-210MA
FL3110
1 2
CRITICAL
65-OHM-0.1A-0.7-2GHZ
ROOM=CG_B2B
TAM0605
L3102
1
23
4
TAM0605
ROOM=CG_B2B
65-OHM-0.1A-0.7-2GHZ
CRITICAL
L3100
1
23
4
29 
ROOM=CG_B2B
01005
MF
5%
1.00M
1/32W
R31401
2
CRITICAL
DMN3730UFB4
DFN1006H4-3
ROOM=CG_B2B
Q3140
3
1
2
ROOM=CG_B2B
0.00
01005
MF
0%
1/32W
R3143
1 2
2.2UF
20%
0201
X5R-CERM
ROOM=CG_B2B
6.3V
C31241
2
2.2UF
6.3V
0201
X5R-CERM
20%
ROOM=CG_B2B
C3130 1
2
0.1UF
20%
ROOM=CG_B2B
01005
X5R-CERM
6.3V
C31271
2
6.3V
X5R-CERM
ROOM=CG_B2B
01005
0.1UF
20%
C31211
2
X5R-CERM
2.2UF
6.3V
0201
20%
ROOM=CG_B2B
C3128 1
2
0201
ROOM=CG_B2B
20%
6.3V
2.2UF
X5R-CERM
C3129 1
2
2.2UF
6.3V
0201
X5R-CERM
20%
ROOM=CG_B2B
C31221
2
2.2UF
6.3V
ROOM=CG_B2B
20%
0201
X5R-CERM
C31231
2
2.2UF
0201
X5R-CERM
ROOM=CG_B2B
20%
6.3V
C3106 1
2
23 
23
23 
23 
23 
23 
8 
8 
29 
7 
7 
7 
7 
7 
7 
8 
7 
7 
ROOM=CG_B2B
NP0-C0G
01005
16V
5%
100PF
C31261
2
ROOM=CG_B2B
100PF
16V
5%
NP0-C0G
01005
C31251
2
ROOM=CG_B2B
NP0-C0G
16V
5%
100PF
01005
C31201
2
16V
ROOM=CG_B2B
NP0-C0G
100PF
5%
01005
C31041
2
ROOM=CG_B2B
100PF
5%
NP0-C0G
16V
01005
C31001
2
0201
ROOM=CG_B2B
FERR-22-OHM-1A-0.055OHM
FL3104
1 2
56PF
5%
16V
01005
ROOM=CG_B2B
NP0-C0G
C31131
2
56PF
NP0-C0G
16V
5%
01005
ROOM=CG_B2B
C31121
2
6.3V
X5R-CERM
01005
ROOM=CG_B2B
20%
0.1UF
C31051
2
6.3V
X5R-CERM
20%
ROOM=CG_B2B
01005
0.1UF
C31011
2
0201
FERR-22-OHM-1A-0.055OHM
ROOM=CG_B2B
FL31001 2
01005
100PF
16V
NP0-C0G
5%
ROOM=CG_B2B
C31461
2
01005
ROOM=CG_B2B
120-OHM-210MA
FL3146
12
01005
ROOM=CG_B2B
70-OHM-25%-0.28A
FL3151
12
01005
70-OHM-25%-0.28A
ROOM=CG_B2B
FL3152
12
ROOM=CG_B2B
70-OHM-25%-0.28A
01005
FL3154
1 2
01005
ROOM=CG_B2B
70-OHM-25%-0.28A
FL3153
1 2
NO_XNET_CONNECTION=1
01005-1
ROOM=CG_B2B
12V-33PF
DZ31511
2
NO_XNET_CONNECTION=1
ROOM=CG_B2B
12V-33PF
01005-1
DZ31521
2
NO_XNET_CONNECTION=1
01005
ROOM=CG_B2B
6.8V-100PF
DZ31551
2
NO_XNET_CONNECTION=1
01005
ROOM=CG_B2B
6.8V-100PF
DZ31561
2
01005
ROOM=CG_B2B
120-OHM-210MA
FL3156
12
01005
120-OHM-210MA
ROOM=CG_B2B
FL3155
1 2
01005
ROOM=CG_B2B
6.8V-100PF
DZ31501
2
120-OHM-210MA
01005
ROOM=CG_B2B
FL3150
1 2
NOSTUFF
56PF
NP0-C0G
16V
ROOM=CG_B2B
5%
01005
C31431
2
56PF
01005
NP0-C0G
16V
5%
ROOM=CG_B2B
C31451
2NO_XNET_CONNECTION=1
12V-33PF
ROOM=CG_B2B
01005-1
DZ31541
2
NO_XNET_CONNECTION=1
12V-33PF
01005-1
ROOM=CG_B2B
DZ31531
2
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
24 
20 
20 
20 
20 
29 28 21 14 13 12 9 8 7 6 5 3 
21 20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 15 
20 
20 
20 
20 
20 
20 
20 
20 
20 
28 
20 
15 20 20 
20 
20 15 
20 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
BI
SYM_VER-2
SYM_VER-2
IN
S
D
SYM_VER_1
G
IN
IN
IN
OUT
IN
OUT
IN
BI
OUT
OUT
OUT
OUT
OUT
IN
IN
OUT
BI
IN
w 
w 
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 a
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i x
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c o
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CAMERA POWER
MIPI COMMON-MODE CHOKES
516S00101 (PLUG)
516S00100 (RCPT)
RCAM CONNECTOR
THIS ONE ON MLB --->
DIGITAL I/O
REAR CAMERA FLEX
PLACEHOLDER FOOTPRINTS
21 OF 60
VOLTAGE=2.85V
32 OF 49
4.0.0
051-00648
PP2V5_RCAM_AF_CONN
90_MIPI_RCAM_TO_AP_DATA3_CONN_N
PP1V8_RCAM_CONN
PP2V5_RCAM_AF_CONN
PP2V85_RCAM_AVDD_CONN
PP1V2_RCAM_DIGITAL_CONN
RCAM_TO_LED_DRIVER_STROBE_EN_CONN
AP_TO_RCAM_SHUTDOWN_L
RCAM_TO_LED_DRIVER_STROBE_EN
AP_TO_RCAM_SHUTDOWN_CONN_L
90_MIPI_RCAM_TO_AP_DATA2_CONN_P
RCAM_TO_LED_DRIVER_STROBE_EN_CONN
PP2V5_RCAM_AF_COMP
45_BUCK6_FB
PP1V8
PP2V5_RCAM_AF
AP_TO_RCAM_CLK_CONN
PP_VCC_MAIN
45_AP_TO_RCAM_CLK
I2C_ISP_TO_RCAM_SCL I2C_ISP_TO_RCAM_SCL_CONN
I2C_ISP_BI_RCAM_SDA_CONNI2C_ISP_BI_RCAM_SDA
PP1V2_CAMERA
CAM_EXT_LDO_EN
PP2V5_RCAM_AF
PP2V85_RCAM_AVDD_CONN
90_MIPI_RCAM_TO_AP_CLK_CONN_N
90_MIPI_RCAM_TO_AP_CLK_CONN_PPP1V8_RCAM_CONN
I2C_ISP_TO_RCAM_SCL_CONN
I2C_ISP_BI_RCAM_SDA_CONN
90_MIPI_RCAM_TO_AP_DATA0_CONN_N
90_MIPI_RCAM_TO_AP_DATA0_CONN_P
90_MIPI_RCAM_TO_AP_DATA2_CONN_N
AP_TO_RCAM_CLK_CONN
AP_TO_RCAM_SHUTDOWN_CONN_L
90_MIPI_RCAM_TO_AP_DATA1_CONN_N
90_MIPI_RCAM_TO_AP_DATA1_CONN_P
90_MIPI_RCAM_TO_AP_DATA3_CONN_PPP1V2_RCAM_DIGITAL_CONN
PP2V85_CAM_AVDD_LDO
SYNC_DATE=N/A
CAMERA:REAR CAMERA B2B
SYNC_MASTER=N/A
21 
AA27D-S030VA1
ROOM=RCAM_B2B
F-ST-SM
CRITICAL
J3200
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
0201
ROOM=RCAM_B2B
2.2UF
X5R-CERM
20%
6.3V
C32001
2 6.3V
ROOM=RCAM_B2B
X5R-CERM
2.2UF
0201
20%
C32111
2
0.00
010050%MF
1/32W
ROOM=RCAM_B2B
R3203
1 2
01005
ROOM=RCAM_B2B
1/32W
MF 0%
0.00
R3204
1 2
21 
21 
21 
7 
7 
7 
7 
7 
7 
7 
7 
7 
7 
21 
21 
MF
1/32W1%
3.00
01005
R3202
1 2
ROOM=RCAM_B2B
SHORT-10L-0.1MM-SM
XW3202
1 2
SHORT-10L-0.1MM-SM
ROOM=RCAM_B2B
XW3203
1
2
6.3V
X5R-CERM
0201
20%
2.2UF
C32101
2
0201-1
20%
X5R
6.3V
ROOM=RCAM_B2B
1.0UF
C32081
2
ROOM=RCAM_B2B
0201-1
X5R
20%
6.3V
1.0UF
C32071
2
FERR-22-OHM-1A-0.055OHM
ROOM=RCAM_B2B
0201
L3205
1 2
100PF
ROOM=RCAM_B2B
16V
01005
5%
NP0-C0G
C32091
2
ROOM=RCAM_B2B
01005
56PF
16V
5%
NP0-C0G
C32341
2
LP5907SNX-2.85
ROOM=RCAM_B2B
X2SON
U3200
3
2 5
4 1
01005
16V
NP0-C0G
5%
100PF
ROOM=RCAM_B2B
C32321
2
5%
100PF
NP0-C0G
16V
01005
ROOM=RCAM_B2B
C32311
2
ROOM=RCAM_B2B
01005
10-OHM-1.1A
FL3200
1 2
100PF
5%
16V
NP0-C0G
01005
ROOM=RCAM_B2B
NOSTUFF
C32991
2
01005
120-OHM-210MA
ROOM=RCAM_B2B
FL3231
1 2
65-OHM-0.1A-0.7-2GHZ
NOSTUFF
ROOM=RCAM_B2B
TAM0605
L3204
1
23
4
NOSTUFF
TAM0605
ROOM=RCAM_B2B
65-OHM-0.1A-0.7-2GHZ
L3203
1
23
4
65-OHM-0.1A-0.7-2GHZ
TAM0605
NOSTUFF
ROOM=RCAM_B2B
L3202
1
23
4
TAM0605
NOSTUFF
65-OHM-0.1A-0.7-2GHZ
ROOM=RCAM_B2B
L3201
1
23
4
NOSTUFF
ROOM=RCAM_B2B
65-OHM-0.1A-0.7-2GHZ
TAM0605
L3200
1
23
4
ROOM=RCAM_B2B
NP0-C0G
100PF
01005
16V
5%
C3230 1
2
FERR-22-OHM-1A-0.055OHM
ROOM=RCAM_B2B
0201
FL3201
1 2
2.2UF
20%
6.3V
0201
ROOM=RCAM_B2B
X5R-CERM
C32031
2
20%
0201
2.2UF
ROOM=RCAM_B2B
X5R-CERM
6.3V
C32041
2
ROOM=RCAM_B2B
01005
NP0-C0G
16V
100PF
5%
C32051
2
ROOM=RCAM_B2B
01005
NP0-C0G
16V
5%
56PF
C32331
2
X5R-CERM
2.2UF
20%
6.3V
ROOM=RCAM_B2B
0201
C32061
2
ROOM=RCAM_B2B
NP0-C0G
01005
100PF
16V
5%
C32211
2
ROOM=RCAM_B2B
0201-1
20%
X5R
6.3V
1.0UF
C32201
2
FERR-22-OHM-1A-0.055OHM
0201
ROOM=RCAM_B2B
FL3220
1 2
7 
7 
ROOM=RCAM_B2B
120-OHM-210MA
01005
FL3232
1 222 
21 
21 
22 7 
22 7 
16V
100PF
ROOM=RCAM_B2B
01005
NP0-C0G
5%
C32021
2
ROOM=RCAM_B2B
01005
120-OHM-210MA
FL3230
1 2
ROOM=RCAM_B2B
0.1UF
20%
6.3V
01005
X5R-CERM
C32011
2
21 
21 
21 
21 
21 
21 
14 
29 28 20 14 13 12 9 8 7 6 5 3 
21 15 
21 
33 26
25 24 22 17 15 14
14 
8 
21 15 
21 
21 
21 
20 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
IN
OUT
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
IN
BI
VIN
EN
EPADGND
VOUT
SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
IN
IN
OUT
BI
OUT
BI
IN
w 
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i x
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c o
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DUAL LED STROBE DRIVER
INT 200K PD
INT 200K PD
INT 200K PD
APN:353S3899
INT 200K PD
22 OF 60
VOLTAGE=5.0V
VOLTAGE=5.0V
VOLTAGE=5.0V
VOLTAGE=5.0V
33 OF 49
4.0.0
051-00648
PP_LED_BOOST_OUT
PP_LED_DRIVER_SW
PP_LED_DRIVER_WARM_LED
PP_LED_DRIVER_COOL_LED
PP_VCC_MAIN
LED_MODULE_NTC
BB_TO_LED_DRIVER_GSM_BURST_IND
RCAM_TO_LED_DRIVER_STROBE_EN
I2C_ISP_BI_RCAM_SDA
AP_TO_LED_DRIVER_EN
I2C_ISP_TO_RCAM_SCL
CAMERA:STROBE DRIVER
SYNC_MASTER=N/A SYNC_DATE=N/A
0402-9
ROOM=STROBE
CERM-X5R
6.3V
20%
10UF
C33941
2
ROOM=STROBE
NP0-C0G
100PF
5%
16V
01005
C33081
2
20%
X5R-CERM
2.2UF
6.3V
0201
ROOM=STROBE
C3384 1
2
ROOM=STROBE
100PF
NP0-C0G
01005
5%
16V
C33731
2
20%
2.2UF
6.3V
0201
ROOM=STROBE
X5R-CERM
C3385 1
2
0201
ROOM=STROBE
6.3V
X5R-CERM
20%
2.2UF
C3386 1
2
ROOM=STROBE
CRITICAL
PIQA20161T-SM
1.0UH-20%-3.6A-0.060OHM
L3300
1 2
32 
8 
21 
33 26 
6.3V
20%
0402-9
CERM-X5R
10UF
ROOM=STROBE
C33961
2
21 7 
21 7 
6.3V
20%
10UF
ROOM=STROBE
0402-9
CERM-X5R
C3387 1
2
ROOM=STROBE
WLCSP
LM3564A1TMX
CRITICAL
U3300
C1
D3
A1 B1
D1
A4
B4
C4
D4
A3
B3
C3
D2
E2
E3
A2
B2
E1
C2
E4
32 
32 
33 26 25 24 21 17 15 14 
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C
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PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
IN
IN
IN
IN
BI
IN
OUT
GND AGND
SCL
TX
SDA
TORCH
ENABLE
STROBE
TEMP
LED2
LED1
SW
NCw 
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ANC ERROR MIC
ANC REF MIC
VOICE MIC
CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS)
23 OF 60
35 OF 49
4.0.0
051-00648
90_MIKEYBUS_DATA_N
CODEC_TO_HPHONE_HS3_REF
FRONTMIC3_TO_CODEC_AIN4_N
FRONTMIC3_TO_CODEC_AIN4_P
REARMIC2_TO_CODEC_AIN3_P
REARMIC2_TO_CODEC_AIN3_N
LOWERMIC1_TO_CODEC_AIN1_N
90_MIKEYBUS_CALTRA_DATA_P
90_MIKEYBUS_CALTRA_DATA_N
MBUS_REF_U3500
CODEC_TO_HAC_P
CODEC_TO_RCVR_N
CODEC_TO_RCVR_P
CODEC_TO_HPHONE_L
CODEC_HSIN_N
CODEC_HSIN_P
CODEC_TO_HAC_N
CODEC_TO_HPHONE_HS4
CODEC_TO_HPHONE_HS3
CODEC_TO_HPHONE_R
HPHONE_TO_CODEC_DETECT
CODEC_TO_HPHONE_HS4_REF
90_MIKEYBUS_DATA_P
CODEC_HSIN_R_P
CODEC_HSIN_R_N
LOWERMIC1_TO_CODEC_AIN1_P
SYNC_MASTER=N/A SYNC_DATE=N/A
AUDIO:CALTRA CODEC (1/2)
100PF
NP0-C0G
5%
01005
16V
ROOM=CODEC
C3554
1 2
ROOM=CODEC
5%
01005
MF
1/32W
20.0
R3503
1 2
5%
01005
ROOM=CODEC
20.0
1/32W
MF
R3502
1 2
100PF
5%
01005
NP0-C0G
16V
ROOM=CODEC
C3552
1 2
ROOM=CODEC
SHORT-10L-0.1MM-SM
XW3500
1 2
WLCSP-1
CS
42
L7
1
ROOM=CODEC
CRITICAL
U3500
L1
L2
L3
K3
K1
K2
J4
J3
G1
F1
F3
F2
G3
G2
M9
L9
M8
L8
A4
B4
C4
C3
A3
B3
A2
B2
H12
J12
J9
K10
K11
M5
L10
M4
M10
E1
D1
G10
A9
B9
01005
6.3V
20%
X5R-CERM
ROOM=CODEC
0.1UF
C3506
1 2
6.3V
01005
ROOM=CODEC
X5R-CERM
20%
0.1UF
C3505
1 2
01005
1%
MF
1/32W
1.33K
ROOM=CODEC
NO_XNET_CONNECTION=1
R3550
1 2
01005
MF
1%
1.33K
ROOM=CODEC
NO_XNET_CONNECTION=1
1/32W
R3515
1 2
01005
10V
X7R-CERM
ROOM=CODEC
10%
220PF
C35041
2
30 
31 
20 
20 
32 
32 
31 
20 
20 
20 
31 
20 
31 
31 
31 
31 
31 
30 
31 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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DRAWING NUMBER SIZE
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PAGE TITLE
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2 1
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
NC
NC
SYM 1 OF 3
HS3_REF
HS4_REF
HPDETECT
HPOUTB
HS3
HS4
AOUT2-
HSIN+
HSIN-
HPOUTA
AOUT1+
AOUT1-
AOUT2+
MBUS_REF
DN
DP
AIN1+
AIN1-
AIN2+
AIN2-
AIN3+
AIN3-
AIN4-
AIN4+
AIN5-
AIN5+
AIN6-
AIN6+
AIN7+
AIN7-
DMIC3_DATA
DMIC3_CLK
DMIC2_CLK
DMIC2_DATA
DMIC4_CLK
DMIC1_DATA
DMIC1_CLK
PDM_CLK
DMIC4_DATA
PDM_DATA
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
w 
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c o
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CALTRA AUDIO CODEC (POWER & I/O)
24 OF 60
36 OF 49
4.0.0
051-00648
SPI_CODEC_TO_AP_MISO
CALTRA_FLYP
CALTRA_FLYC
CALTRA_FLYN
CALTRA_GNDCP
CALTRA_LP_FILTP
PMU_TO_CODEC_DIGLDO_PULLDN
PP1V8_SDRAM
PP_VCC_MAIN
PP1V8_SDRAM
CODEC_TO_PMU_MIKEY_INT_L
CODEC_TO_AP_PMU_INT_L
I2S_CODEC_TO_AP_ASP_DIN
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
SPI_AP_TO_CODEC_CS_L
SPI_AP_TO_CODEC_SCLK
45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_AP_TO_CODEC_ASP_DOUT
I2S_AP_TO_CODEC_ASP_LRCLK
I2S_AP_TO_CODEC_MSP_DOUT
I2S_CODEC_TO_AP_MSP_DIN
45_I2S_AP_TO_CODEC_MSP_BCLK
SPI_AP_TO_CODEC_MOSI
I2S_CODEC_TO_AP_OWL_XSP_DIN
I2S_AP_TO_CODEC_XSP_DOUT
45_I2S_AP_TO_CODEC_MCLK
I2S_AP_TO_CODEC_MSP_LRCLK
CODEC_RESET_L
PP_CODEC_TO_FRONTMIC3_BIAS
PP1V8_VA
PP1V2_VD_FILT
CALTRA_VCP_FILTP
CALTRA_VCP_FILTN
CALTRA_FILTP
CODEC_AGND
PP_CODEC_TO_LOWERMIC1_BIAS
LOWERMIC1_BIAS_FILT_IN
REARMIC2_BIAS_FILT_IN
PP_CODEC_TO_REARMIC2_BIAS
FRONTMIC3_BIAS_FILT_IN
CALTRA_HS_BIAS_FILT_IN
CALTRA_HS_BIAS_FILT
REARMIC2_BIAS_FILT_RET
LOWERMIC1_BIAS_FILT_RET
CODEC_AGND
FRONTMIC3_BIAS_FILT_RET
AUDIO:CALTRA CODEC (2/2)
SYNC_MASTER=N/A SYNC_DATE=N/A
SHORT-10L-0.1MM-SM
ROOM=CODEC
XW3630
1 2
ROOM=CODEC
SHORT-10L-0.1MM-SM
XW3620
1 2
2.2UF
ROOM=CODEC
X5R-CERM
0201
6.3V
20%
C36611
2
ROOM=CODEC
X5R-CERM
0201
6.3V
2.2UF
20%
C36601
2
ROOM=CODEC
X5R-CERM
0201
6.3V
2.2UF
20%
C36401
2
CERM-X5R
10UF
0402-9
6.3V
20%
ROOM=CODEC
C36001
2
ROOM=CODEC
0.1UF
X5R-CERM
01005
6.3V
20%
C36011
2 6.3VX5R-CERM
ROOM=CODEC
01005
0.1UF
20%
C36021
2
0201-1
ROOM=CODEC
1.0UF
6.3V
X5R
20%
C36701
2
4.7UF
ROOM=CODEC
6.3V
402
X5R-CERM1
20%
C3653
1 2
01005
6.3V
0.1UF
ROOM=CODEC
X5R-CERM
20%
C36121
2
0.1UF
X5R-CERM
6.3V
20%
01005
ROOM=CODEC
C36111
2
ROOM=CODEC
X5R-CERM1
402
4.7UF
6.3V
20%
C36541
2
01005
X5R-CERM
ROOM=CODEC
0.1UF
6.3V
20%
C36651
2
ROOM=CODEC
0402-9
10UF
CERM-X5R
6.3V
20%
C36101
2
ROOM=CODEC
20%
6.3V
402
X5R-CERM1
4.7UF
C3651
1 2
6.3V
ROOM=CODEC
20%
4.7UF
402
X5R-CERM1
C3650
1 2
0402-9
ROOM=CODEC
CERM-X5R
10UF
6.3V
20%
C36641
2
ROOM=CODEC
SM
XW3660
1 2
ROOM=CODEC
4.7UF
402
6.3V
20%
X5R-CERM1
C36631
2
ROOM=CODEC
402
X5R-CERM1
4.7UF
6.3V
20%
C36621
2
SHORT-10L-0.1MM-SM
ROOM=CODEC
XW3600
1 2
1/32W
5%
01005
ROOM=CODEC
MF
1.00K
R36501
2
CS
42
L7
1
ROOM=CODEC
CRITICAL
WLCSP-1
U3500
C5
C6
B5
B6
C8
C9
J5
H5
A1
A12
B12
E2
E3
E4
E10
F4
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
H6
H7
H8
H9
J8
K9
D4
D2
C2
D3
C12
A8
B8
C7
B7
D8
A7
H3
C10
D10
D7
D9
E8
E9
G11
H4
M1
D11
B10
D5
D6
E5
E6
E7
K4
K8
C11
B11
A11
A10
WLCSP-1
CS
42
L7
1
ROOM=CODEC
CRITICAL
U3500
H2
H1
L12
M12
K12
J2
L11
A6 B1 E1
1
F1
1 L4 L7
M3
M2
F12
M11
M6
K7
L6
J7
K6
L5
J6
K5
J10
J1J1
1
D1
2
G
12
C1 E1
2
A5 M
7
H1
0
H1
1
8 
16 
33 30 26 24 17 16 15 14 12 8 
33 26 25 22 21 17 15 14 
33 30 26 24 17 16 15 14 12 8 
16 
16 8 
25 8 
9 8 
9 8 
8 
8 
25 8 
25 8 
25 8 
8 
8 
8 
8 
9 8 
8 
8 
8 20 
25 15 
24 
31 
32 
31 
24 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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C
345678
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SYM 3 OF 3
DIGLDO_PDN
GND
TSTO
TSTO
TSTO
RESET*
GND
MSP_LRCK/FSYNC
MCLK
XSP_SDIN/DAC2B_MUTE
XSP_SDOUT
GND
TSTI
TSTI
MOSI
GND
DIGLDO_PULLDN
MSP_SCLK
MSP_SDOUT
MSP_SDIN
ASP_LRCK/FSYNC
ASP_SDIN
ASP_SCLK
MISO
CCLK
CS*
WAKE*
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TSTI
TSTI
TSTI
TSTI
TSTI
TSTO
TSTO
TSTI
TSTI
TSTO
TSTO
JTAG_TCK
JTAG_TDI
JTAG_TDO
TSTO
JTAG_TMS
XSP_LRCK/FSYNC
XSP_SCLK
ASP_SDOUT
INT*
SYM 2 OF 3
VP
_M
BU
S
VP
RO
G
_C
P
HS_BIAS_FILT
HS_BIAS_FILT_REF
MIC4_BIAS_FILT
MIC2_BIAS
MIC2_BIAS_FILT
MIC3_BIAS
MIC3_BIAS_FILT
MIC1_BIAS_FILT
MIC1_BIAS
G
ND
P
G
ND
A
FILT-
FILT+
FLYP
GNDCP
FLYN
LP_FILT+
-VCP_FILT
+VCP_FILT
FLYC
VC
P VDVD V
L
VD
_F
IL
T
VD
_F
IL
T VP VA
MIC4_BIAS
G
ND
HS
G
ND
D
G
ND
D
G
ND
D
G
ND
D
NC
NC
NC
NC
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1M INT PD
APN: 338S1285
SPEAKER AMPLIFIER
1M INT PD
1M INT PD
1M INT PD
1M INT PD
1M INT PD
25 OF 60
VOLTAGE=8.0V
VOLTAGE=8.0V
37 OF 49
4.0.0
051-00648
PP_SPKR_VBOOST
PP_SPEAKERAMP_SW
PP_VCC_MAIN
SPEAKERAMP_TO_SPEAKER_OUT_POS
PP1V8_VA
SPEAKERAMP_LDO_FILT
AP_TO_SPEAKERAMP_RESET_L
SPEAKERAMP_FILT
I2S_CODEC_TO_AP_ASP_DIN
VSENSE_POS
VSENSE_NEG
SPEAKERAMP_IREF
SPEAKERAMP_TO_SPEAKER_OUT_NEG
I2S_AP_TO_CODEC_ASP_DOUT
I2C1_AP_SDA
45_I2S_AP_TO_SPEAKERAMP_MCLK
45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_AP_TO_CODEC_ASP_LRCLK
SPEAKERAMP_TO_AP_INT_L
I2C1_AP_SCL
AUDIO:SPEAKER DRIVER
SYNC_MASTER=N/A SYNC_DATE=N/A
SHORT-10L-0.1MM-SM
XW3704
1 2
SHORT-10L-0.1MM-SM
XW3703
1 2
20%
10V
0603-1
X5R-CERM
22UF
C37421
2 NP0-C0G
01005
ROOM=SPKR_AMP
16V
5%
100PF
C37461
2
ROOM=SPKR_AMP
X5R
1000PF
01005
10V
10%
C3760 1
2
ROOM=SPKR_AMP
44.2K
MF
1/32W
01005
1%
R37351
2
X5R
ROOM=SPKR_AMP
01005
10V
10%
1000PF
C37631
2 X5R
10%
10V
1000PF
01005
ROOM=SPKR_AMP
C3700 1
2 X5R
01005
10V
1000PF
10%
ROOM=SPKR_AMP
C37021
2
0402
ROOM=SPKR_AMP
CER-X5R
4.7UF
20%
6.3V
C37401
2CS35L21-XWZR
ROOM=SPKR_AMPCRITICAL
WLCSP
U3700
C7
D7
F2
B5 B6 C6 E4 F3 F4A
3 B3 B4 C3 C4 D3 D4
A7
B7
F1
E1
C5
F6
E7
C2
D2
A6
D6
E6
D5
F7
E5
A2
B2
F5A1 B1 C1 D1 A4 A5
E3
E2
CRITICAL
ROOM=SPKR_AMP
PIQA20161T-SM
1.2UH-20%-3.0A-0.080OHM
L3700
1 2
24 8 
8 
24 8 
24 8 
24 8 
30 17 8 
30 17 8 
ROOM=SPKR_AMP
2.2UF
6.3V
20%
X5R-CERM
0201
C37291
2
20%
6.3V
0201
X5R-CERM
2.2UF
ROOM=SPKR_AMP
C37301
2
8 
8 
5%
MF
1/32W
100K
01005
ROOM=SPKR_AMP
R37291
2
20%
0402-8
10V
10UF
ROOM=SPKR_AMP
X5R-CERM
C37411
2
01005
20%
6.3V
0.1UF
ROOM=SPKR_AMP
X5R-CERM
C37091
2
16V
ROOM=SPKR_AMP
10%
0201
X5R-CERM
0.1UF
C37451
2
33 26 24 22 21 17 15 14 
31 
24 15 
31 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
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36
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DRAWING NUMBER SIZE
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SHEET
PAGE TITLE
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NOTICE OF PROPRIETARY PROPERTY:
A
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C
345678
D
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
VER1
SDOUT
SDIN
LRCK/FSYNC
SCLK
MCLK
ALIVE
RESET*
INT*
GNDP
LDO_FILT
VSENSE-
VSENSE+
ISENSE-
ISENSE+
OUT-
OUT+
IREF+
GNDA
SW
VBST
ADO
VA
SDA
VP
SCL
FILT+
IN
IN
IN
IN
OUT
IN
BI
IN
OUT
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CHESTNUT DISPLAY PMU
APN:338S1172
MOJAVE MESA BOOST
APN:353S4207 (A1)
200K INT PD
NO INT PULL
NO INT PULL
DISPLAY & TOUCH - POWER SUPPLIES
APN:353S00640
LED BACKLIGHT DRIVER
26 OF 60
VOLTAGE=6.0V
VOLTAGE=5.7V
VOLTAGE=5.7V
VOLTAGE=6.0V
VOLTAGE=21V
VOLTAGE=21V
VOLTAGE=25V
VOLTAGE=25V
VOLTAGE=6.3V
VOLTAGE=35V
VOLTAGE=-6.0V
VOLTAGE=18.0V
VOLTAGE=12.0V
VOLTAGE=5.1V
VOLTAGE=-5.7V
VOLTAGE=11.5V
40 OF 49
4.0.0
051-00648
PP_CHESTNUT_CP
PP5V7_LCM_AVDDH
PP5V7_SAGE_AVDDH
PP6V0_LCM_BOOST
PP_LCM_BL_CAT2
PP_LCM_BL_CAT1
PP_BL_SW1
PP_BL_SW2
PP_VCC_MAIN
I2C0_AP_SCL
I2C0_AP_SDA
LCM_TO_CHESTNUT_PWR_EN
PMU_TO_OWL_ACTIVE_READY
PP_VCC_MAIN
PP3V0_TRISTAR
BB_TO_LED_DRIVER_GSM_BURST_IND
AP_TO_MUON_BL_STROBE_EN
I2C0_AP_SCL
I2C0_AP_SDA
45_DWI_PMGR_TO_BACKLIGHT_SCLK
CHESTNUT_TO_PMU_ADCMUX
PP1V8_SDRAM
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
MESA_TO_BOOST_EN
PP_VCC_MAIN
PP_CHESTNUT_SW
PP_LCM_BL_ANODE
PN_CHESTNUT_CN
PP13V0_MESA_SW
PP12V0_MOJAVE_LDOIN
PP5V1_GRAPE_VDDH
PN5V7_SAGE_AVDDN
PP11V3_MESA
SYNC_DATE=N/ASYNC_MASTER=N/A
DISPLAY:POWER
X5R-CERM
10UF
20%
VOLTAGE=10V
ROOM=CHESTNUT
0402-8
C40021
2
CERM-X5R
ROOM=BACKLIGHT
20%
0402-9
10UF
VOLTAGE=6.3V
C4020 1
2 CERM-X5R
ROOM=BACKLIGHT
0402-9
20%
10UF
VOLTAGE=6.3V
C4021 1
2
LM3539A1
DSBGA
CRITICAL
ROOM=BACKLIGHT
U4020
B3 B4
D4
D2
C1
B1
A1
C3
A2
B2
C2
C4
A3
A4
D1
D3
33 22 
7 
9 
16 9 
0402-1
ROOM=MOJAVE
X5R-CERM
20%
2.2UF
VOLTAGE=25V
C40411
2
0201
5%
56PF
ROOM=MOJAVE
NP0-C0G
VOLTAGE=25V
C40421
2
0402-1
ROOM=MOJAVE
2.2UF
20%
X5R-CERM
VOLTAGE=25V
C40431
2
BGA
ROOM=MOJAVE
LM3638A1
CRITICAL
U4040
B3
B2
A3
C2
A1
C1
B1
A2 C3
20%
X5R-CERM
ROOM=CHESTNUT
0603-1
22UF
VOLTAGE=10V
C40071
2
27 3 
33 31 30 15 
ROOM=BACKLIGHT
NSR05F30NXT5G
DSN2
CRITICAL
D4021
A K
ROOM=BACKLIGHT
100PF
5%
01005
NP0-C0G
VOLTAGE=35V
C40221
2
10UF
20%
ROOM=BACKLIGHT
0603
X5R-CERM
VOLTAGE=35V
C40231
2
PIXB2016FE-SM
ROOM=CHESTNUT
CRITICAL
1.0UH-20%-2.25A-0.15OHM
L4000
1
2
ROOM=BACKLIGHT
1.0UH-20%-3.6A-0.060OHM
CRITICAL
PIQA20161T-SM
L4021
1 2
0403
ROOM=MOJAVE
CRITICAL
1.0UH-20%-0.4A-0.636OHM
L4040
1 2
ROOM=CHESTNUT
20%
1UF
0201
CER-X5R
VOLTAGE=16V
C40031
2
1%
200K
1/32W
01005
MF
ROOM=BACKLIGHT
R40201
2
SOD-923-1
NSR0530P2T5G
CRITICAL
ROOM=BACKLIGHT
D4020
KA
26 16 8 
26 16 8 
26 16 8 
26 16 8 
16 
28 16 
30 16 9 5 
ROOM=BACKLIGHT
CRITICAL
PITA32251T-SM
15UH-20%-0.72A-0.9OHM
L4020
1 2
10UF
20%
CERM-X5R
0402-9
ROOM=MOJAVE
VOLTAGE=6.3V
C4040 1
2
X5R-CERM
10UF
ROOM=CHESTNUT
20%
0402-8
VOLTAGE=10V
C40041
2
10UF
20%
ROOM=CHESTNUT
0402-8
X5R-CERM
VOLTAGE=10V
C40051
2
20%
X5R-CERM
0402-8
ROOM=CHESTNUT
VOLTAGE=10V
10UF
C40061
2
20%
10UF
CERM-X5R
0402-9
ROOM=CHESTNUT
VOLTAGE=6.3V
C4000 1
2
ROOM=CHESTNUT
BGA
CRITICAL
TPS65730A0PYFF
U4000
E1
C1
C4
E4
B4
A4
A3
A1
C3
B3
B1 D4
C2
D3
D2
B2
A2
D1
E3
E2
28 
29 
28 
28 
33 26 25 24 22 21 17 15 14 
33 26 25 24 22 21 17 15 14 
33 30 24 17 16 15 14 12 8 
33 26 25 24 22 21 17 15 14 
28 
29 
29 28 
27 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SDI
VIO/HWEN
SCK
SDA
TRIG
SW2_1
SW2_2
SCL
SW1
IN OUT
LED1
LED2
INHIBIT
G
ND
G
ND
IN
IN
IN
IN
PMID
VOUT
EN_S
LDOIN
EN_M
SW
VIN
PG
ND
AG
ND
IN
IN
IN
BI
IN
BI
OUT
IN
IN
HVLDO3
HVLDO2
HVLDO1
VNEG(SUB)
VNEG
AG
ND
PG
ND
2
PG
ND
1
CPUMP
LCMBST
CF1
CF2
ADCMUX
RESET*
LCM_EN
SDA
SCL
SYNC
SW
VIN
w 
w 
w 
. c
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 a
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i x
 . 
c o
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MESA POWER AND IO FILTERS
MESA POWER
MESA DIGITAL I/O
27 OF 60
41 OF 49
4.0.0
051-00648
PP11V3_MESA_CONN
MESA_TO_AP_INT
MESA_TO_BOOST_EN
SPI_AP_TO_MESA_SCLK_CONN
MESA_TO_AP_INT_CONN
SPI_MESA_TO_AP_MISO SPI_MESA_TO_AP_MISO_CONN
SPI_AP_TO_MESA_MOSI_CONN
BUTTON_MENU_KEY_L
PP1V9_MESA_CONN
SPI_AP_TO_MESA_SCLK
PP11V3_MESA
SPI_AP_TO_MESA_MOSI
PP3V1_MESA
PP1V9_MESA
PP3V1_MESA_CONN
MESA_TO_BOOST_EN_CONN
BUTTON_MENU_KEY_CONN_L
SYNC_MASTER=N/A SYNC_DATE=N/A
MESA POWER AND IO FILTERS
1%
1/32W
01005
MF
681
ROOM=MAMBA_MESA
R4116
1 2
01005
ROOM=MAMBA_MESA
120-OHM-210MA
FL4114
1 2
0201
ROOM=MAMBA_MESA
80-OHM-25%-1000MA
FL4100
1 2
01005-1
12V-33PF
NOSTUFF
DZ41011
2
ROOM=MAMBA_MESA
5%
01005
NP0-C0G
16V
56PF
C41171
2
01005
ROOM=MAMBA_MESA
120-OHM-210MA
FL4143
1 2
5%
16V
NP0-C0G
01005
56PF
ROOM=MAMBA_MESA
C41161
2
5%
01005
NP0-C0G
100PF
ROOM=MAMBA_MESA
35V
C41071
2
01005
5%
100PF
16V
NP0-C0G
ROOM=MAMBA_MESA
C41151
2
ROOM=MAMBA_MESA
5%
01005
NP0-C0G
100PF
16V
C41051
2
01005
ROOM=MAMBA_MESA
70-OHM-25%-0.28A
FL4107
1 2
ROOM=MAMBA_MESA
01005
70-OHM-25%-0.28A
FL4105
1 2
6.3V
20%
ROOM=MAMBA_MESA
X5R-CERM
0201
2.2UF
C41061
2
26 3 
ROOM=MAMBA_MESA
5%
56PF
01005
NP0-C0G
16V
C41101
2
01005
5%
NP0-C0G
56PF
16V
ROOM=MAMBA_MESA
C41111
2
16V
5%
NP0-C0G
01005
ROOM=MAMBA_MESA
56PF
C41121
2
01005
ROOM=MAMBA_MESA
120-OHM-210MA
FL4112
1 2
01005
MF
0%
1/32W
0.00
ROOM=MAMBA_MESA
R4111
1 2
120-OHM-210MA
ROOM=MAMBA_MESA
01005
FL4110
1 28 
8 
8 
8 
8 
6.3V
20%
ROOM=MAMBA_MESA
X5R-CERM
0201
2.2UF
C41041
2
20%
X5R-CERM
ROOM=MAMBA_MESA
6.3V
0201
2.2UF
C41031
2 6.3V
20%
ROOM=MAMBA_MESA
X5R-CERM
0201
2.2UF
C41021
2
0.1UF
6.3V
20%
X5R-CERM
01005
ROOM=MAMBA_MESA
C41011
2
ROOM=MAMBA_MESA
100PF
5%
01005
NP0-C0G
16V
C41001
2
31 
31 
31 
31 
31 
31 
26 3 
15 
15 
31 
31 
31 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
IN
OUT
IN
OUT
OUT
w 
w 
w 
. c
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 a
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i x
 . 
c o
 m
516S1051 (RCPT)
DISPLAY CONTROL SIGNALS
DISPLAY FLEX
DISPLAY POWER
OWL TO TOUCH INTERFACE
PROX TO TOUCH INTERFACE
DISPLAY MIPI
BACKLIGHT
THIS ONE ON MLB --->
DISPLAY CONNECTOR
516S1050 (PLUG)
28 OF 60
42 OF 49
4.0.0
051-00648
90_MIPI_AP_TO_LCM_CLK_CONN_P
PN_SAGE_TO_TOUCH_VCPL
PP_LCM_BL_CAT1_CONN
LCM_TO_CHESTNUT_PWR_EN_CONNLCD_TO_AP_PIFA_CONN
LCM_TO_CHESTNUT_PWR_EN
90_MIPI_AP_TO_LCM_DATA1_N
90_MIPI_AP_TO_LCM_DATA1_P
90_MIPI_AP_TO_LCM_DATA0_N
90_MIPI_AP_TO_LCM_DATA0_P
90_MIPI_AP_TO_LCM_CLK_N
90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_CONN_P
90_MIPI_AP_TO_LCM_CLK_CONN_N
90_MIPI_AP_TO_LCM_DATA0_CONN_P
90_MIPI_AP_TO_LCM_DATA0_CONN_N
90_MIPI_AP_TO_LCM_DATA1_CONN_P
90_MIPI_AP_TO_LCM_DATA1_CONN_N
PP_LCM_BL_CAT2
PP_LCM_BL_CAT1
PP_LCM_BL_ANODE
CUMULUS_TO_PROX_RX_EN_1V8
LCM_TO_AP_HIFA_BSYNC
PMU_TO_LCM_PANICB
AP_TO_LCM_RESET_L
PP_LCM_BL_CAT2_CONN
PP_LCM_BL_ANODE_CONN
PMU_TO_LCM_PANIC_CONN
AP_TO_LCM_RESET_CONN_L
CUMULUS_TO_PROX_RX_EN_1V8_CONN
LCM_TO_AP_HIFA_BSYNC_CONN
PP5V7_LCM_AVDDH
90_MIPI_AP_TO_LCM_DATA1_CONN_N
90_MIPI_AP_TO_LCM_DATA0_CONN_P
90_MIPI_AP_TO_LCM_DATA0_CONN_N
PN5V7_SAGE_AVDDN_CONN
LCM_TO_CHESTNUT_PWR_EN_CONN
90_MIPI_AP_TO_LCM_DATA1_CONN_P LCM_TO_AP_HIFA_BSYNC_CONN
PMU_TO_LCM_PANIC_CONN
AP_TO_LCM_RESET_CONN_L
PP1V8_LCM_CONN
PP_LCM_BL_CAT2_CONN
LCD_TO_AP_PIFA_CONN
PP_LCM_BL_ANODE_CONN
PP_LCM_BL_CAT1_CONN90_MIPI_AP_TO_LCM_CLK_CONN_N
PN5V7_SAGE_AVDDN PN5V7_SAGE_AVDDN_CONN
PP5V7_LCM_AVDDH_CONN
PP5V7_LCM_AVDDH_CONN
PP1V8_LCM_CONNPP1V8
DISPLAY FLEX
SYNC_MASTER=N/A SYNC_DATE=N/A
28 3 
56PF
5%
01005
ROOM=LCM_B2B
NP0-C0G
16V
C42081
2
M-ST-SM
ROOM=LCM_B2B
CRITICAL
BM15AP-0.8-22DP-0.35V
J4200
23
24
25
26
12
34
56
78
910
1112
1314
1516
1718
1920
2122
ROOM=LCM_B2B
01005
16V
5%
100PF
NP0-C0G
C42411
2
ROOM=LCM_B2B
16V
5%
01005
NP0-C0G
100PF
C42221
2
ROOM=LCM_B2B
01005
NP0-C0G
100PF
16V
5%
C42211
2
70-OHM-25%-0.28A
ROOM=LCM_B2B
01005
FL4207
12
ROOM=LCM_B2B
240OHM-350MA
0201
FL4200
12
0201
ROOM=LCM_B2B
240OHM-350MA
FL4205
12
0201
240OHM-350MA
ROOM=LCM_B2B
FL4213
1 2
0201
240OHM-350MA
ROOM=LCM_B2B
FL4212
1 2
0201
240OHM-350MA
ROOM=LCM_B2B
FL4211
1 2
CRITICAL
65-OHM-0.1A-0.7-2GHZ
TAM0605
ROOM=LCM_B2B
L4202
1
23
4
65-OHM-0.1A-0.7-2GHZ
CRITICAL
TAM0605
ROOM=LCM_B2B
L4201
1
23
4
65-OHM-0.1A-0.7-2GHZ
TAM0605
CRITICAL
ROOM=LCM_B2B
L4200
1
23
4
X5R-CERM
ROOM=LCM_B2B
2.2UF
0201
6.3V
20%
C42051
2
ROOM=LCM_B2B
120-OHM-210MA
01005
FL4241
1 229 
5%
100PF
01005
NP0-C0G
35V
ROOM=LCM_B2B
C42131
2
5%
01005
NP0-C0G
35V
100PF
ROOM=LCM_B2B
C42121
2
26 16 
16 
0201
6.3V
ROOM=LCM_B2B
20%
X5R-CERM
2.2UF
C42031
2
ROOM=LCM_B2B
20%
X5R-CERM
0201
6.3V
2.2UF
C4202 1
2
2.2UF
ROOM=LCM_B2B
X5R-CERM
0201
6.3V
20%
C4201 1
2
ROOM=LCM_B2B
2.2UF
20%
6.3V
X5R-CERM
0201
C4200 1
2
33 29 9 8 
8 
7 
7 
7 
7 
7 
7 
100PF
ROOM=LCM_B2B
NP0-C0G
16V
01005
5%
C42041
2
ROOM=LCM_B2B
100PF
5%
16V
NP0-C0G
01005
C42071
2
ROOM=LCM_B2B
100PF
16V
NP0-C0G
01005
5%
C42061
2
35V
5%
100PF
01005
NP0-C0G
ROOM=LCM_B2B
C42111
2
ROOM=LCM_B2B
120-OHM-210MA
01005
FL4222
12
ROOM=LCM_B2B
01005
120-OHM-210MA
FL4230
12
ROOM=LCM_B2B
01005
NP0-C0G
5%
56PF
16V
C42301
2
ROOM=LCM_B2B
100K
MF
01005
1/32W
1%
R4220 1
2
ROOM=LCM_B2B
01005
120-OHM-210MA
FL4221
12
ROOM=LCM_B2B
01005
16V
NP0-C0G
100PF
5%
C42201
2
ROOM=LCM_B2B
120-OHM-210MA
01005
FL4220
12
28 
29 
28 3 
28 
28 
28 
28 
28 
28 
28 
26 
26 
26 
28 3 
28 3 
28 
28 
20 
28 
26 
28 
28 
28 
28 
28 
28 28 
28 
28 
28 
28 3 
28 3 
28 3 
28 3 28 
29 26 28 
28 
28 
28 
29 21 
20 14 13 12
9 8 7 6 5 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
SYM_VER-2
SYM_VER-2
SYM_VER-2
OUT
OUT
IN
OUT
IN
IN
IN
IN
IN
IN
IN
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
THESE ARE ROUTED TOGETHER
VGH
GS0
VGL
APN: 343S0645 (CD3246C0, T6)
3.5V
SAGE2 C0
NOTE: LCM_TO_AP_HIFA_BSYNC_BUFF
C1
516S1070 RCPT
R18
R12
C5
GS2
VGH_REF
C6
VGL_REF
ON MLB ->
R9
R0_LEFT
13.5V
C0
-12V
R2
R3
R4
R10
R7
C2
R19
R11
C9
R15
R17
R13
R14
GS3
C7
GS4
R0_RIGHT
R8
R6
GS1
C3
C4
C8
VCOM
R16
SPECIAL - CANNOT SWAP
516S1071 PLUG
ON FLEX-> TOUCH B2B
5.45-5.98V
D403 (B2B,DRIVER ICS)
TO CLAMP THE
NEGATIVE RAILCUMULUS C1
(TURN OFF SAME TIME AS PP1V8_TOUCH)
SPECIAL - CANNOT SWAP
(TURN ON LATER THAN PP1V8_TOUCH)
R5
R1
343S0638
29 OF 60
43 OF 49
4.0.0
051-00648
CUMULUS_TO_SAGE_VSTM_OUT<13>
TOUCH_TO_SAGE_SENSE_IN<14>
SAGE_TO_TOUCH_VSTM_OUT<2>
SAGE_TO_TOUCH_VSTM_OUT<19>
SAGE_TO_TOUCH_VSTM_OUT<9>
SAGE_TO_TOUCH_VSTM_OUT<0>
SAGE_TO_TOUCH_VSTM_OUT<10>
LCM_TO_AP_HIFA_BSYNC
SAGE_TO_TOUCH_VSTM_OUT<4>
SAGE_TO_TOUCH_VSTM_OUT<17>
SAGE_TO_TOUCH_VSTM_OUT<15>
SAGE_TO_TOUCH_VSTM_OUT<1>
SAGE_TO_TOUCH_VSTM_OUT<12>
SAGE_TO_TOUCH_VSTM_OUT<6>
SAGE_TO_TOUCH_VSTM_OUT<8>
SAGE_TO_TOUCH_VSTM_OUT<14>
SAGE_TO_TOUCH_VSTM_OUT<13>
SAGE_TO_TOUCH_VSTM_OUT<16>
SAGE_TO_TOUCH_VSTM_OUT<3>
CUMULUS_TO_SAGE_VSTM_OUT<1>
SAGE_TO_CUMULUS_IN<1>
SAGE_TO_CUMULUS_IN<8>
SAGE_TO_CUMULUS_IN<14>
SAGE_TO_CUMULUS_IN<9>
TOUCH_TO_SAGE_SENSE_IN<6>
CUMULUS_TO_SAGE_VSTM_OUT<16>
CUMULUS_TO_SAGE_VSTM_OUT<16>
TOUCH_TO_SAGE_VCM_IN
PP5V7_SAGE_AVDDH
LCM_TO_AP_HIFA_BSYNC_BUFF
PP1V8_CUMULUS_VDDLDO
PP1V8_CUMULUS_VDDLDO
PP_SAGE_LY
PP_SAGE_TO_TOUCH_VCPH
PP5V7_SAGE_AVDDH
CUMULUS_TO_SAGE_VSTM_OUT<0>
PP_SAGE_VCPL_F
TOUCH_TO_SAGE_SENSE_IN<12>
SAGE_TO_TOUCH_VSTM_OUT<11>
TOUCH_TO_SAGE_SENSE_IN<13>
TOUCH_TO_SAGE_SENSE_IN<2>
CUMULUS_TO_PROX_RX_EN_1V8
CUMULUS_TO_SAGE_BOOST_EN
CUMULUS_TO_SAGE_VSTM_OUT<6>
TOUCH_TO_SAGE_SENSE_IN<7>
TOUCH_TO_SAGE_SENSE_IN<1>
CUMULUS_TO_SAGE_VSTM_OUT<5>
CUMULUS_TO_SAGE_BOOST_EN
U12_GPIO_3
CUMULUS_TO_SAGE_GCM_SEL
PP1V8_TOUCH
TOUCH_TO_SAGE_SENSE_IN<7>
45_PROX_TO_CUMULUS_RX_FILT
SAGE_TO_CUMULUS_IN<1>
TOUCH_TO_SAGE_SENSE_IN<10>
TOUCH_TO_SAGE_SENSE_IN<0>
SAGE_TO_CUMULUS_IN<12>
SAGE_TO_CUMULUS_IN<7>
SAGE_TO_CUMULUS_IN<4>
SAGE_TO_CUMULUS_IN<5>
SAGE_TO_CUMULUS_IN<0>
SAGE_TO_CUMULUS_IN<14>
CUMULUS_TO_SAGE_VSTM_OUT<11>
CUMULUS_TO_SAGE_VSTM_OUT<8>
TOUCH_TO_SAGE_SENSE_IN<5>
CUMULUS_TO_SAGE_VSTM_OUT<17>
CUMULUS_TO_SAGE_VSTM_OUT<2>
CUMULUS_TO_SAGE_VSTM_OUT<3>
CUMULUS_TO_SAGE_VSTM_OUT<4>
45_PROX_TO_CUMULUS_RX
SAGE_TO_CUMULUS_IN<8>
SAGE_TO_CUMULUS_IN<6>
SAGE_TO_CUMULUS_IN<3>
CUMULUS_TO_SAGE_GCM_SEL
CUMULUS_TO_SAGE_VSTM_OUT<13>
SAGE_TO_CUMULUS_IN<4>
SAGE_TO_CUMULUS_IN<3>
SAGE_TO_CUMULUS_IN<5>
SAGE_TO_CUMULUS_IN<0>
SAGE_TO_CUMULUS_IN<7>
SAGE_TO_CUMULUS_IN<10>
SAGE_TO_CUMULUS_IN<11>
SAGE_TO_CUMULUS_IN<2>
SAGE_TO_CUMULUS_IN<13>
SAGE_TO_CUMULUS_IN<6>
SAGE_TO_TOUCH_VSTM_OUT<11>
TOUCH_TO_SAGE_SENSE_IN<3>
TOUCH_TO_SAGE_SENSE_IN<11>
TOUCH_TO_SAGE_SENSE_IN<8>
TOUCH_TO_SAGE_SENSE_IN<13>
CUMULUS_TO_SAGE_VSTM_OUT<7>
CUMULUS_TO_SAGE_VSTM_OUT<12>
CUMULUS_TO_SAGE_VSTM_OUT<6>
CUMULUS_TO_SAGE_VSTM_OUT<18>
CUMULUS_TO_SAGE_VSTM_OUT<14>
TOUCH_TO_SAGE_SENSE_IN<9>
CUMULUS_TO_SAGE_VSTM_OUT<19>
SAGE_TO_TOUCH_VSTM_OUT<18>
SAGE_TO_TOUCH_VSTM_OUT<0>
SAGE_TO_TOUCH_VSTM_OUT<12>
SAGE_TO_TOUCH_VSTM_OUT<13>
SAGE_TO_TOUCH_VSTM_OUT<14>
SAGE_TO_TOUCH_VSTM_OUT<15>
SAGE_TO_TOUCH_VSTM_OUT<17>
TOUCH_TO_SAGE_SENSE_IN<14>
SAGE_TO_TOUCH_VSTM_OUT<0>
SAGE_TO_TOUCH_VSTM_OUT<2>
SAGE_TO_TOUCH_VSTM_OUT<4>
SAGE_TO_TOUCH_VSTM_OUT<8>
SAGE_TO_TOUCH_VSTM_OUT<6>
SAGE_TO_TOUCH_VSTM_OUT<5>
TOUCH_TO_SAGE_SENSE_IN<1>
TOUCH_TO_SAGE_SENSE_IN<3>
TOUCH_TO_SAGE_SENSE_IN<9>TOUCH_TO_SAGE_SENSE_IN<10>
TOUCH_TO_SAGE_VCM_IN
SAGE_TO_TOUCH_VCPL_REF
SAGE_TO_TOUCH_VCPH_REF
TOUCH_TO_SAGE_SENSE_IN<8>
SAGE_TO_TOUCH_VSTM_OUT<16>
SAGE_TO_TOUCH_VSTM_OUT<19>
PP1V8_TOUCH
CUMULUS_TO_PROX_TX_EN_1V8_L
SPI_AP_TO_TOUCH_CS_L
SPI_AP_TO_TOUCH_SCLK
SAGE_TO_TOUCH_VSTM_OUT<9>
TOUCH_TO_SAGE_SENSE_IN<2>
TOUCH_TO_SAGE_SENSE_IN<6>
SAGE_TO_TOUCH_VSTM_OUT<3>
SAGE_TO_TOUCH_VSTM_OUT<1>
CUMULUS_TO_SAGE_VSTM_OUT<19>
CUMULUS_TO_SAGE_VSTM_OUT<15>
CUMULUS_TO_SAGE_VSTM_OUT<0>
CUMULUS_TO_SAGE_VSTM_OUT<12>
CUMULUS_TO_SAGE_VSTM_OUT<8>CUMULUS_TO_SAGE_VSTM_OUT<4>
CUMULUS_TO_SAGE_VSTM_OUT<1>
CUMULUS_TO_SAGE_VSTM_OUT<14>
TOUCH_TO_SAGE_SENSE_IN<12>
PP1V8
CUMULUS_TO_PROX_TX_EN_1V8_L
LCM_TO_AP_HIFA_BSYNC
PP1V8_TOUCH
SAGE_TO_CUMULUS_IN<9>
SAGE_TO_CUMULUS_IN<10>
SAGE_TO_CUMULUS_IN<11>
SAGE_TO_CUMULUS_IN<12>
TOUCH_TO_AP_SPI1_MISO_R
CUMULUS_TO_PROX_TX_EN_BUFF
SPI_AP_TO_TOUCH_MOSI
SPI_TOUCH_TO_AP_MISO
45_AP_TO_TOUCH_CLK32K_RESET_L 45_AP_TO_TOUCH_CLK32K_RESET_L_XW
PN_SAGE_TO_TOUCH_VCPL
SAGE_TO_CUMULUS_IN<13>
TOUCH_TO_SAGE_SENSE_IN<5>
TOUCH_TO_SAGE_SENSE_IN<11>
TOUCH_TO_SAGE_SENSE_IN<0>
TOUCH_TO_SAGE_SENSE_IN<4>
SAGE_TO_TOUCH_VSTM_OUT<7>
SAGE_TO_TOUCH_VSTM_OUT<10>
PN5V7_SAGE_AVDDN
PP_SAGE_VBST_OUTH
PN_SAGE_VBST_OUTL
PN_SAGE_TO_TOUCH_VCPL
PP_SAGE_TO_TOUCH_VCPH
PN5V7_SAGE_AVDDN_INT
PP_SAGE_LX
SAGE_TO_TOUCH_VCPL_REF
SAGE_TO_TOUCH_VCPH_REF
SAGE_VBIAS
CUMULUS_TO_SAGE_VSTM_OUT<17>
CUMULUS_TO_SAGE_VSTM_OUT<18>
CUMULUS_TO_SAGE_VSTM_OUT<5>
CUMULUS_TO_SAGE_VSTM_OUT<2>
SAGE_TO_TOUCH_VSTM_OUT<7>
SAGE_TO_TOUCH_VSTM_OUT<18>
CUMULUS_TO_SAGE_VSTM_OUT<15>
SAGE_TO_TOUCH_VSTM_OUT<5>
SAGE_TO_CUMULUS_IN<2>
CUMULUS_TO_SAGE_VSTM_OUT<11>
CUMULUS_TO_SAGE_VSTM_OUT<7>
CUMULUS_TO_SAGE_VSTM_OUT<3>
CUMULUS_TO_SAGE_VSTM_OUT<9>
TOUCH_TO_SAGE_SENSE_IN<4>
CUMULUS_TO_SAGE_VSTM_OUT<10>
AP_TO_TOUCH_RESET_L
45_PROX_TO_CUMULUS_RX_IN
PP_CUMULUS_VDDCORE
PP5V1_GRAPE_VDDH
PP_CUMULUS_VDDANA
TOUCH_TO_AP_INT_L
D403 (TOUCH B2B, DRIVER ICS)
ROOM=SAGE
0402-1
20%
10UF
X5R-CERM
10V
C43171
2
74AUP2G3404GN
SOT1115
ROOM=CUMULUS
U4302
16
34
2
5
ROOM=CUMULUS
1% MF
22.1K
010051/32W
R4301
1 2
ROOM=CUMULUS
01005
MF
10.2 1/32W
1%
R4302
1 2
16V
10%
ROOM=SAGE
1UF
0402
X6S-CERM
C43091
2 16V
0402
10%
1UF
X6S-CERM
ROOM=SAGE
C43111
2
ROOM=SAGE
X6S-CERM
1UF
16V
10%
0402
C43161
2
10%
ROOM=SAGE
0201
16V
X5R-CERM
0.1UF
C43071
2
6.3V
X5R-CERM
1000PF
01005
10%
ROOM=CUMULUS
C4301
1 2
ROOM=SAGE
X5R-CERM
16V
0.1UF
0201
10%
C4325 1
2
ROOM=CUMULUS
SM
XW4302
1 2
X5R
20%
ROOM=CUMULUS
1.0UF
6.3V
0201-1
C43061
2
10%
0.1UF
X5R-CERM
ROOM=SAGE
16V
0201
C43081
2
16V
NP0-C0G
5%
01005
ROOM=CUMULUS
27PF
C4303 1
2
5%
ROOM=CUMULUS
01005
MF
1/32W
100K
R43031
2
4.7UF
20%
6.3V
ROOM=CUMULUS
402
X5R-CERM1
C43041
2
4.7UF
20%
X5R-CERM1
6.3V
402
ROOM=CUMULUS
C43051
2
ROOM=CUMULUS
MF
01005
5%
1/32W
100K
R4305 1
2
01005
ROOM=CUMULUS
MF
1/32W
100K
5%
R43061
2
ROOM=CUMULUS
1/32W
MF
01005
5%
220K
R4304
1 2
0.01UF
10%
01005
X5R
ROOM=SAGE
6.3V
C4313 1
2
0.01UF
ROOM=SAGE
01005
10%
X5R
6.3V
C4310 1
2
ROOM=SAGE
GDZ-0201
GDZT2R6.2B
DZ4301A
K
SM
P4MM-NSM
ROOM=SAGE
PP43061
M-ST-SM
AA21
ROOM=TOUCH_B2BJ4300
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
SM
P4MM-NSM
ROOM=SAGE
PP43051
10UF
20%
ROOM=SAGE
0402-4
X5R-CERM
10V
C4323 1
2
X5R-CERM
0201
ROOM=SAGE
10%
25V
0.01UF
C4326 1
2
0.1UF
10%
6.3V
CERM-X5R
0201
ROOM=SAGE
C4318 1
2
ROOM=CUMULUS
SM
P2MM-NSMPP4302 1
ROOM=CUMULUS
SM
P2MM-NSMPP4301 1
ROOM=SAGE
20%
25V
TANT
0603-LLP
1UF-10OHM
C4315 1
2
ROOM=CUMULUS
SM
XW4301
1 2
10UF
0402-1
ROOM=SAGE
X5R-CERM
10V
20%
C43121
2
1/32W
ROOM=SAGE
1%
4.7
MF
01005
R4307
1 2
ROOM=SAGE
SAGE2-C06
CSP
U4300
C2 B3 F4 F8 E3 L5
D2 A3 F3 F6 H5
B2
K5
G1
H1
J1
K1
L1
G2
H2
J2
K2
L2
L3
K3
J3
H3
G3
L4
K4
J4
H4
G4
G6
H6
J6
K6
L6
G7
H7
J7
K7
L7
L8
K8
J8
H8
G8
L9
K9
J9
H9
G9
F9
F7
F5
G5
C1
D1
E4
D4
C4
B4
A4
A6
B6
C6
D6
E6
E8
D8
C8
B8
A8
E5
D5
C5
B5
A5
A7
B7
C7
D7
E7
E9
D9
C9
B9
A9
D3
B1
E1
J5
A1
A2
F1 E2
F2
C3
0.1UF
ROOM=SAGE
01005
6.3V
20%
X5R-CERM
C43271
2
SM
P4MM-NSM
ROOM=SAGE
PP43041
P4MM-NSM
ROOM=CUMULUS
SM PP43031
0402-1
10V
X5R-CERM
ROOM=CUMULUS
20%
10UF
C43021
2
ROOM=SAGE
10UH-0.32A-1.56OHM
PSB12101T-SM
L4301
1
2
10%
16V
X5R-CERM
0.1UF
ROOM=SAGE
0201
C4324 1
2
20%
0402
20V
TANT
ROOM=SAGE
0.33UF
C4314 1
2
1000PF
25V
10%
X7R-CERM
0201
ROOM=SAGE
C4320 1
2 25VX7R-CERM
10%
ROOM=SAGE
0201
1000PF
C4322 1
2
ROOM=SAGE
25V
X7R-CERM
0201
10%
1000PF
C4319 1
2 25V
10%
0201
ROOM=SAGE
X7R-CERM
1000PF
C4321 1
2
ROOM=CUMULUS
CUMULUS-C1
WLBGA
U4301
E3
D1
C7 C9 G
2
G1
D4
F2
F3
E4
F1
D3
D2
E1
B9
B8
A9
B7
B6
A8
B5
B4
A7
B3
A6
A3
A5
A4
B2
A2
C4
C3
E2
C6
D9
C2
G3
B1 C1 C8 C5 F4 A1
E9
E5
F7
E6
E7
F8
G9
D6
D7
D8
F9
D5
F6
F5
G4
E8
G8
G7
G6
G5
29 
29 
29 
29 
29 
29 
29 
33 29 28 9 8 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 26 
29 
29 
29 
29 26 
29 
29 
29 
29 
29 
28 
29 
29 
29 
29 
29 
29 
29 
29 14 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
20 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 29 
29 
29 
29 
29 
29 
29 
29 14 
29 
8 
8 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
28 21 20 14 13 12 9 8 7 6 5 3 
29 
33 29 28 9 8 
29 14 
29 
29 
29 
29 
20 
8 
8 
8 
29 28 
29 
29 
29 
29 
29 
29 
29 
28 26 
29 28 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
29 
8 
26 
8 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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DRAWING NUMBER SIZE
D
R
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SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
1Y
GND
2Y 2A
1A
VCC
PP
PP
NC
NC
NC
NC
PP
PP
BSYNC
DRV_OUT14
BOOST_EN
VCM_IN
AV
DD
H1
DRV_OUT3
AV
DD
H2
AV
DD
H3
AV
DD
H4
SNS_IN0
SNS_IN2
SNS_IN3
SNS_IN4
SNS_IN5
I2C_SDA
GCM_TEST
I2C_SCL
SNS_IN7
SNS_IN9
DRV_IN13
VD
DI
O
VC
PL
_F
VC
PL
VC
PH
SNS_OUT12
SNS_OUT0
SNS_OUT1
SNS_OUT2
SNS_OUT4
SNS_OUT3
SNS_OUT5
SNS_OUT6
SNS_OUT7
SNS_OUT8
SNS_OUT9
SNS_OUT11
SNS_OUT10
SNS_OUT13
SNS_OUT14
DRV_OUT1
DRV_OUT0
DRV_OUT2
DRV_OUT4
DRV_OUT5
DRV_OUT6
DRV_OUT7
DRV_OUT9
DRV_OUT8
DRV_OUT10
DRV_OUT11
DRV_OUT12
DRV_OUT13
DRV_OUT16
DRV_OUT15
DRV_OUT18
DRV_OUT19
DRV_OUT17
GO
AG
ND
4
AG
ND
5
AG
ND
3
AG
ND
2
AG
ND
1
SNS_IN1
SNS_IN8
SNS_IN6
SNS_IN14
SNS_IN13
SNS_IN12
SNS_IN11
SNS_IN10
DRV_IN3
DRV_IN4
DRV_IN2
DRV_IN1
DRV_IN0
DRV_IN9
DRV_IN8
DRV_IN7
DRV_IN6
DRV_IN5
DRV_IN14
DRV_IN15
DRV_IN12
DRV_IN11
DRV_IN10
DRV_IN16
DRV_IN18
DRV_IN17
DRV_IN19
VBIAS
L_Y
L_X
VCPH_REF/EN
VCPL_REF/EN
VBST_OUTH
VBST_OUTL
AV
DD
L1
AG
ND
6
PP
PP
VD
DH
IN8_0
VSTM_9
VSTM_8
VSTM_7
VSTM_6
VSTM_5
VSTM_4
VSTM_3
VSTM_2
VSTM_16
VSTM_15
VSTM_13
VSTM_12
VSTM_11
VSTM_10
VSTM_1
VSTM_0
VDDIO
VD
DC
O
RE
VD
DA
NA
RSTOVR*
IN9_0
IN7_0
IN6_0
IN5_0
IN4_0
IN3_0
IN2_0
IN14_1
IN14_0
IN13_0
IN12_0
IN11_0
IN10_0
IN1_0
H_SDO
H_SDI
H_SCLK
H_INT*
GPIO_4
GPIO_3
GPIO_2/SD
GPIO_1/CK
GND
VSTM_18
VSTM_19
TM_OVR
VSTM_17
IN0_0
H_CS*
VSTM_14
VD
DL
DO
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
CLKIN/RESET*
BCFG_RTCK
TM_ACS*
w 
w 
w 
. c
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 a
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i x
 . 
c o
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TRISTAR 2 (A3)
APN:343S0695
30 OF 60
45 OF 49
4.0.0
051-00648
PMU_TO_OWL_ACTIVE_READY
TRISTAR_CON_DETECT_L
PP3V0_TRISTAR
TRISTAR_TO_PMU_HOST_RESET
TRISTAR_TO_PMU_USB_BRICK_ID
UART_AP_TO_ACCESSORY_TXD
SWD_DOCK_TO_AP_SWCLK
UART_AP_DEBUG_RXD
90_USB_BB_DATA_N
90_USB_AP_DATA_P
TRISTAR_USB_BRICK_ID_R
90_MIKEYBUS_DATA_P
90_USB_AP_DATA_N
UART_AP_DEBUG_TXD
SWD_DOCK_BI_AP_SWDIO
90_USB_BB_DATA_P
90_TRISTAR_DP1_CONN_P
90_TRISTAR_DP1_CONN_N
90_TRISTAR_DP2_CONN_P
90_TRISTAR_DP2_CONN_N
TRISTAR_TO_TIGRIS_VBUS_OFFUART_ACCESSORY_TO_AP_RXD
90_MIKEYBUS_DATA_N
I2C1_AP_SCL
TRISTAR_BYPASS
I2C1_AP_SDA
TRISTAR_TO_AP_INT
PP_TRISTAR_PIN
PP_TRISTAR_ACC1
PP_TRISTAR_ACC2
PP5V0_USB
REVERSE_GATE
TRISTAR_TO_TIGRIS_VBUS_OFF
PP3V3_ACC
PP1V8_SDRAM
I/O:TRISTAR2
SYNC_DATE=N/ASYNC_MASTER=N/A
20%
X5R
1.0UF
6.3V
0201-1
ROOM=TRISTAR
C45041
2
6.3V
01005
X5R
ROOM=TRISTAR
0.01UF
10%
C45021
2
ROOM=TRISTAR
P3MM-NSM
SM PP45001
CBTL1610A3UK
ROOM=TRISTAR
WLCSP
CRITICAL
U4500
C5
E5
D5
C2
E6
E3
C4
C3
B2
B4
A2
A4
A6C1F5
B6
C6A5
B5
F6
D6
D4
D3
E4
E1
E2
F1
F2
D1
D2
B3
A3
B1
A1
F3 F4
20%
1UF
ROOM=TRISTAR
0201
CER-X5R
16V
C45031
2
23 
23 
CSD68822F4
CRITICAL
0402
ROOM=TRISTAR
Q4500
3
1
210K
5%
1/32W
ROOM=TRISTAR
01005
MF
R45001
2
31 3 
31 3 
31 3 
31 3 
31 3 
25 17 8 
25 17 8 
ROOM=PMU
01005
MF
1/32W
1%
6.34K
R4510
1 216 
0.01UF
01005
X5R
6.3V
10%
ROOM=PMU
C45101
2
26 16 9 5 
16 
16 8 
8 
8 
8 
8 
5 
5 
5 
5 
33 
33 
30 17 
20%
0.1UF
01005
X5R-CERM
6.3V
ROOM=TRISTAR
C45011
2
20%
X5R
1.0UF
ROOM=TRISTAR
6.3V
0201-1
C45001
2
33 31 26 15 
31 3 
31 3 
31 17 3 
30 17 
15 
33 26 24 17 16 15 14 12 8 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
PP
BRICK_ID
POW_GATE_EN*
BYPASS
SCL
INT
SDA
SWITCH_EN
HOST_RESET
CON_DET_L
DN2
DP2
DN1
DP1
ACC2
ACC1
P_IN
VD
D_
1V
8
VD
D_
3V
0
AC
C_
PW
R
JTAG_DIO
UART2_RX
JTAG_CLK
UART1_RX
UART2_TX
UART0_RX
UART1_TX
USB0_DN
UART0_TX
USB0_DP
USB1_DN
USB1_DP
DIG_DN
DV
SS
DV
SS
DV
SS
DIG_DPBI
BI
D
S
G
BI
BI
BI
BI
IN
BI
IN
OUT
IN
OUT
OUT
IN
OUT
IN
OUT
BI
OUT
BI
BI
BI
BI
OUT
w 
w 
w 
. c
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 i n
 a
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i x
 . 
c o
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LOWER MIC1
DOCK FLEX CONNECTOR
TRISTAR
AUDIO JACK
ANTENNA
SPEAKER
DOCK FLEX CONNECTOR THIS ONE ON MLB --->
516S00117 (PLUG)
516S00116 (RCPT)
31 OF 60
VOLTAGE=5.0V
46 OF 49
4.0.0
051-00648
CODEC_TO_HPHONE_HS4_CONN
LOWERMIC1_TO_CODEC_AIN1_CONN_PBB_LAT_GPIO2_CONN
90_TRISTAR_DP2_CONN_PCODEC_TO_HPHONE_HS3_REF_CONN
CODEC_TO_HPHONE_R_CONN
CODEC_TO_HPHONE_HS3_CONN
PP3V1_MESA_CONN
SPI_AP_TO_MESA_MOSI_CONN
PP_TRISTAR_ACC2_CONN
PP_TRISTAR_ACC1_CONN
TRISTAR_CON_DETECT_CONN_L
90_TRISTAR_DP2_CONN_N
90_TRISTAR_DP1_CONN_N
90_TRISTAR_DP1_CONN_P
BB_LAT_GPIO1_CONN
BB_LAT_GPIO2_CONN
PP3V0_LAT_CONN
HPHONE_TO_CODEC_DETECT_CONN
MESA_TO_AP_INT_CONN
BUTTON_MENU_KEY_CONN_L
SPI_AP_TO_MESA_SCLK_CONN
MESA_TO_BOOST_EN_CONN
SPI_MESA_TO_AP_MISO_CONN
PP11V3_MESA_CONN
SPEAKERAMP_TO_SPEAKER_OUT_NEG
SPEAKERAMP_TO_SPEAKER_OUT_POS
PP1V9_MESA_CONN
CODEC_TO_HPHONE_R
BB_LAT_GPIO2
SPEAKERAMP_TO_SPEAKER_OUT_NEG
PP3V0_LAT_CONN
PP_TRISTAR_ACC2
PP_CODEC_TO_LOWERMIC1_BIAS_CONN
PP_TRISTAR_ACC1_CONN
PP3V0_TRISTAR
CODEC_TO_HPHONE_HS4_REF_CONN
CODEC_TO_HPHONE_HS3_REF_CONN
LOWERMIC1_TO_CODEC_AIN1_CONN_P
TRISTAR_CON_DETECT_L
PP_CODEC_TO_LOWERMIC1_BIAS
LOWERMIC1_TO_CODEC_AIN1_P
LOWERMIC1_TO_CODEC_AIN1_N
TRISTAR_CON_DETECT_CONN_L
PP_TRISTAR_ACC2_CONN
CODEC_TO_HPHONE_HS3_REF
CODEC_TO_HPHONE_HS4_REF
CODEC_TO_HPHONE_L_CONN
CODEC_TO_HPHONE_R_CONN
CODEC_TO_HPHONE_L
CODEC_TO_HPHONE_HS3
CODEC_TO_HPHONE_HS4
CODEC_TO_HPHONE_HS3_CONN
HPHONE_TO_CODEC_DETECT_CONNHPHONE_TO_CODEC_DETECT
CODEC_TO_HPHONE_HS4_CONN
PP_TRISTAR_ACC1
LOWERMIC1_TO_CODEC_AIN1_CONN_N
BB_LAT_GPIO1 BB_LAT_GPIO1_CONN
SPEAKERAMP_TO_SPEAKER_OUT_POS
LOWERMIC1_BIAS_FILT_RET
PP_CODEC_TO_LOWERMIC1_BIAS_CONN
LOWERMIC1_TO_CODEC_AIN1_CONN_N
CODEC_TO_HPHONE_L_CONN
CODEC_TO_HPHONE_HS4_REF_CONN
PP5V0_USB
SYNC_DATE=N/A
I/O:DOCK FLEX B2B
SYNC_MASTER=N/A
120-OHM-210MA
01005
ROOM=DOCK_B2B
FL4620
12
ROOM=DOCK_B2B
01005
120-OHM-210MA
FL4624
1 2
ROOM=DOCK_B2B
6.8V-100PF
01005
NO_XNET_CONNECTION=1
DZ46101
2
ROOM=DOCK_B2B
6.8V-100PF
01005
NO_XNET_CONNECTION=1
DZ46041
2
FERR-33-OHM-0.8A-0.09-OHM
0201
ROOM=DOCK_B2B
FL4605
1 2
FERR-33-OHM-0.8A-0.09-OHM
0201
ROOM=DOCK_B2B
FL4604
1 2
ROOM=DOCK_B2B
5%
56PF
16V
NP0-C0G
01005
C46241
2
X7R-CERM
0201
220PF
10%
25V
ROOM=DOCK_B2B
C4655 1
2
ROOM=DOCK_B2B
01005
100PF
5%
35V
NP0-C0G
C4654 1
2
ROOM=DOCK_B2B
F-ST-SM
AA27D-S038VA1
CRITICAL
J4600
3940
4142
12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
3536
3738
0.1UF
10%
25V
X5R
0201
ROOM=DOCK_B2B
C4652 1
2
10%
25V
0.1UF
X5R
0201
ROOM=DOCK_B2B
C4651 1
2
120-OHM-210MA
01005
ROOM=DOCK_B2B
FL4608
1 2
16V
5%
56PF
NP0-C0G
ROOM=DOCK_B2B
01005
C46011
2
33 
16V
100PF
5%
ROOM=DOCK_B2B
01005
NP0-C0G
C46121
2
16V
56PF
NP0-C0G
01005
5%
ROOM=DOCK_B2B
C46001
2
FERR-33-OHM-0.8A-0.09-OHM
ROOM=DOCK_B2B
0201
FL4601
1 2
FERR-33-OHM-0.8A-0.09-OHM
0201
ROOM=DOCK_B2B
FL4600
1 2
220PF
X7R-CERM
10%
10V
ROOM=DOCK_B2B
01005
C46961
2
01005
X7R-CERM
10V
220PF
10%
ROOM=DOCK_B2B
C46971
2
10V
10%
X7R-CERM
220PF
ROOM=DOCK_B2B
01005
C46981
2
220PF
ROOM=DOCK_B2B
X7R-CERM
10%
10V
01005
C46991
2
600-OHM-25%-0.28A-0.75OHM
0201
ROOM=DOCK_B2B
FL4603
1 2
ROOM=DOCK_B2B
0201
600-OHM-25%-0.28A-0.75OHM
FL4602
1 2
30
3 
30
3 
30
3 
30
3 
ROOM=DOCK_B2B
10-OHM-1.1A
01005
FL4641
1 2
10-OHM-1.1A
01005
ROOM=DOCK_B2B
FL4642
1 2
ROOM=DOCK_B2B
01005
NP0-C0G-CERM
56PF
5%
25V
C4653 1
2X5R
10%
25V
ROOM=DOCK_B2B
0201
0.1UF
C4650 1
2
30 3 23 
23 
23 
23 
23 
23 
23 
23 
23 
33 
16V
ROOM=DOCK_B2B
NP0-C0G
01005
100PF
5%
C46421
2
100PF
ROOM=DOCK_B2B
16V
NP0-C0G
01005
5%
C46411
2
16V
ROOM=DOCK_B2B
NP0-C0G
01005
100PF
5%
C46201
2
01005
ROOM=DOCK_B2B
5%
100PF
NP0-C0G
16V
C46351
2
5%
ROOM=DOCK_B2B
100PF
NP0-C0G
01005
16V
C46341
2
ROOM=DOCK_B2B
01005
1.00K
1/32W
MF
5%
R4640
12
ROOM=DOCK_B2B
27PF
16V
NP0-C0G
01005
5%
C46401
2
01005
ROOM=DOCK_B2B
NO_XNET_CONNECTION=1
6.8V-100PF
DZ46031
2
ROOM=DOCK_B2B
01005
6.8V-100PF
NO_XNET_CONNECTION=1
DZ46021
2
ROOM=DOCK_B2B
6.8V-100PF
01005
NO_XNET_CONNECTION=1
DZ46011
2
1/32W
MF
3.3K
ROOM=DOCK_B2B
01005
5%
R4600
1 2
NO_XNET_CONNECTION=1
ROOM=DOCK_B2B
6.8V-100PF
01005
DZ46001
2
120-OHM-210MA
ROOM=DOCK_B2B
01005
FL4612
12
ROOM=DOCK_B2B
01005
120-OHM-210MA
FL4611
12
ROOM=DOCK_B2B
56PF
16V
NP0-C0G
01005
5%
C46111
2
ROOM=DOCK_B2B
16V
NP0-C0G
01005
5%
56PF
C46101
2
ROOM=DOCK_B2B
01005
120-OHM-210MA
FL4610
12
31 
31 
31 
31 
31 
31 
27 
27 
31 
31 
31 
31 
31 
31 
31 
27 
27 
27 
27 
27 
27 
31 25 
31 25 
27 
31 25 
31 
30 3 
31 
31 
33 30 26 15 
31 
31 
31 
24 
31 
31 
31 
31 
31 
31 
31 
30 3 
31 
31 
31 25 
24 
31 
31 
31 
31 
30 17 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
NC
IN
BI
BI
BI
BI
OUTIN
IN
OUT
OUT
BI
BI
OUT
OUT
OUT
IN
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
STROBE:
MODULE NTC
ANC REF MIC
HOLD
RINGER
WARM LED
COOL LED
VOL UP/DOWN
BUTTONS:
MIC2
BUTTON FLEX
THIS ONE ON MLB --->
BUTTON FLEX CONNECTOR
516S1041 (RCPT)
516S1040 (PLUG)
32 OF 60
47 OF 49
4.0.0
051-00648
PP_LED_DRIVER_COOL_LED
BUTTON_VOL_UP_CONN_L
VIBE_RETURN
REARMIC2_TO_CODEC_AIN3_CONN_N
REARMIC2_TO_CODEC_AIN3_CONN_P
PP_CODEC_TO_REARMIC2_BIAS_CONN
LED_MODULE_NTC_CONN
BUTTON_VOL_DOWN_CONN_L
BUTTON_RINGER_A_CONN
PP3V1_VIBE
BUTTON_HOLD_KEY_CONN_L
PP_LED_DRIVER_WARM_LED
PP_CODEC_TO_REARMIC2_BIAS_CONN
REARMIC2_TO_CODEC_AIN3_CONN_PREARMIC2_TO_CODEC_AIN3_P
REARMIC2_TO_CODEC_AIN3_CONN_N
BUTTON_HOLD_KEY_L
BUTTON_RINGER_A BUTTON_RINGER_A_CONN
BUTTON_HOLD_KEY_CONN_L
BUTTON_VOL_DOWN_L
BUTTON_VOL_UP_L
REARMIC2_TO_CODEC_AIN3_N
BUTTON_VOL_UP_CONN_L
PP_LED_DRIVER_COOL_LED
LED_MODULE_NTC
BUTTON_VOL_DOWN_CONN_LPP_CODEC_TO_REARMIC2_BIAS
LED_MODULE_NTC_CONN
VIBE_PWM_G
PP_LED_DRIVER_WARM_LED
AP_TO_VIBE_TRIG
I/O:BUTTON FLEX B2B
SYNC_MASTER=N/A SYNC_DATE=N/A
BUTTON_B2B
CRITICAL
F-ST-SM
205847-018
J4700
19
20
21
22
12
34
56
78
910
1112
1314
1516
1718
BUTTON_B2B
20%
6.3V
402
X5R-CERM1
4.7UF
C47161
2
BUTTON_B2B
01005
16V
NP0-C0G
100PF
5%
C47151
2
BUTTON_B2B
100PF
5%
16V
NP0-C0G
01005
C47141
2
100PF
5%
16V
NP0-C0G
01005
BUTTON_B2B
C47031
2
1%
10K
01005
MF
1/32W
BUTTON_B2B
R47011
2
SM
XW4701
1 2 DMN3730UFB4
DFN1006H4-3
BUTTON_B2B
Q4701
3
1
2
BAS40LP
LLP-DFN1006-2
BUTTON_B2B
D4701
A
K
ROOM=BUTTON_B2B
5%
100PF
NP0-C0G
16V
01005
C47201
2
ROOM=BUTTON_B2B
5%
100PF
NP0-C0G
16V
01005
C47001
2
22 
16 8 
ROOM=BUTTON_B2B
0201
5.5V-6.2PF
DZ4711
1
2
ROOM=BUTTON_B2B
5.5V-6.2PF
0201
DZ4710
1
2
23 
23 
5%
6.3V
NP0-C0G
ROOM=BUTTON_B2B
0201
27PF
C4710 1
2
8 
16 8 
16 8 
5%
6.3V
0201
ROOM=BUTTON_B2B
NP0-C0G
27PF
C4711 1
2
01005
ROOM=BUTTON_B2B
51.1K
MF
1%
1/32W
R47201
2
5%
100PF
01005
NP0-C0G
16V
ROOM=BUTTON_B2B
C4721 1
2
01005
ROOM=BUTTON_B2B
120-OHM-210MA
FL4720
1 2
5%
01005
NP0-C0G
ROOM=BUTTON_B2B
27PF
16V
C47221
2
5%
100PF
01005
NP0-C0G
16V
ROOM=BUTTON_B2B
C4723 1
2
5%
01005
NP0-C0G
ROOM=BUTTON_B2B
16V
27PF
C47241
2
120-OHM-210MA
01005
ROOM=BUTTON_B2B
FL4702
12
01005
ROOM=BUTTON_B2B
120-OHM-210MA
FL4701
12
5%
NP0-C0G
16V
ROOM=BUTTON_B2B
01005
56PF
C47021
2
ROOM=BUTTON_B2B
5%
01005
NP0-C0G
56PF
16V
C47011
2
120-OHM-210MA
01005
ROOM=BUTTON_B2B
FL4700
12
5%
100PF
01005
16V
NP0-C0G
ROOM=BUTTON_B2B
C4713 1
2
ROOM=BUTTON_B2B
01005
120-OHM-210MA
FL4713
1 2
5%
01005
16V
ROOM=BUTTON_B2B
NP0-C0G
100PF
C4712 1
2
01005
120-OHM-210MA
ROOM=BUTTON_B2B
FL4712
1 2
ROOM=BUTTON_B2B
01005
120-OHM-210MA
FL4711
1 2
ROOM=BUTTON_B2B
12V-33PF
01005-1
DZ47131
2
12V-33PF
01005-1
ROOM=BUTTON_B2B
DZ47121
2
01005
1/32W
0%
MF
0.00
ROOM=BUTTON_B2B
R4710
1 2
32 22 
32 
32 
32 
32 
32 
32 
32 
15 
32 
32 22 
32 
32 
32 
32 
32 
32 
32 22 
32 
24 
32 
32 22 
8 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
S
D
SYM_VER_1
G
OUT
OUT
OUT
OUT
OUT
OUT
OUT
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
BASEBAND, WLAN, BT & STOCKHOLM
33 OF 60
49 OF 49
4.0.0
051-00648
PP3V0_TRISTAR
PP1V8_SDRAM
PMU_TO_BB_USB_VBUS_DETECT
UART_AP_TO_STOCKHOLM_TXD
UART_STOCKHOLM_TO_AP_CTS_L
UART_AP_TO_STOCKHOLM_RTS_L
PMU_TO_STOCKHOLM_EN
AP_TO_STOCKHOLM_DWLD_REQUEST
STOCKHOLM_TO_PMU_HOST_WAKE
UART_BB_TO_AP_CTS_L
UART_AP_TO_BB_TXD
UART_BB_TO_AP_RXD
UART_AP_TO_WLAN_TXD
PMU_TO_WLAN_REG_ON
90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_TXD_N
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_CTS_L
UART_WLAN_TO_AP_RXD
LCM_TO_AP_HIFA_BSYNC
I2S_BB_TO_AP_DIN
PMU_TO_BB_PMIC_RESET_L
BB_TO_AP_RESET_DETECT_L
UART_OWL_TO_BB_TXD
I2S_AP_TO_BB_DOUT
I2S_AP_TO_BB_LRCLK
AP_TO_BB_RADIO_ON_L
PMU_TO_BT_REG_ON
90_USB_BB_DATA_P
BB_TO_PMU_HOST_WAKE_L
AP_TO_BB_HSIC_HOST_RDY
BB_TO_AP_HSIC_DEVICE_RDY
45_I2S_AP_TO_BB_BCLK
45_PMU_TO_WLAN_CLK32K
OWL_TO_WLAN_CONTEXT_B
OWL_TO_WLAN_CONTEXT_A
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_REFCLK_N
PCIE_WLAN_TO_AP_CLKREQ_L
PCIE_AP_TO_WLAN_DEV_WAKE
UART_BT_TO_AP_RXD
90_USB_BB_DATA_N
BB_TO_PMU_AMUX_SMPS4
BB_TO_PMU_AMUX_LDO11
BB_TO_PMU_AMUX_LDO5
I2S_BT_TO_AP_DIN
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_TXD
BT_TO_PMU_HOST_WAKE
AP_TO_BT_WAKE
45_I2S_AP_TO_BT_BCLK
I2S_AP_TO_BT_LRCLK
WLAN_TO_PMU_HOST_WAKE
PCIE_AP_TO_WLAN_RESET_L
WLAN_TO_PMU_PCIE_WAKE_L
AP_TO_BB_WAKE_MODEM
AP_TO_BB_RESET_L
50_AP_BI_BB_HSIC0_STB
I2S_AP_TO_BT_DOUT
AP_TO_STOCKHOLM_DEV_WAKE
BB_LAT_GPIO1
BB_LAT_GPIO2
AP_TO_BB_COREDUMP
BB_TO_LED_DRIVER_GSM_BURST_IND
AP_TO_BB_MESA_ON
BB_TO_AP_IPC_GPIO
UART_BB_TO_OWL_RXD
SWD_AP_BI_BB_SWDIO
SWD_AP_PERIPHERAL_SWCLK
UART_AP_TO_BB_RTS_L
BB_TO_AP_GPS_TIME_MARK
PP_BATT_VCC
PP_VCC_MAIN BB_TO_PMU_AMUX_SMPS1
PP1V8_SDRAM
UART_STOCKHOLM_TO_AP_RXD
50_AP_BI_BB_HSIC0_DATA
BASEBAND:RADIO SYMBOL
SYNC_DATE=N/ASYNC_MASTER=N/A
RF
I566
56 31 30 26 15 
36 8 
36 8 
36 8 
36 8 
40 13 9 
36 9 
36 29 28 9 8 
41 31 
41 31 
36 16 
57 16 
36 8 
36 8 
36 8 
41 8 
57 8 
58 57 56 
33 30 26 24 17 16 15 14 12 8
36 16 
58 57 56 
33 30 26 24 17 16 15 14 12 8
36 8 
36 8 
57 6 
57 6 
36 6 
36 6 
36 6 
36 6 
57 6 
57 6 
36 8 
36 8 
58 26 25 24 22 21 17 15 14 
51 18 17 3 
36 8 
36 16 
36 8 
36 8 
36 16 
36 8 
36 9 
36 9 
36 16 
36 8 
36 8 
36 8 
36 16 
36 8 
36 8 
36 8 
36 9 
36 8 
36 8 
36 8 
36 8 
36 7 
36 16 
58 8 
36 5 
36 8 
41 26 22 
36 16 
36 8 
36 16 
36 16 
36 16 
36 30 
36 30 
36 9 
36 8 
36 16 
36 5 
36 8 
36 16 
36 8 
36 8 
36 8 
36 16 
36 8 
41 8 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
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SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SHARED POWER
ANTENNA STOCKHOLM
RADIO_MLB
BASEBAND WLAN
N69 CELLULAR/WLAN/BT/STOCKHOLM SUBDESIGN SYMBOL
BLUETOOTH
50_BB_HSIC_DATA
PAC_VDD_3V0
PP_STOCKHOLM_1V8_S2R
BB_USB_VBUS
RFFE_VIO_S2R
PP_WL_BT_VDDIO_AP
STOCKHOLM_UART_TXD
STOCKHOLM_UART_RXD
STOCKHOLM_UART_RTS
STOCKHOLM_UART_CTS
AP_TO_STOCKHOLM_EN
AP_TO_STOCKHOLM_FW_DWLD_REQ
STOCKHOLM_TO_PMU_HOST_WAKE
BB_UART_RTS_L
BB_UART_RXD
BB_UART_TXD
WLAN_UART_RXD
WLAN_REG_ON
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDN
WLAN_UART_CTS_L
WLAN_UART_RTS_L
WLAN_UART_TXD
BB_FORCE_PWM
BB_I2S_TXD
RF_PMIC_RESET_L
BB_RESET_DET_L
BB_OTHER_RXD
BB_I2S_RXD
BB_I2S_WS
RADIO_ON_L
BT_REG_ON
90_BB_USB_P
BB_WAKE_HOST_L
BB_HOST_RDY
BB_DEVICE_RDY
BB_I2S_CLK
CLK32K_AP
OSCAR_CONTEXT_B
OSCAR_CONTEXT_A
90_WLAN_PCIE_TDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_RDP
90_WLAN_PCIE_REFCLK_N
WLAN_PCIE_CLKREQ_L
PCIE_DEV_WAKE
BT_UART_TXD
90_BB_USB_N
ADC_SMPS4
ADC_PP_LDO11
ADC_PP_LDO5
ADC_SMPS1
BT_PCM_OUT
BT_UART_CTS_L
BT_UART_RTS_L
BT_UART_RXD
HOST_WAKE_BT
WAKE_BT
BT_PCM_CLK
BT_PCM_SYNC
HOST_WAKE_WLAN
WLAN_PCIE_PERST_L
WLAN_PCIE_WAKE_L
AP_WAKE_MODEM
BB_RST_L
50_BB_HSIC_STROBE
BT_PCM_IN
AP_TO_STOCKHOLM_DEV_WAKE
BB_LAT_GPIO1
BB_LAT_GPIO2
BB_CORE_DUMP
GSM_TXBURST_IND
AP_TO_BB_MESA_ON
BB_IPC_GPIO1
BB_OTHER_TXD
BB_JTAG_TMS
BB_JTAG_TCK
BB_UART_CTS_L
BB_GPS_SYNC
PP_BATT_VCC
PP_VCC_MAIN
IN
IN
IN
OUT
OUT
IN
BI
IN
OUT
OUT
OUT
OUT
IN
OUT
OUT
IN
OUT
IN
IN
IN
IN
OUT
IN
BI
OUT
OUT
IN
IN
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
OUT
OUT
OUT
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
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8/19/2015
N69 RADIO_MLB SUBDESIGN - EVT
34 OF 60
BASEBAND (1 OF 2)
BASEBAND (1 OF 2)
MOBILE DATA MODEM (2 OF 2)
STOCKHOLM
1
LAST_MODIFICATION=Wed Aug 19 10:34:24 2015
ANTENNA SWITCH
HIGH BAND PAD
HIGH BAND SWITCH
BASEBAND PMU (2 OF 2)
RF TRANSCEIVER (2 OF 3)
page1
2G PA
MID BAND PAD
RX DIVERSITY
RX DIVERSITY (2)
GPS
ANTENNA FEEDS
WIFI/BT: MODULE AND FRONT END
OMIT_TABLE_RF
Radio Subdesign Ports
34
35
36
37
38
39
40
41
42
43
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
3
4
6
7
8
9
10
11
12
13
15
20
21
22
23
24
30
31
32
33
35
36
37
40
41
42
43
45
VERY LOW BAND PAD
LOW BAND PAD
44
5
BASEBAND PMU(1 0F 2)
AP INTERFACE & DEBUG CONNECTORS
CELL:ALIASES
RF TRANSCEIVER (3 OF 3)
QFE DCDC
RF TRANSCEIVER (1 0F 3)
SCH,MLB,N69
051-00648
2015-08-2400047524174 ENGINEERING RELEASED
1 OF 55
4.0.0
?
SYNCCONTENTSPAGE DATE<CSA>
PROPRIETARY PROPERTY OF APPLE INC.
REVISION
ECNREV DESCRIPTION OF REVISION
DRAWING TITLE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
CK
APPD
2 1
1245678
B
D
6 5 4 3
C
A
PAGE
C
A
D
DATE
R
SHEET
D
SIZEDRAWING NUMBER
BRANCH
7
B
3
 II NOT TO REPRODUCE OR COPY IT
 IV ALL RIGHTS RESERVED
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
8
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
NOTICE OF PROPRIETARY PROPERTY:
Apple Inc.
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
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BLANK PAGE
35 OF 60
30 OF 55
4.0.0
051-00648
CELL:ALIASES
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
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CORONA PCIE RX/TX TP
OPTIONAL
SIM CARD CONNECTOR
UNDER THE SIM
SIM CARD ESD PROTECTION
NOT UNDER SIM
AP INTERFACE & DEBUG CONNECTORS
36 OF 60
PP3132_RF
PP3131_RF
PP3140_RF
PP3139_RF
PP3138_RF
PP3104_RF
PP3112_RF
PP3111_RF
PP3116_RF
PP3115_RF
PP3173_RF
PP3124_RF
PP3123_RF
PP3122_RF
PP3121_RF
PP3128_RF
PP3127_RF
PP3102_RF
PP3101_RF
PP3199_RF
PP3198_RF
PP3197_RF
PP3196_RF
PP3195_RF
PP3194_RF
PP3193_RF
PP3192_RF
PP3172_RF
PP3171_RF
PP3170_RF
PP3191_RF
PP3190_RF
C3102_RF
VR3101_RF
PP3158_RF
PP3157_RF
J3100_RF
PP3186_RF
PP3185_RF
PP3162_RF
PP3163_RF
PP3129_RF
PP3174_RF
PP3155_RF
PP3154_RF
PP3153_RF
PP3152_RF
PP3120_RF
PP3119_RF
PP3105_RF
36 41 
DZ3102_RF
33 60 
33 60 
33 60 
33 60 
R3104_RFR3103_RFR3102_RF
C3101_RF
36 58 
XW3104_RF
XW3103_RF
XW3102_RF
XW3101_RF
36 41 
36 41 
36 41 
R3101_RF
J3101_RF
31 OF 55
4.0.0
051-00648
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
4
3
2
1
5
1
1
50 49
48 47
46 45
44 43
42 41
40 39
38 37
36 35
34 33
32 31
30 29
28 27
26 25
24 23
22 21
20 19
18 17
16 15
14 13
12 11
10 9
8 7
6 5
4 3
2 1
54
53
52
51
1
1
1
1
1
1
1
1
1
1
1
1
1
21
2
1
2
1
2
1
2
1
21
21
21
21
2
1
1
6
2 7
513111098
123
WIFI_BT
WIFI_BT
WIFI_BT
WIFI_BT
BB_UART_RTS_L
SM
P2MM-NSM
BB_COEX_UART_TXD
BB_DEBUG_ERROR
SM
P4MM-NSM
AXE650124
STOCKHOLM_TO_BBPMU_CLK_REQ
SM
STOCKHOLM
P2MM-NSM
SM
P2MM-NSM
P4MM-NSM
BB_DEBUG_STATUS
P4MM-NSM
SM
P4MM-NSM
SM
P4MM-NSM
BB_JTAG_TMSSM
BB_JTAG_TCK_INSM
P4MM-NSM
SM
BB_USB_VBUS
90_BB_USB_N
90_BB_USB_P
P4MM-NSM
P4MM-NSM
MDM_CLKSM
SPMI_CLKSM
P4MM-NSM
SPMI_DATASM
P4MM-NSM
50_BB_HSIC_DATASM
50_BB_HSIC_STROBE
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
WIFI_BT
SM
P2MM-NSM
SM
WIFI_BT
P2MM-NSM
STOCKHOLM
SM
P2MM-NSM
STOCKHOLM
SM
WIFI_BT
P2MM-NSM
WIFI_BT
P2MM-NSM
SM
P2MM-NSM
SM
P2MM-NSM
SM
WIFI_BT
WLAN_UART_RXD
WLAN_UART_CTS_L
WLAN_UART_RTS_L
SM
P2MM-NSM
SM
WIFI_BT
SM
P2MM-NSM
SM
P2MM-NSM
SM
WIFI_BT
P2MM-NSM
P2MM-NSM
SM
WIFI_BT
P2MM-NSM
WIFI_BT
SM
P2MM-NSM
SM
WIFI_BT
P2MM-NSM
SM
WIFI_BT
P2MM-NSM
WIFI_BT
SM
P2MM-NSM
SM
WIFI_BT
P2MM-NSM
SM
STOCKHOLM
P2MM-NSM
SM
STOCKHOLM
P2MM-NSM
WIFI_BT
SM
P2MM-NSM
WIFI_BT
SM
P2MM-NSM
WIFI_BT
SM
P2MM-NSM
SM
P2MM-NSM
SM
WIFI_BT
BT_PCM_CLK
BT_PCM_SYNC
BB_UART_RXD
90_WLAN_PCIE_TDP
AP_TO_BB_MESA_ON
BB_FORCE_PWM
PP_LDO5
VREG_SMPS4_2V075 ADC_SMPS4
ADC_SMPS1
ADC_PP_LDO11
PP_LDO5
PP_LDO11
VREG_SMPS1_0V90
WATCHDOG_DISABLE
BOOT_HSIC_USB
BOOT_HSIC
PP_LDO11
BB_SIM_RESET
BB_SIM_CLK BB_SIM_DETECT
90_WLAN_PCIE_RDN
BB_SIM_RESET
SYNC_MASTER=N/A SYNC_DATE=N/A
AP INTERFACE & DEBUG CONNECTORS
5%
10V
01005
100PF
NP0-C0G
5.5V-6.2PF
0201
MF
1/32W
RADIO_BB
1%
01005
10K10K
1%
1/32W
RADIO_BB
01005
MF
01005
1%
10K
1/32W
MF
RADIO_BB
6.3V
0201
2.2UF
20%
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
1%
MF
1/32W
F-ST-SM
SIM-CARD-N48
377S0163 ALTERNATE VR3101 ESD ALTERNATIVE371S00044
BB_UART_CTS_L
BB_UART_TXD
01005
BB_SIM_CLK
STOCKHOLM_TO_SIM_SWP
STOCKHOLM_TO_SIM_SWP
M-ST-SM
NOSTUFF
BB_RST_L
BB_RESET_DET_L
BB_WAKE_HOST_L
BB_DEVICE_RDY
BB_I2S_WS
BB_I2S_RXD
BB_SIM_RESET
BB_SIM_CLK
PP_LDO5
PP_LDO11
BB_I2S_TXD
AP_TO_STOCKHOLM_FW_DWLD_REQ
AP_TO_STOCKHOLM_EN
BB_OTHER_TXD
BB_OTHER_RXD
BB_COEX_UART_RXD
RF_PMIC_RESET_L
PS_HOLD_PMIC
STOCKHOLM_UART_TXD
STOCKHOLM_UART_CTS
STOCKHOLM_UART_RTS
STOCKHOLM_TO_PMU_HOST_WAKE
BB_CORE_DUMP
BB_SIM_DETECT
BB_JTAG_RST_L
BB_JTAG_TDO
BB_HOST_RDY
WLAN_JTAG_SWDCLK
15.00K
BB_SIM_DATA
X5R-CERM
ESD5004
LGA-1
BB_SIM_DATA
90_WLAN_PCIE_RDP
WLAN_REG_ON
HOST_WAKE_WLAN
WLAN_UART_TXD
RFFE1_CLK
RFFE2_CLK
BT_UART_CTS_L
BT_UART_RTS_L
WLAN_JTAG_SWDIO
BB_SIM_DATA BB_GPS_SYNC
PMIC_RESOUT_L
BT_PCM_OUT
RADIO_ON_L
BB_I2S_CLK
90_WLAN_PCIE_TDN
RFFE1_DATA
BB_SIM_DETECT
CLK32K_AP
ADC_PP_LDO5
45_BBPMU_TO_STOCKHOLM_19P2M_CLK
STOCKHOLM_TO_SIM_SWP
OSCAR_CONTEXT_B
BB_JTAG_TDI
BB_JTAG_TRST_L
OSCAR_CONTEXT_A
STOCKHOLM_UART_RXD
BT_UART_TXD
BT_UART_RXD
BT_REG_ON
HOST_WAKE_BT
BT_PCM_IN
WAKE_BT
27 8 
27 
8 
7 
27 7 
27 
27 8 
7 5 
7 5 
5 7 
27 7 
27 7 
12 
27 8 
27 8 
24 
25 
27 8 
27 5 
25 6 4 3 
4 
25 6 4 3 
12 11 10 8 7 6 4 3 
6 4 
8 
8 
8 
11 10 8 7 6 4 3 
24 
27 
8 3 
8 3 
8 3 
3 
24 
8 
27 
27 
24 
7 
8 3 
25 
7 
7 
7 
8 
25 3 
25 27 3 
25 27 3 
27 25 3 
25 27 3 
7 5 
5 
27 5 
8 
8 24 
8 27 
27 8 
27 25 
27 
5 
12 11 10 8 7 6 4 3 
25 6 4 3 
8 3 
8 3 
8 3 
8 27 
8 27 
8 
27 8 
27 8 
8 
5 
8 
27 8 
3 5 
24 
5 25 
27 
19 18 8 
17 16 15 14 13 12 8 
21 
17 16 14 13 12 8 
24 27 
24 27 
24 
27 24 
24 
27 
24 
24 
27 
27 
27 24 
27 
27 
27 
24 
24 
27 
27 
8 24 
27 27 
27 
24 24 
27 
15 
24 
27 
24 
8 27 
27 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
PART NUMBER
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
TABLE_ALT_ITEM
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
BI
OUT
OUT
OUT
OUT
BI
IN
IN
OUT
I/O
DETECT
GND SWP
VCC
RST
CLK
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1235MA
FOOTPRINT SAME AS 138S0716
SWITCHERS BULK CAPS
VREG_RX
VREG_TX
VREG_IO
VREG_SIM
1100MA
550MA
1350MA
SWITCHERS OUTPUT CAPS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
BASEBAND PMU (1 OF 2)
FOOTPRINT SAME AS 138S0716
051-00648
4.0.0
32 OF 55
37 OF 60
C3221_RFC3216_RF
C3220_RF
C3219_RF
C3218_RF
C3217_RF
C3222_RFC3223_RFC3224_RF
C3232_RFC3230_RF C3240_RFC3238_RFC3239_RFC3237_RFC3231_RFC3229_RF
L3204_RF
L3203_RF
L3201_RF
C3213_RFC3211_RFC3210_RFC3209_RFC3202_RF
C3270_RF
U_PMICRF_RF
40 
33 37 
46 
57 
58 
60 
3337 46 
57 58 
60 
3337 46 
57 58 
60 
3337 46 
57 58 
60 
3337 46 
57 58 
60 
47 48 56 
39 56 
39 
36 39 40 41 43 44 45 58 
39 
39 
43 44 
39 41 
36 39 
39 
38 39 
39 
39 43 44 
L3202_RF
36 37 
37 
37 
36 37 39 
C3215_RFC3214_RFC3212_RFC3208_RFC3206_RFC3205_RFC3204_RFC3203_RFC3201_RF
C3228_RF
C3226_RF
C3227_RF
VOLTAGE=4.50V
VOLTAGE=2.95V
VOLTAGE=1.80V
VOLTAGE=4.50V
VOLTAGE=0.95V
VOLTAGE=1.80V
VOLTAGE=5.0V
VOLTAGE=4.50V
VOLTAGE=1.80V
VOLTAGE=1.20V
VOLTAGE=2.05V
VOLTAGE=1.90V
VOLTAGE=1.225V
VOLTAGE=1.80V
VOLTAGE=3.075V
VOLTAGE=0.90V
VOLTAGE=4.50V
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
21
21
2
1
2
1
2
1
2
1
2
1
2
1
12
6
58
53
93
16
11
74
23
62
82
27
91
28
34
33
9
83
71
3
10
48
59
68
8
7
86
52
54
43
85
1
47
94
88
22
38
72
77
4
2
92
26
21
15
49
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
0402-1
PP_VCC_MAIN
6.3V
20%
X5R
15UF
6.3V
20%
X5R
15UF
0402-1
RADIO_PMIC
1.0UF
VREG_XO_PMIC
VBATT_S2
VBATT_S1
PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S2
VREG_SMPS1_0V90
VREG_SMPS3_0V95
PP_VCC_MAIN
PP_VSW_S2
PP_LDO13
PP_LDO5
VREG_SMPS4_2V075
VREG_SMPS4_2V075
VREG_SMPS4_2V075
VREG_SMPS2_1V25
PP_VCC_MAIN
MAKE_BASE=TRUE
MDM_VREF_LPDDR2
MAKE_BASE=TRUE
PP_VCC_MAIN
VBATT_S1
VREG_SMPS2_1V25
PP_VSW_S1
REF_BYP
AVDD_BYP
VBATT_S3
VBATT_S2
VBATT_S1
VREG_RF_CLK_BYP
VREG_SMPS2_1V25
VREG_SMPS3_0V95 VREG_SMPS4_2V075
MAKE_BASE=TRUE
PP_VCC_MAIN VBATT_S3
VBATT_S3
VBATT_S4
VBATT_S4
PP_VSW_S3
PP_LDO12
PP_LDO11
PP_LDO14_RFSW
VREG_SMPS4_2V075
VREG_SMPS3_0V95
PP_VSW_S4
PP_LDO3
PP_LDO9
PP_LDO8
PP_LDO7
PP_LDO1
PP_LDO2
PP_LDO4
PP_LDO10
VREG_SMPS1_0V90
VBATT_S4
BASEBAND PMU (1 0F 2)
0402-1
20%
6.3V
X5R
15UF
0402-1
15UF
6.3V
20%
X5R
0402-1
15UF
20%
X5R
6.3V
0402-1
15UF
20%
X5R
6.3V
0201
2.2UF
X5R-CERM
RADIO_PMIC
6.3V
20%
2.2UF
20%
6.3V
X5R-CERM
0201
RADIO_PMICRADIO_PMIC
2.2UF
X5R-CERM
6.3V
0201
20%
20%
6.3V
RADIO_PMIC
20UF
CERM-X5R
0402
20%
6.3V
20UF
CERM-X5R
0402 0402
CERM-X5R
20%
6.3V
RADIO_PMIC
20UF
0402
20%
6.3V
RADIO_PMIC
20UF
CERM-X5R
0402
20%
6.3V
RADIO_PMIC
20UF
CERM-X5R
20UF
CERM-X5R
0402
20%
6.3V
RADIO_PMIC
0402
CERM-X5R
20%
6.3V
RADIO_PMIC
20UF
CERM-X5R
6.3V
0402
20UF
RADIO_PMIC
20%
MAKK2016-SM
2.2UH-20%-1.5A-0.16OHM
MAKK2016-SM
2.2UH-20%-1.5A-0.16OHM
MAKK2016-SM
2.2UH-20%-1.5A-0.16OHM
RADIO_PMIC
CERM-X5R
0402-9
20%
10UF
6.3V
CERM-X5R
0402-9
RADIO_PMIC
20%
10UF
6.3V
0402-9
CERM-X5R
RADIO_PMIC
20%
10UF
6.3V
CERM-X5R
0402-9
RADIO_PMIC
20%
10UF
6.3V
RADIO_PMIC
CERM-X5R
20%
10UF
0402-9
6.3V
NP0-C0G
16V
5%
100PF
RADIO_PMIC
01005
BGA
PM8019
25 
0806
2.2UH-20%-1.2A-0.15OHM
RADIO_PMIC
0201-1
X5R-CERM
20%
1.0UF
RADIO_PMIC
10V
0201-1
RADIO_PMIC
X5R-CERM
20%
1.0UF
10V
0201-1
RADIO_PMIC
X5R-CERM
20%
1.0UF
10V
0201-1
RADIO_PMIC
X5R-CERM
20%
1.0UF
10V
0201-1
RADIO_PMIC
X5R-CERM
20%
1.0UF
10V
0201-1
RADIO_PMIC
20%
X5R-CERM
1.0UF
10V
0201-1
X5R-CERM
20%
RADIO_PMIC
1.0UF
10V
RADIO_PMIC
20%
X5R-CERM
1.0UF
0201-1
10V
20%
RADIO_PMIC
1.0UF
X5R-CERM
0201-1
10V
10V
X5R-CERM
RADIO_PMIC
20%
1.0UF
0201-1
0201-1
20%
10V
RADIO_PMIC
X5R-CERM
0.1UF
01005
X5R
20%
4V
RADIO_PMIC
27 25 24 13 4 
4 
4 
4 
6 
4 
3 
4 
4 3 
4 3 
4 3 
4 
4 
4 
4 
4 
4 
4 
43 
4 
4 
4 
4 
4 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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DRAWING NUMBER SIZE
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SHEET
PAGE TITLE
C
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PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NC
REG
SYM 5 OF 5
VDD_XO_RFC
VREG_L9
VREG_RFCLK
VREF_DDR2
GND
GND_REF
VDD_INT_BYP
VDD_S2
VDD_S2
VDD_S4
VDD_S3
VDD_S1
VDD_L12
VDD_L10
VDD_L9
VDD_L7_8_11
VDD_L2_3
VDD_L1
VIN_VPH2
VIN_VPH1
REF_BYP
VREG_L14
VREG_L13
VREG_L12
VREG_L11
VREG_L10
VREG_L8
VREG_L7
VREG_L6
VREG_L5
VREG_L4
VREG_L2
VREG_L3
VREG_L1
VSW_S4_2
VSW_S4_1
VREG_S4
VSW_S3_1
VSW_S3_2
VREG_S3
VSW_S2
VREG_S2
VSW_S1_2
VSW_S1_1
VREG_S1
VREG_XO
OUT
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
w 
w 
w 
. c
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 i n
 a
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i x
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c o
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IN PARALLEL
WITH 10M
N69/69H PRE-PROTO
U404
L400
C401
R411
 XW <2.0MM FROM XTAL GROUND PATCH
REVISIONREVISION
0.5V N69 
SPARE
SKU_ID
SPARE
0.70V
BOARD_ID
0.00V
0.50V
N69/69H EVT1
N69/69H PROTO1
N69/69H EVT2
N69H1.1V
BASEBAND PMU (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
N69/69H DVT
N69/69H PROTO2
TO GND
0.90V
CALCULATE
1.30V
SPARE
N69/69H PVT
1.40V
1.50V
1.60V
1.10V
BB_GPS_ENABLE
1.70V
1.10V(EVT)
4.0.0
051-00648
38 OF 60
33 OF 55
R3305_RF
R3306_RF 33 36 60 
R3312_RF
XW3301_RF
U_PMICRF_RF
U_PMICRF_RF
U_PMICRF_RF
U_PMICRF_RF
C3303_RF
R3311_RF
Y3301_RF
41 
36 58 
37 38 39 
41 
39 
33 36 60 
R3301_RF
36 40 
R3309_RF
40 
40 
37 38 39 
R3308_RF
C3301_RF
40 
R3307_RF
3336 
60 
36 40 
36 40 
3336 
60 
36 40 
2
1
2
1
2
1
21
17
63
87
5
69
61
60
51
50
41
40
36
84
90
57
79
78
67
64
80
32
42
46
73
37
24
35
44
18
29
39
25
14
19
55
30
13
76
81
20
65
31
75
66
45
56
89
70
21
2
1
4
3
2
1
21
21
21
2
1
21
STOCKHOLM_TO_BBPMU_CLK_REQ
150K
MF
01
00
5
1%
1/
32
W
90.9K M
F
01
00
5
1%
1/
32
W
PP_LDO3
SKU_ID
BOARD_ID
45_BBPMU_TO_STOCKHOLM_19P2M_CLK
01005
1000PF
RADIO_PMIC
1/32W
20.0K
5% MF
01005
RADIO_PMIC
01005
6.3V
10%
X5R-CERM
RADIO_PMIC01005
MF
1/32W
100K
RADIO_PMIC
1%
1%
RADIO_PMIC
1/32W
100
MF
01005
1/32W
1% MF
01005
1.00K
RADIO_PMIC
RADIO_PMIC
2.0X1.6-SM
19.2MHZ-10PPM-7PF-80OHM
RADIO_PMIC
MF
1%
1/32W
01005
100K
1000PF
RADIO_PMIC
X5R-CERM
6.3V
10%
BGA
PM8019
BGA
PM8019
BGA
PM8019
BGA
PM8019
NOSTUFF
SHORT-10L-0.25MM-SM
01005
162K MF1%
1/
32
W
BASEBAND PMU (2 OF 2)
Y3301_RF XTAL 19MHZ
Y3301_RF XTAL 19MHZ
PP_LDO3
BOARD_ID
BB_FORCE_PWM
BB_BUA_SIM
XO_GND
XO_THERM_Y1
BB_RST_L
PS_HOLD PS_HOLD_PMIC
PMIC_RESOUT_L
RF_PMIC_RESET_L
SPMI_DATA
SPMI_CLK
RADIO_ON_L
PP_LDO3
XO_OUT_D0_EN
XTAL19M_OUT
XTAL19M_IN
SLEEP_CLK_32K
MDM_CLK
PA_CTL_QFE
50_A0_PMCLK
50_PMIC_RF_CLK
50_RF_CLK
ALTERNATE
ALTERNATE197S0598
197S0593
197S0593
197S0565
OM
IT
_T
AB
LE
VREF_DAC_BIAS
SKU_ID
VDDPX_BIAS
4 6 
5 
5 
5 
3 
12 
5 
5 
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
PART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
INPUT_PWR
SYM 3 OF 5
GND
GND
GND
GND
GND
GND
GND
GND
GND_S4
GND_S3
GND_S2
GND_S1
SYM 2 OF 5
CLOCK
XO_OUT_A0
XO_OUT_D0_EN
XO_OUT_D0
GND_XOADC
XTAL_19M_OUT
XTAL_19M_IN
BATT_ID_THERM
GND_XO
XO_THERM
SLEEP_CLK
PA_THERM1
PA_THERM2
XO_OUT_A1
MPP_GPIO
SYM 4 OF 5
MPP_06
MPP_05
MPP_04
MPP_03
MPP_02
MPP_01
GPIO_06
GPIO_05
GPIO_04
GPIO_03
GPIO_02
GPIO_01
CONTROL
SYM 1 OF 5
PS_HOLD
CBL_PWR*
PON_TRIG
PON_RST*
RESIN*
SPMI_CLK
GND
GND
OPT
GND
SPMI_DATA
NC
NC
NC
NC
NC
NC
NC
IN
IN
OUT
IN
OUT
OUT
IN
OUT
OUT
OUT
IN
IN
IN
IN
BI
BI
IN
OUT
w 
w 
w 
. c
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 i n
 a
 f 
i x
 . 
c o
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BASEBAND (1 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEMDESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
(SDC1 PAD)
(MSM CORE)
(MSM MEMORY)
(EBI1 PAD)
(HSIC PAD)
(UIM2 PAD)
(MODEM SUB SYSTEM)
(UIM1 PAD)
(USB CORE)
(QFUSE PROGRAMMING)
(EBI1 PAD)
(LPDDR2)
(LPDDR2_CORE)
(GENIO PAD)
(SDC/UIM)
(USB 1.8V)
(LPDDR2 CORE)
(LPDDR2)(GPS ADC)
(PLL)
(PLL)
(BBRX)
(SDC1 PAD)
(GENIO PAD)
(MSM CORE)
C538
R500
L500
U502
(MSM MEMORY)
(QFUSE)
(MODEM SUB SYSTEM)
(COMBO DAC/BBRX)
(HSIC PAD)
39 OF 60
34 OF 55
4.0.0
051-00648
U_BB_RF
U_BB_RF
C3423_RF
C3430_RF
C3425_RF C3438_RF
37 38 39 
C3437_RF
C3436_RF
36 37 39 40 41 43 44 45 
58 
37 39 
C3435_RF
37 38 39 
C3434_RF
37 39 
C3433_RF
37 39 43 44 
C3432_RF
37 39 43 44 
C3429_RF
37 39 41 
C3428_RF
37 39 
C3426_RF
37 39 
C3427_RF
38 39 
37 39 
C3424_RF
C3421_RF
36 37 39 40 41 43 44 45 
58 
37 39 56 
C3420_RF
37 39 
C3419_RF C3422_RF
37 39 
C3401_RF C3404_RF C3407_RF C3410_RF C3413_RF C3416_RF
37 39 
C3402_RF C3405_RF C3408_RF C3411_RF C3414_RF C3417_RF
C3418_RFC3415_RFC3412_RFC3409_RFC3406_RFC3403_RF
37 38 39 
37 39 
36 37 39 40 41 43 44 45 58 
37 38 39 
37 39 
37 39 43 44 
37 39 43 44 
37 39 41 
37 
37 39 
37 39 
38 39 
37 39 
36 37 
36 37 39 40 41 43 44 45 58 
37 39 56 
37 39 
36 37 39 
37 39 
37 39 
36 37 39 
A15
R14
R13
P13
B17
C17
A17
E6
A9
E9
E12
A6
A12
W12
W20
W9
W5
W1
V20
T20
R20
P12
P9
P8
P6
N14
N13
N10
N9
N6
N1
M20
M15
M14
M11
M10
M7
M6
L15
L12
L11
L8
L7
L1
K20
K19
K13
K12
K9
K8
J14
J13
J10
J9
J6
J1
H15
H14
H11
H10
H7
H6
G12
G11
G7
F20
F14
F13
F12
E14
C20
C14
A20
A2
U20
A19
V13
V10
U11
W8
D17
R12
U13
E16
V9
U19
R19
V19
V5
V2
K2
J19
B2
B20
T19
M1
L20
L19
F19
L6
K11
K7
K6
J12
J11
J8
J7
H13
H12
H9
H8
G15
G14
G13
G10
G9
G6
F11
F10
F7
F6
E5
R8
R7
P15
P14
N15
L10
L9
K10
G8
F15
F9
F8
E15
K1
J20
P20
P1
H1
E20
P11
P10
P7
N12
N11
N8
N7
M13
M12
M9
M8
L14
L13
K15
K14
J15
T17
C9
C6
C12
B12
B9
B6
B15
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
RADIO_BB PP_LDO12
RADIO_BB RADIO_BB
RADIO_BB
ASIC-MDM9625M-2
X5R-CERM
WLBGA
WLBGA
RADIO_BB
ASIC-MDM9625M-2
PP_LDO11
PP_LDO5
PP_LDO12
PP_LDO2
PP_LDO4
PP_LDO9
PP_LDO1
PP_LDO3
PP_LDO13
PP_LDO3
PP_LDO9
PP_LDO1PP_LDO2PP_LDO9 RADIO_BB
VDDPX_BIAS
PP_LDO11
PP_LDO9
PP_LDO10
PP_LDO1
PP_LDO7
VDDPX_BIAS PP_LDO9
PP_LDO12
PP_LDO11
PP_LDO3PP_LDO3
PP_LDO7
PP_LDO1
PP_LDO9
VREG_SMPS1_0V90
PP_LDO10
PP_LDO10
PP_LDO13
VREG_SMPS1_0V90
PP_LDO10
PP_LDO12
PP_LDO11
BASEBAND (1 OF 2)
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
0.1UF
01005
NOSTUFF
RADIO_BB
4V
X5R
20%
RADIO_BB
01005
0.1UF
NOSTUFF
4V
X5R
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
NOSTUFF
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
NOSTUFF
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
20%
RADIO_BB
2.2UF
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
20%
RADIO_BB
2.2UF
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
RADIO_BB
NOSTUFF
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
4V
X5R-CERM
0201
20%
2.2UF
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
RADIO_BB
4V
X5R-CERM
0201
2.2UF
20%
25 
RADIO_BB
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 6 OF 6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SYM 5 OF 6
PWR
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_USB_CORE
VDD_USB_1P8
VDD_USB_3P3
VDD_A2
VDD_A1
VDD_A2
VDD_P6
VDD_A1
VDD_A1
VDD_A2
VDD_A2
VDD_PLL
VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8
VDD_ALWAYS_ON
VDD_PLL
VDD_PLL
VREF_UIM
VREF_SDC
VDD_QFPROM_PRG
VDD_DDR_CORE_1P2
VDD_P1
VDD_P2
VDD_P3
VDD_P3
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_PLL2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P3
VDD_P3
VDD_P3
VDD_P3
VDD_P4
VDD_P5
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_CORE
VDD_CORE
NC
NC
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
ININ
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
w 
w 
w 
. c
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 i n
 a
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i x
 . 
c o
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BASEBAND (2 OF 3)
U602
R606
L600
C600
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
40 OF 60
35 OF 55
051-00648
4.0.0
U3501_RF
U_BB_RF
U_BB_RF
33 60 
36 
C3501_RF
R3507_RF R3508_RFU_EEP_RF
38 
37 40 
33 36 60 
33 36 60 
33 36 60 
33 36 60 
36 38 
36 38 
36 
33 36 60 
38 
36 38 40 
33 36 60 
36 
38 
36 
36 38 
R3502_RF
R3501_RF
R3506_RF
R3505_RF
4
5
1
2
G19
G18
F18
F16
G16
G20
H20
H19
H18
H16
J18
K18
J16
K16
G1
N20
M5
R16
R1
U12
W13
W10
V12 V11
W11
M19
N19
P19
N18
T4
P2
P5
P3
R2
N2
W17
B18
A18
D20
D19
B19
C19
V17W14
W18
W15
V15
R9
R11
R10
U10
U9
V18
W19
2
1
2
1
2
1
A2
A1
B2B1
2
1
2
1
21
21
PP_LDO11
BB_JTAG_TCK
SOT1226
74AUP1G34GX
SPMI_DATA
RADIO_BB
XO_OUT_D0_EN
BB_JTAG_TCK_IN
1/32W
BB_JTAG_RST_L
BB_JTAG_TDI
SLEEP_CLK_32K
PMIC_RESOUT_L
BB_JTAG_TRST_L
MDM_CLK
PS_HOLD
MDM_VREF_LPDDR2
ASIC-MDM9625M-2
WLBGA
WLBGA
RADIO_BB
PP_LDO11
EBI1_CAL
BDM_ZQ
RADIO_BB
ASIC-MDM9625M-2
1/32W
BB_USB_TRXTUNE
MDM_CLK
50_BB_HSIC_STROBE
90_BB_USB_P
90_BB_USB_N
BB_HSIC_CAL
50_BB_HSIC_DATA
SPMI_CLK
BB_JTAG_TDO
BB_USB_VBUS
BB_JTAG_TMS
RADIO_BB
PP_LDO11
BB_EEPROM_SDA
BB_EEPROM_SDA
BB_EEPROM_SCL
BB_EEPROM_SCL
MDM_VREF_LPDDR2
BASEBAND (1 OF 2)
6.3V
20%
1.0UF
X5R
0201-1
01005
MF
1%
1/32W
10K 10K
1%
MF
01005
WLCSP
CAT24C08C4A
1/32W
1%
01005
240
MF
RADIO_BB
1%
200
1/32W
01005
MF
240
1%
01005
MF
MF
240
1%
010051/32W
RADIO_BB
26 11 9 7 
7 5 3 
12 11 10 8 7 6 4 3 
8 7 
12 11 10 8 7 6 4 3 
8 7 
8 7 
8 7 
7 4 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
D
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SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICEOF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
N
C
NC
SYM 2 OF 6
EBI1_EBI2
EBI1_CAL
EBI1_ZQ
EBI2_CS*
EBI2_CLE*
EBI2_ALE*
EBI2_AD_6
EBI2_AD_7
EBI1_VREF
EBI2_AD_5
EBI2_AD_4
EBI2_AD_3
EBI2_AD_2
EBI2_AD_1
EBI2_AD_0
EBI2_WE*
EBI2_OE*
EBI2_BUSY*
EBI1_VREF
EBI1_VREF
DIGITAL
SYM 1 OF 6
USB_HS_REXT
USB_HS_SYSCLK
UIM1_DETECT
HSIC_STROBE
RESIN*
SLEEP_CLK
TCK
RESOUT*
TRST*
USB_HS_ID
SRST*
USB_HS_DP
USB_HS_DM
SDC1_DATA_0
SDC1_DATA_2
SDC1_DATA_1
SDC1_DATA_3
UIM1_RESET
UIM1_CLK
UIM1_DATA
HSIC_CAL
HSIC_DATA
PMIC_SPMI_DATA
PMIC_SPMI_CLK
TDO
USB_HS_VBUS
CXO
CXO_EN
TMS
PS_HOLD
TDI
SDC1_CMD
SDC1_CLK
MODE_1
MODE_0
IN
IN
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VCC
VSS
SDASCL
OUT
IN
BI
BI
BI
BI
BI
BI
OUT
IN
OUT
IN
IN
IN
IN
IN
IN
w 
w 
w 
. c
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 a
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i x
 . 
c o
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BB_LAT_GPIO3
BB_SWD_ENABLE
BB_UAT_GPIO3
RFFE
UAT_SELECT
LAT_SELECT
BB_UAT_GPIO0
CTRL_FWD_REV
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
BLSP2
SSBI
C704
U702
L700
R700
BLSP6
GRFC
BLSP3
BB_LAT_GPIO5
BB_LAT_GPIO4
BB_LAT_GPIO2
BB_LAT_GPIO1
BB_UAT_GPIO1
BLSP4
BLSP5
BLSP1
GRFC
BB_DEBUG_SYNC (DEV)
BASEBAND (3 OF 3)
BB_LAT_GPIO0
WLAN_TX_BLANK
36 OF 55
41 OF 60
4.0.0
051-00648
U_BB_RF
U_BB_RF
56 
56 
U_BUFFER_RF
33 36 60 
33 36 60 
33 36 60 
33 36 60 
33 60 
C3602_RF
R3601_RF
36 
36 
36 41 
36 
33 36 60 
33 36 60 
33 36 60 
36 
36 
38 
33 36 60 
33 36 60 
33 36 60 
33 36 60 
33 36 60 
36 
36 
36 
33 60 
33 60 
33 36 60 
40 
40 
33 36 60 
33 60 36 
33 36 60 
33 36 60 
36 57 
36 57 
33 60 
44 
41 42 
36 45 46 47 48 49 50 
36 45 46 47 48 49 50 
36 41 51 52 54 
41 51 52 54 
42 
42 
42 
42 
33 60 
45 
45 
42 
42 
42 
42 
42 
42 
42 
42 
44 
44 
44 
44 
44 
44 
44 
44 
42 
42 
42 
42 
42 
42 
42 
42 
C3604_RFC3603_RFC3601_RF
VOLTAGE=1.80V
R5
U1
U5
U2
W6
V1
U17
V4
R15
T2
U6
W3
W4
V8
U7
R3
R6
T1
E1
D2
D1
E2
T3
N3
N5
F5
E3
F3
G5
C1
D3
F2
F1
G2
G3
H3
H2
H5
J2
J3
L2
J5
C2
B1
K5
M2
L3
K3
M3
L5
L18
P16
E18
E19
C18
D18
L16
N16
M16
M18
U8
W7
V6
V7
V3
W2
U4
U3
U16
V14
U14
U15
P18
T18
U18
R18
E8
A7
B7
C8
A8
B8
E13
B13
A13
C13
A14
B14
B16
A16
C15
C16
E7
C7
C3
D4
W16
V16
B3
B4
B10
E10
A3
A4
A10
C10
C4
B5
B11
E11
C5
A5
A11
C11
4
63
52
8
1
7
2
1
2
1
2
1
2
1
2
1
BB_LAT_GPIO2
BB_LAT_GPIO1
RF1352
WLCSP
WTR_BB_TX_Q_P
RFFE2_DATA_BUFFER
RFFE2_CLK_BUFFER
MOBILE DATA MODEM (2 OF 2)
0201
BB_UART_CTS_L
BB_SIM_CLK
BB_SIM_RESET
BB_UART_TXD
BB_RESET_DET_L BB_DEBUG_STATUS
GSM_TX_PHASE_D0
BOOT_HSIC
BOOT_HSIC_USB
WATCHDOG_DISABLE
AP_WAKE_MODEM
BB_EEPROM_SCL
BB_EEPROM_SDA
BB_OTHER_TXD
BB_OTHER_RXD
BB_I2S_CLK
BB_I2S_TXD
BB_UART_RXD
RFFE1_CLK
RFFE2_CLK
RFFE1_DATA
BB_GPS_SYNC
RFFE2_DATA
BB_DEVICE_RDY
BB_BUA_SIM
AP_TO_BB_MESA_ON
BB_WAKE_HOST_L
BB_HOST_RDY
BB_DEBUG_ERROR
BB_CORE_DUMP
GSM_TX_PHASE_D1
WFR_SSBI
WTR_SSBI_PRX_DRX
BB_COEX_UART_TXD
BB_COEX_UART_RXD
WTR_SSBI_TX_GPS
UAT_SELECT
BB_SIM_DETECT
BB_SIM_DATA
BB_IPC_GPIO1
GSM_TXBURST_IND
BB_I2S_RXD
BB_I2S_WS
BB_UART_RTS_L
RADIO_BB
WLBGA
ASIC-MDM9625M-2
WTR_BB_TX_I_N
WTR_BB_PRX_I_N
WTR_BB_DRX_I_N
WFR_BB_PRX_I_N
WFR_BB_DRX_I_N
WTR_BB_PRX_I_P
WTR_BB_DRX_I_P
WFR_BB_PRX_I_P
WFR_BB_DRX_I_P
WTR_BB_PRX_Q_N
WTR_BB_DRX_Q_N
WFR_BB_PRX_Q_N
WFR_BB_DRX_Q_N
WTR_BB_PRX_Q_P
WTR_BB_DRX_Q_P
WFR_BB_PRX_Q_P
WFR_BB_DRX_Q_P
ET_DAC_N
ET_DAC_P
WTR_BB_GPS_I_P
WTR_BB_GPS_I_N
WTR_BB_GPS_Q_P
WTR_BB_GPS_Q_N
WTR_BB_TX_I_P
WTR_TX_IDAC
WTR_BB_TX_Q_N
PP_LDO7
WLBGA
RADIO_BB
ASIC-MDM9625M-2
VREF_DAC_BIAS
RFFE2_CLK
RFFE_VIO
RFFE2_DATA
BB_SIM_DETECT
MAKE_BASE=TRUE
PP_LDO11
RFFE2_DATA
WTR_TX_IDAC VREF_DAC_BIAS
PP_LDO11
PP_LDO7
RFFE_VIO
22PF
CERM
01005
5%
16V
1/32W
01005
1%
10K
RADIO_BB
MF
01005
X5R-CERM
6.3V
10%
2200PF
RADIO_BB
2200PF
01005
6.3V
10%
RADIO_BB
X5R-CERM
0.1UF
NOSTUFF
6.3V
10%
X7R
RADIO_BB
18 17 
23 
8 6 4 
19 
21 19 18 8 3 
21 16 14 13 8 
21 19 18 8 
8 3 
8 5 
12 11 10 8 7 6 4 3 
9 8 8 5 
12 11 10 8 7 6 4 3 
8 6 4 
21 19 18 17 16 14 13 8 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SYM 3 OF 6
GPIO
GPIO_43
GPIO_45
GPIO_47
GPIO_48
GPIO_9
GPIO_28
GPIO_3
GPIO_2
GPIO_4
GPIO_6
GPIO_16
GPIO_24 GPIO_62
GPIO_60
GPIO_37
GPIO_35
GPIO_36
GPIO_32
GPIO_34
GPIO_33
GPIO_30
GPIO_31
GPIO_29
GPIO_27
GPIO_25
GPIO_26
GPIO_23
GPIO_22
GPIO_20
GPIO_21
GPIO_19
GPIO_18
GPIO_17
GPIO_15
GPIO_14
GPIO_5
GPIO_75
GPIO_73
GPIO_74
GPIO_71
GPIO_70
GPIO_72
GPIO_68
GPIO_69
GPIO_65
GPIO_67
GPIO_66
GPIO_63
GPIO_64
GPIO_61
GPIO_58
GPIO_59
GPIO_57
GPIO_55
GPIO_56
GPIO_52
GPIO_53
GPIO_54
GPIO_51
GPIO_50
GPIO_49
GPIO_46
GPIO_42
GPIO_44
GPIO_41
GPIO_1
GPIO_0
GPIO_40
GPIO_39
GPIO_38
GPIO_13
GPIO_12
GPIO_11
GPIO_10
GPIO_8
GPIO_7
SYM 4 OF 6
ANALOG
BBRX_IM_CH0
BBRX_IM_CH1
BBRX_IM_CH2
BBRX_IM_CH3
BBRX_IP_CH0
BBRX_IP_CH1
BBRX_IP_CH2
BBRX_IP_CH3
BBRX_QM_CH0
BBRX_QM_CH1
BBRX_QM_CH2
BBRX_QM_CH3
BBRX_QP_CH0
BBRX_QP_CH1
BBRX_QP_CH2
BBRX_QP_CH3
TX_DAC0_VREF
TX_DAC1_VREF
ET_DAC_M
ET_DAC_P
GNSS_BB_IP
GNSS_BB_IM
GNSS_BB_QP
GNSS_BB_QM
TX_DAC0_IM
TX_DAC0_IP
TX_DAC0_IREF
TX_DAC0_QM
TX_DAC0_QP
TX_DAC1_IM
TX_DAC1_IP
TX_DAC1_IREF
TX_DAC1_QM
TX_DAC1_QP
DNC
DNC
DNC
DNC
OUT
OUT
SDATA
SCLK_A
SDATA_A
GPO2
GND
VIO
SCLK
GPO1
OUT
IN
IN
OUT
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
OUT
NC
NC
NC
NC
OUT
IN
IN
OUT
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IN
OUT
IN
OUT
OUT
IN
BI
OUT
IN
OUT
OUT
IN
IN
IN
OUT
IN
OUT
BI
BI
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
BI
BI
BI
BI
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
w 
w 
w 
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i x
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c o
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RF_CLK IS SHARED BETWEEN WTR AND WFR. LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE < 5MM.
WTR TRANSCEIVER (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C802
R802
L800
U803
NO DC
DC
DC
DC
LB3
LB2
DC
DC
DC
LB4
MB1
MB2
MB3
HB1
HB2
HB3
HBMB4 NO DC
NO DC
DC
DC
LB1
DC
NO DC
DC
DC
DC
DCLB1
LB2
LB3
LB4
MB1
MB2
NO DC
DC
DC
NO DC
HB1
HBMB4
HB3
HB2
MB3 DC
37 OF 55
42 OF 60
051-00648
4.0.0
41 
41 
41 
41 
41 
U_WTR_RF
U_WTR_RFU_WTR_RF
44 
44 
44 
44 
R3702_RF
41 
131
155
139
138
146
154
163
153
162
121
130
152
161
151
160
105
95
71
117
104
123
122
156
118
55
140
94
141
127
109
36
44
67
85
60
53
29
1
20
28
32
7
16
15
5
2
30
13
12
4
61
68
76
86
37
50
27
43
51
91
65
73
92
102
19
33
18
17
9
107
97
99
108
21
50_FWD_OR_REV_RF
50_B1_B25_B34_B39_WTR_TX_OUT
50_HB_2G_WTR_TX_OUT
WTR_TX_IDAC
WTR_BB_TX_I_N
WTR_BB_TX_I_P
WTR_BB_TX_Q_N
WTR_BB_TX_Q_P
WTR_SSBI_PRX_DRX
WTR_SSBI_TX_GPS
GSM_TX_PHASE_D0
GSM_TX_PHASE_D1
50_B7_WTR_TX_OUT
50_B40_B38_B41_WTR_TX_OUT
50_LB_2G_WTR_TX_OUT
50_B8_B26_B20_WTR_TX_OUT
50_B13_B17_B28_WTR_TX_OUT
50_B3_B4_WTR_TX_OUT
WTR_RTUNE
WTR_BB_GPS_I_N
WTR_BB_GPS_I_P
WTR_BB_GPS_Q_N
WTR_BB_GPS_Q_P
100_GPS_WTR_IN_N
100_GPS_WTR_IN_P
WTR_BB_DRX_I_N
WTR_BB_DRX_I_P
WTR_BB_DRX_Q_N
WTR_BB_DRX_Q_P
50_B38X_DRX_WTR_IN
50_B41A_DRX_WTR_IN
50_B7_DRX_WTR_IN
50_B40_DRX_WTR_IN
50_B8_B28B_DRX_WTR_IN
50_B13_B17_DRX_WTR_IN
50_B26_B28A_DRX_WTR_IN
50_B20_B29_DRX_WTR_IN
50_WFR_DRX_LB_CA_IN
50_B34_DRX_WTR_IN
50_B39_DRX_WTR_IN
50_WFR_DRX_MB_CA_OUT
WTR_BB_PRX_I_NWTR_BB_PRX_I_P
WTR_BB_PRX_Q_N
WTR_BB_PRX_Q_P
50_B40B_B38X_PRX_WTR_IN
50_B41A_PRX_WTR_IN
50_B7_PRX_WTR_IN
50_B40A_PRX_WTR_IN
50_B8_PRX_WTR_IN
50_B20_PRX_WTR_IN
50_B26_PRX_WTR_IN
50_B13_B17_B28_B29_PRX_WTR_IN
50_WFR_PRX_LB_CA_IN
50_B34_B39_PRX_WTR_IN
50_DCS_WTR_IN
50_PCS_WTR_IN
50_WFR_PRX_MB_CA_OUT
50_RF_CLK
RF TRANSCEIVER (1 0F 3)
RADIO_WTR
RADIO_WTR
RADIO_WTR
RADIO_WTR
RADIO_WTR
WTR1625
BGA
BGA
WTR1625WTR1625
BGA
4.75K
MF
1/32W
01005
1%
RADIO_WTR
RADIO_WTR
RADIO_WTR
RADIO_WTR
18 
16 
13 
8 
8 
8 
8 
8 
8 
8 
8 
8 
17 
17 
13 
15 
14 
16 
22 
22 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 
19 
19 
17 
19 
15 
15 
15 
14 
18 
20 
20 
11 5 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
SYM 3 OF 5
GND
GND
GND
GND
GND
GND
GND
XO_IN
RTUNE
PDET_RFFB
TX_MB4_OUT
TX_MB3_OUT
TX_MB2_OUT
TX_MB1_OUT
TX_LB4_OUT
TX_LB3_OUT
TX_LB2_OUT
TX_LB1_OUT
TX_HB2_OUT
TX_HB1_OUT
GP_DATA1
GP_DATA0
SSBI_TX_GNSS
SSBI_PRX_DRX
TX_BB_QP
TX_BB_QM
TX_BB_IP
TX_BB_IM
DAC_REF
ADC_IN
SYM 2 OF 5
DRX_MB_CA_IN
DRX_MB3_IN
DRX_MB2_IN
DRX_MB1_IN
DRX_LB_CA_OUT
DRX_LB4_IN
DRX_LB3_IN
DRX_LB2_IN
DRX_LB1_IN
DRX_HB_CA_OUT
DRX_HMB4_IN
DRX_HB3_IN
DRX_HB2_IN
DRX_HB1_IN
DRX_BB_QP
DRX_BB_QM
DRX_BB_IP
DRX_BB_IM
GNSS_RF_INP
GNSS_RF_INM
DNC
GNSS_BB_QP
GNSS_BB_QM
GNSS_BB_IP
GNSS_BB_IM
SYM 1 OF 5
PRX_MB_CA_IN
PRX_MB3_IN
PRX_MB2_IN
PRX_MB1_IN
PRX_LB_CA_OUT
PRX_LB4_IN
PRX_LB3_IN
PRX_LB2_IN
PRX_LB1_IN
PRX_HB_CA_OUT
PRX_HMB4_IN
PRX_HB3_IN
PRX_HB2_IN
PRX_HB1_IN
PRX_BB_QP
PRX_BB_QM
PRX_BB_IP
PRX_BB_IM
NC
NC
NC
NC
NC
NC
OUT
IN
OUT
IN
OUT
OUT
OUT
w 
w 
w 
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 a
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i x
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c o
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CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
WTR DECOUPLING SHARED WITH C3808_RF
WTR TRANSCEIVER (2 OF 2) C934R926
U902
DELETED C3805 PR REVIEW FEEDBACK
L3802_RF
WTR DECOUPLING CAPS
051-00648
4.0.0
38 OF 55
43 OF 60
C3833_RF
C3830_RF
C3813_RF
C3825_RF
C3824_RF
C3823_RF
C3821_RF
XW3803_RF
XW3802_RF
XW3801_RF
U_WTR_RF
U_WTR_RF
L3802_RF
L3801_RF
C3811_RF
C3809_RF
C3807_RF
C3806_RF
C3818_RF
C3803_RF
C3808_RFC3801_RF
C3829_RF
C3826_RF
C3816_RF
C3828_RF
C3817_RF
C3815_RF
164
75
84
66
45
132
112
133
158
148
124
125
142
159
134
150
106
119
120
128
143
144
145
110
101
111
96
77
87
47
40
63
70
88
69
49
46
23
3
10
39
24
6
21
81
41
42
64
26
8
35
58
82
83
56
89
147
157
114
129
126
62
80
100
98
116
54
149
136
115
135
137
48
78
90
79
72
57
34
25
74
93
52
59
11
38
14
31
22
103
113
21
21
2
1
2
1
2
1
2
1
2
1
2
1
2
12
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
VDD_DRX_BB_2V
PP_LDO8
MAKE_BASE=TRUE
MAKE_BASE=TRUE
PP_LDO1
VDD_GPS
MAKE_BASE=TRUE
VDD_MSM_1P8VMAKE_BASE=TRUEPP_LDO11
VREG_1P3V_WTR MAKE_BASE=TRUE
VREG_1P3V_WTR
VREG_2V_WTR
VDD_PRX_HBMB_1P3V
VDD_GPS_BB_1P3VVDD_FBRX_2V
VDD_PRX_LO_HBMB_1P3V
VDD_TX_UPC_1P3V
VDD_PRX_2V
VDD_DRX_LB_1P3V
VDD_DRX_HB_1P3V
VDD_DRX_MB_1P3V
VDD_PRX_LO_HB_1P3V
VDD_DRX_LO1_1P3V
VDD_DRX_LO2_1P3V
VDD_TX_SYNTH_1P3V
VDD_PRX_VCO_1P3V
VDD_TX_LO_1P3V
VDD_PRX_LB_1P3V
VDD_SHDR_VCO_1P3V
VDD_PRX_BB_2V
VDD_TX_DA_2V
VDD_XO_2V
VDD_TX_VCO_2V
VDD_TX_VCO_1P3V
VDD_TX_UPC_1P3V
VDD_TX_SYNTH_1P3V
VDD_TX_PLL_2V
VDD_TX_LO_1P3V
VDD_TX_DA_2V
VDD_TX_DA_1P3V
VDD_TX_BBF_2V
VDD_SHDR_VCO_2V
VDD_SHDR_VCO_1P3V
VDD_SHDR_PLL_1P3V
VDD_PRX_VCO_2V
VDD_PRX_VCO_1P3V
VDD_PRX_PLL_1P3V
VDD_PRX_LO_HBMB_1P3V
VDD_PRX_LO_HB_1P3V
VDD_PRX_LB_1P3V
VDD_PRX_HBMB_1P3V
VDD_PRX_BB_2V
VDD_PRX_2V
VDD_MSM_1P8V
VDD_FBRX_2V
VDD_DRX_MB_1P3V
VDD_DRX_LO2_1P3V
VDD_DRX_LO1_1P3V
VDD_DRX_LB_1P3V
VDD_DRX_HB_1P3V
VDD_DRX_BB_2V
VDD_GPS_VCO_1P3V
VDD_GPS_PLL_1P3V
VDD_GPS_LNA_1P3V
VDD_GPS_BB_1P3V
VDD_GPS_PLL_1P3V
MAKE_BASE=TRUE
VDD_SHDR_PLL_1P3V
VDD_TX_DA_1P3V
VDD_PRX_PLL_1P3V
VDD_GPS_VCO_1P3V
MAKE_BASE=TRUE
VDD_GPS_LNA_1P3V
VDD_TX_VCO_2V
VDD_TX_PLL_2V
VDD_XO_2V
VDD_SHDR_VCO_2V
VDD_PRX_VCO_2V
VDD_TX_VCO_1P3V
MAKE_BASE=TRUEVREG_1P3V_WTR
VDD_TX_BBF_2V
MAKE_BASE=TRUE
MAKE_BASE=TRUEVREG_2V_WTR
RF TRANSCEIVER (2 OF 3)
RADIO_WTR
01005
X5R
4V
20%
0.1UF
20%
0.1UF
01005
RADIO_WTR
X5R
4V
01005
NP0-C0G
10V
5%
100PF
RADIO_WTR
20%
RADIO_WTR
4V
0.1UF
01005
X5R
0.1UF
X5R
20%
4V
01005
RADIO_WTR
4V
01005
20%
X5R
0.1UF
RADIO_WTR
RADIO_WTR
4V
X5R
01005
0.1UF
20%
RADIO_WTR
RADIO_WTR
RADIO_WTR
I188
BGA
WTR1625
BGA
WTR1625
01005
8.2NH-3%-0.19A-1.6OHM
0201
RADIO_WTR
22NH-3%-0.25A
I175
1.0UF
0201-1
X5R-CERM
6.3V
10%
RADIO_WTR
0.1UF
X5R
20%
4V
01005
RADIO_WTR
RADIO_WTR
0.1UF
20%
01005
X5R
4V
RADIO_WTR
20%
01005
0.1UF
X5R
4V
RADIO_WTR
4V
X5R
20%
01005
0.1UF
RADIO_WTR
X5R-CERM
10%
0.1UF
0201
10V
10UF
CERM-X5R
6.3V
20%
RADIO_WTR
0402-9
10UF
CERM-X5R
20%
6.3V
RADIO_WTR
0402-9
RADIO_WTR4V20%
X5R
01005
0.1UF
RADIO_WTR5%
10V
100PF
RADIO_WTR
NP0-C0G
01005
01005
20%
4V
0.1UF
RADIO_WTR
X5R
RADIO_WTR
01005
0.1UF
20%
4V
X5R
RADIO_WTR
X5R
01005
0.1UF
4V
20%
X5R
01005
20%
4V
0.1UF
RADIO_WTR
10 
11 4 
11
6 4 
10 12 11 8 7 6 4 3 
10 
10 
10 
10 10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
10 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
NBC
SYM 5 OF 5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SYM 4 OF 5
GND
VDD_RF2_XO
VDD_RF2_T_VCO
VDD_RF1_T_VCO
VDD_RF1_T_UPC
VDD_RF1_T_SYN
VDD_RF2_T_PLL
VDD_RF1_T_LO
VDD_RF2_T_DA
VDD_RF1_T_DA
VDD_RF2_T_BB
VDD_RF2_S_VCO
VDD_RF1_S_VCO
VDD_RF1_S_PLL
VDD_RF2_P_VCO
VDD_RF1_P_VCO
VDD_RF1_P_PLL
VDD_RF1_P_HMB_LO
VDD_RF1_P_HB_LO
VDD_RF1_P_LB
VDD_RF1_P_HMB
VDD_RF2_P_BB
VDD_RF2_P_RX
VDD_DIO
VDD_RF2_FBRX
VDD_RF1_D_MB
VDD_RF1_D_LOM
VDD_RF1_D_LB_LO
VDD_RF1_D_LB
VDD_RF1_D_HB
VDD_RF2_D_BB
VDD_RF1_G_VCO
VDD_RF1_G_PLL
VDD_RF1_G_LNA
VDD_RF1_G_BB
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
MB2
U1002
L1000
R1016
C1019
DC
MB1
NO DC
MB3
MB2
MB1 DC
DC
DC
MB3
NO DC
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
WFR TRANSCEIVER
50_WFR_PRX_HB_CA_IN
44 OF 60
39 OF 55
4.0.0
051-00648
C3902_RF
42 
42 
42 
42 
C3903_RF
C3901_RF
R3901_RF
C3917_RF
C3904_RF
C3916_RF
C3915_RF
C3913_RF
C3912_RF
C3911_RF
C3910_RF
XW3901_RF
XW3902_RF
C3905_RF
XW3900_RF
U_WFR_RF
U_WFR_RF
17
37
23
56
33
44
10
31
15
24
59
47
39
2
60
58
55
53
51
50
48
46
45
42
41
40
38
35
32
26
21
20
18
14
12
11
9
8
4
7
13
19
5
6
16
22
3
27
25
30
29
28
61
52
34
1
65
66
54
49
36
43
57
64
62
63
2
1
2
1
2
1
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
RADIO_WFR
RADIO_WFR
4.75K WFR_BB_DRX_Q_N
50_B25_PRX_WFR_IN
50_B3_PRX_WFR_IN
50_B25_DRX_WFR_IN
VDD_PRX_VCO_WFR_2V
VDD_XO_WFR_2VWFR_BB_PRX_Q_N
WFR_BB_PRX_Q_P
50_B1_B4_PRX_WFR_IN
50_B1_B4_DRX_WFR_IN
50_B3_DRX_WFR_IN
WFR_BB_PRX_I_P
WFR_RTUNE
50_WFR_DRX_MB_CA_OUT
WFR_BB_PRX_I_N
50_WFR_PRX_LB_CA_IN
WFR_BB_DRX_I_P
WFR_BB_DRX_I_N
WFR_BB_DRX_Q_P
WFR_SSBI
50_WFR_PRX_MB_CA_OUT
VDD_XO_WFR_2V
VDD1_1P8V
VDD1_DRX_BB_2V
VDD1_PRX_BB_2V
VDD1_DRX_BB_2V
VDD1_PRX_BB_2V
50_WFR_DRX_LB_CA_IN
50_RF_CLK
VDD1_1P8VPP_LDO11
MAKE_BASE=TRUE
VREG_2V_WFRPP_LDO8
MAKE_BASE=TRUE
PP_LDO1
MAKE_BASE=TRUE
VDD_DIG_1P3V
VDD_PRX_VCO_WFR_1P3V
VDD_PRX_VCO_WFR_1P3V
VDD_PRX_PLL_WFR_1P3V
VDD_PRX_PLL_WFR_1P3V
VDD_PRX_MBHB_FE_1P3V
VDD_PRX_MBHB_FE_1P3V
VDD_PRX_LO_WFR_1P3V
VDD_PRX_LO_WFR_1P3V
VDD_PRX_LB_FE_1P3V
VDD_PRX_LB_FE_1P3V
VDD_DRX_MB_HB_FE_1P3V
VDD_DRX_MB_HB_FE_1P3V
VDD_DRX_LO_1P3V
VDD_DRX_LO_1P3V
VDD_DRX_LB_WFR_1P3V
VDD_DRX_LB_WFR_1P3V
VDD_DIG_1P3V VREG_2V_WFR MAKE_BASE=TRUE VDD_PRX_VCO_WFR_2V
MAKE_BASE=TRUE
PPLDO1_WFR
RF TRANSCEIVER (3 OF 3)
0.1UF
RADIO_WFR
01005
20%4V
X5R
CERM-X5R
10UF
20%
6.3V
RADIO_WFR
0402-9
6.3V
20%
10UF
CERM-X5R
RADIO_WFR
0402-9
1%
RADIO_WFR
1/32W
01005
MF
01005
RADIO_WFR
0.1UF
4V
X5R
20%
RADIO_WFR
X5R
20%
0.1UF
4V
01005
01005
0.1UF
X5R
20%4V
RADIO_WFR
01005
0.1UF
RADIO_WFR
20%4V
X5R
RADIO_WFR
4V
0.1UF
20%
X5R
01005
0.1UF
20%
X5R
4V
01005
RADIO_WFR
0.1UF
01005
X5R
4V20%
RADIO_WFR
4V
X5R
0.1UF
20%
01005
01005
0.1UF
X5R
4V20%
RADIO_WFR
I114
I113
BGA
WFR1620
WFR1620
BGA
20 
16 
16 
11 
11 
8 
8 
16 
20 
20 
8 
8 
8 
8 
8 
8 
8 
11 
11 
11 
11 
11 
11 
9 5 
11 12 10 8 7 6 4 3 
11 10 4 
10 6 4 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 
11 11 11 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
OUT
OUT
IN
SYM 2 OF 2
PWR_GND
VDD_RF1_P_LO
VDD_RF2_P_VCO
VDD_RF1_P_PLL
GND
GND
VDD_RF1_D_MHB_FE
VDD_RF1_D_LB_FE
VDD_RF2_D_BB
VDD_RF1_D_LO
VDD_RF2_XO
VDD_RF1_P_MHB_FE
VDD_RF1_P_VCO
VDD_RF2_P_BB
VDD_RF1_P_LB_FE
VDD_DIO
VDD_RF1_DIG
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RX_OTHER
SYM 1 OF 2
GND
GND
GND
GND
PRX_BB_QM
PRX_BB_QP
PRX_MB2_IN
DRX_MB1_IN
DRX_MB2_IN
DRX_MB3_IN
DRX_HB_CA_IN
DRX_LB_CA_IN
PRX_BB_IP
R_TUNE
XO_IN
DRX_MB_CA_OUT
PRX_BB_IM
PRX_LB_CA_IN
PRX_MB3_IN
PRX_MB1_IN
PRX_HB_CA_IN
DRX_BB_IP
DRX_BB_IM
DRX_BB_QP
DRX_BB_QM
SSBI_PRX_DRX
PRX_MB_CA_OUT
NC
NC
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
> 1.0MM
SHOULD BE PLACED
FROM QPOET
U1101
L1104
R1102
C1110
QPOET TIMING
(CAN BE CHANGED TO 20UF)
(USID)
INDUCTANCE
I/O @ 1.8V
CRITICAL TO STAY
@ 4.7UF TO MEET
IN VLB (B13)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
MAX 0.25MM AWAY
QFE DCDC
BOOST FILTER
MITIGATE RX1 DESENSE
BOTH XW'S
TO CREATE
45 OF 60
40 OF 55
4.0.0
051-00648
C4006_RF
C4010_RF
U_QPOET_RFL4002_RF
L4004_RF
XW4004_RF
XW4002_RF
XW4001_RF
C4001_RF
L4001_RF
C4003_RFC4002_RF
C4005_RF
L4003_RF41 
41 
36 41 46 47 48 49 50 
36 41 46 47 48 49 50 
R4001_RF
C4008_RF
C4007_RF
2
1
2
1
23
20
25
28
16
15
5
17
19
26
21
18
13
27
24
3
22
1
9
8
6
12
11
10
14
4
7
2
21
21
2
1
21
21
2
1
21
2
1
2
1
2
1
21
2
1
2
1
2
1
VPA_ET
VPA_ET
APT_VINPUT
VOUT_BOOST_GND
VOUT_BOOST
QPOET_BATT
VBATT_SW
SW_GROUND
ET_DAC_P
APT_VINPUT
PP_LDO11
VPA_APT
ET_DAC_N
GSM_CAP
VPA_BATT
QPOET_VSW
BST_L
VPA_APT
PP_LDO11
GSM_CAP
VPA_ET_FILTER
VPA_ET
PP_BATT_VCC
PP_BATT_VCC
PP_BATT_VCC
PP_BATT_VCC
VBATT_SW
PA_CTL_QFE
PP_BATT_VCC
RFFE1_DATA
RFFE1_CLK
SW_GROUND
VOUT_BOOST
VOUT_BOOST_GND
QFE DCDC
0402-9
10UF
CERM-X5R
6.3V
20%
RADIO_QPOET
10%
10V
RADIO_QPOET
470PF
X5R
01005
BGA
QFE110022-OHM-25%-1800MA
0201
22-OHM-25%-1800MA
0201
NOSTUFF
SHORT-10L-0.25MM-SM
NOSTUFF
SHORT-10L-0.25MM-SM
SHORT-10L-0.25MM-SM
NOSTUFF
0402-9
10UF
20%
6.3V
CERM-X5R
RADIO_QPOET
RADIO_QPOET
0805
2.2UH-20%-0.7A-0.23OHM
0402-9
CERM-X5R
6.3V
RADIO_QPOET
10UF
20%
0402-9
RADIO_QPOET
CERM-X5R
6.3V
10UF
20%
0402
CERM-X5R
20%
6.3V
RADIO_QPOET
20UF
PSB25201T-SM
RADIO_QPOET
1.5UH-1.95A-0.111OHM
RADIO_QPOET
RADIO_QPOET
5%
2.2
MF
1/32W
01005
10V
470PF
10%
RADIO_QPOET
X5R
01005
0402
RADIO_QPOET
20%
10V
X5R-CERM
4.7UF
17 16 15 14 12 
17 16 15 14 12 
12 
12 
12 
12 
12 
12 
12 11 10 8 7 6 4 3 
1713 
12 
12 
17
16 15 14
12 11 10 8 7 6 4 3 
17 16
15 14 12
27
21 19 18 12
27 21 19 18 12 
27 21 19 18 12 
27 21 19 18 12 
12 
5 
27 21 19 18 12 
12 
12 
12 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
GND
GND
USID_LSB
VSW_BOOST
VSW_BUCK
VOUT_BOOST
VDD_BUCK
AMP_OUT
PA_VBAT
MPP1
C_GSM
GND_BUCK
GND_BOOST
AMP_INP
AMP_INM
C_SW_BUCK
C_SW_BUCK
C_BUCK
C_BUCK
SCLK
SDATA
BYP_LOAD
BYP_BATT VDD_BATT
VDD_BATT
VDD_1P8
VDD_AMP
GND_AMP
IN
IN
BI
BI
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
2G PA
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
U1201
L1204
R1200
C1208
46 OF 60
41 OF 55
4.0.0
051-00648
U_2GPA_RF
C4118_RF
R4100_RF
C4113_RF
C4112_RF L4101_RF
L4102_RF
C4108_RF C4109_RF
C4104_RF
C4103_RF
C4107_RF
2
1
21
2
1
2
1
21
21
2
1
2
1
21
21
2
1
SKY77357
LGA
01005
50_LB_2G_PA_OUT
50_HB_2G_PA_OUT
2G_PA_VBATT_10UAPP_VCC_MAIN
50_LB_2G_WTR_TX_OUT
50_HB_2G_WTR_TX_OUT
50_LB_2G_ASM_IN
VPA_APT
50_LB_2G_PA_IN
50_HB_2G_PA_IN
RFFE_VIO
RFFE1_DATA
RFFE1_CLK
50_HB_2G_ASM_IN
2G PA
+/-0.05PF
0.5PF
01005
C0G-CERM
16V
0201-1
600-OHM-25%-0.1A
NOSTUFF
01005
RADIO_2G
+/-0.1PF
NP0-C0G
16V
0.8PF
100PF
01005
NP0-C0G
16V
5%
4.7NH+/-0.3%-0.4A
0201
1.5NH+/-0.1NH-1.0A
0201
20%
2.2UF
6.3V
RADIO_2G
X5R-CERM
0201
20%
2.2UF
6.3V
RADIO_2G
X5R-CERM
0201
RADIO_2G
01005
NP0-C0G
16V
5%
100PF
100PF
RADIO_2G
5%
16V
NP0-C0G
56PF
NP0-C0G
5%
RADIO_2G
16V
01005
16 
27 25 24 4 
9 
9 
18 
17 12 
21 19 18 17 14 8 
17 16 15 14 12 8 3 
17 16 15 14 12 8 3 
18 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
VCCVBATT
LBRFIN
HBRFIN
LBRFOUT
HBRFOUT
VIO
SDATA
SCLK
GND
EPAD
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
PLACE INDUCTOR CLOSE TO PA
0
1
OUT V2
VERY LOW BAND PAD (B13, B17, B28)
B28
B12B17
BAND
RF2
RF3
RF4
0
1
1
1
L4215_RF
R1300
C1332
U1304
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
PLACE INDUCTOR CLOSE TO PA
V1
B13
PLACE INDUCTOR CLOSE TO PA
P2 DOE
USE OMIT TABLE TO SELECT SKU VARIANT.
47 OF 60
42 OF 55
4.0.0
051-00648
C4206_RF
C4201_RF
C4207_RF
C4223_RF
XW4200_RF
L4211_RF
U_VLB_SW_RF
U_VLBPAD_RF
C4208_RF
C4231_RF
C4230_RF
L4224_RF
L4217_RF
C4211_RF
L4216_RF
L4222_RF
L4223_RF
L4221_RF
C4227_RF
C4213_RF
C4224_RF
C4221_RF
FL_B17LP_RF
C4219_RF
2
1
21
2
1
2
1
2
1
21
21
2
1
21
21
21
21
2
1
2
1
21
2431
2
1
2
1
2
1
NOSTUFF
+/-0.1PF
NP0-C0G
RFFE1_DATA
3.3PF
16V
01005
50_B28_PAD_IN
50_B12B17_PAD_IN
7.5NH+/-3%-0.2A
2.2PF
01005-1
+/-0.1PF
16V
NP0-C0G
OMIT_TABLE
01005
OMIT_TABLE
CTRL_VLB_BAND_SELECT_1
NP0-C0G
50_B13_B17_B28_WTR_TX_OUT
SHORT-10L-0.1MM-SM
CERM
5%
16V
01005
47PF
50_B13_B17_B28_B29_PRX_WTR_IN
CTRL_VLB_BAND_SELECT_2
50_B12B17_PAD_IN
CTRL_VLB_BAND_SELECT_2
CTRL_VLB_BAND_SELECT_1
22-OHM-25%-0.2A-0.9DCR
50_B13_PAD_ANT
+/-0.1PF
2.5PF
NP0-C0G
OMIT_TABLE
16V
01005
10NH-3%-0.170A
OMIT_TABLE
01005
50_B28A_ASM_TRX
50_B13_PAD_IN
CXA2973GC
NOSTUFF
+/-0.1PF
1.0PF
01005
NP0-C0G
16V
LFL15710MTCTD717
BAND17
0402
100PF
16V
5%
01005
NP0-C0G
100PF
5%
10V
01005
2.7PF
01005-1
NP0-C0G
+/-0.1PF
16V
01005
2.4NH+/-0.1NH-0.370A
5.1NH-3%-0.250A
OMIT_TABLE
01005
01005
7.5NH+/-3%-0.2A
01005
5%
01005
15PF
16V
NP0-C0G-CERM +/-0.05PF
1.5PF
NP0-C0G-CERM
16V
01005
OMIT_TABLE
16V
5%
01005
NP0-C0G
68PF
LGA
OMIT_TABLE
SKY77802-23
22NH-5%-0.1A
01005
RADIO_VLB_PAD
1.0UF
20%
10V
0201-1
X5R-CERM
100PF
NP0-C0G
5%
10V
01005
OMIT_TABLE
VERY LOW BAND PAD
50_B29_PAD_ANT
50_B13_ASM_TRX
50_B28B_PAD_ANT
50_B17_PAD_ANT
50_B28A_PAD_ANT
VPA_ET
50_B13_B17_B28_B29_MCH_RX
VCC_VLB_SW
50_B28_PAD_IN
RFFE_VIO
50_B17_ASM_TRX50_B17_PAD_LPF_IN
LB_VLB_VIO
RFFE1_CLK
50_B13_PAD_IN
VPA_BATT
50_B29_ASM_TRX
50_B28B_ASM_TRX
PP_LDO14_RFSW
50_B13_B17_B28_B29_PAD_RX
BGA
9 
14 
15 
14 
18 
12 15 16 17 
4 23 
14 
14 
9 
14 
8 13 16 17 18 19
21 
18 
18 
15 
3 8 12 13 15 16 17 
14 
14 
12 15 16 17 
18 
18 
14 
14 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
GND
RF3
RF1
RF2
RF4
V1
VDD
V2
PAD
RX_OUT
GND
SW1
SW2
B13_ANT
B28B_ANT
B29_RX_IN
B28A_ANT
B17_ANT
VIO
SDATA
SCLK
B13_IN
B17_IN
B28_IN
THRM
VCCVBAT
GND
OUTIN
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
11
BE A CAPACITOR.
FIRST SHUNT MUST
WTR OUTPUT HAS DC
CAPACITOR THAT'S SUPPOSED TO GO HERE IS LOCATED ON
LOW BAND PAD (B8, B26, B20)
B20
V2
0
1 B26
C4318_RF
L4322_RF
R1400
U1402
BANDV1
1 B8
0
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
VERY LOW BAND PAD. THE 2 PAD'S NEED TO SHARE DECOUPLING
051-00648
43 OF 55
48 OF 60
4.0.0
C4311_RF
C4314_RF
C4309_RF
C4304_RF
C4303_RF
C4301_RF
C4305_RF
XW4300_RF
C4300_RF
C4320_RF
L4301_RF
U_LBPAD_RF
L4313_RF
L4312_RF
L4322_RF
C4313_RF
L4315_RF
L4316_RF
C4317_RF
C4318_RF
L4321_RF
L4320_RF
C4321_RF
L4306_RF
U_LB_SW_RF
21
2
1
21
2
1
2
1
21
2
1
21
21
2
1
2
1
21
21
2
1
1
2
3
4
7
5
6
98
21
21
21
21
21
50_B8_PAD_IN
PP_LDO14_RFSW
SHORT-10L-0.1MM-SM
50_B8_PAD_IN
50_B26_WTR_TX_OUT
50_B20_WTR_TX_OUT
50_B26_WTR_TX_OUT
18PF
CERM
VCC_LB_SW
CTRL_LB_BAND_SELECT_1
50_B8_B26_B20_WTR_TX_OUT
6.8NH-140MA
01005
2.7PF
NP0-C0G
+/-0.1PF
16V
01005
+/-0.1PF
50_B20_PAD_IN
01005
16V
NP0-C0G
0.7PF
50_B26_PAD_IN
50_LB_SW_MCH_IN50_LB_SW_T_MCH
CERM
16V
5%
01005
10V
NP0-C0G
CTRL_LB_BAND_SELECT_2
50_B8_ASM_TRX
50_B26_PAD_ANT
VPA_ET
50_B20_PRX_WTR_IN50_B20_MATCH_1
50_LB_SW_MCH_IN
50_B26_ASM_TRX
50_B8_MATCH_1 50_B8_PRX_WTR_IN
50_B20_ASM_TRX
CTRL_LB_BAND_SELECT_1 50_B20_PAD_RX
50_B8_PAD_RX
LB_VLB_VIO
RFFE1_CLK
VPA_BATT
50_B26_PRX_WTR_IN
50_B8_PAD_ANT
50_B20_WTR_TX_OUT
50_B26_PAD_RX
RFFE1_DATA
CTRL_LB_BAND_SELECT_2
50_B26_MATCH
50_B20_PAD_ANT
LOW BAND PAD
100PF
NP0-C0G
16V
5%
01005
5%
16V
CERM
01005
47PF
01005
NP0-C0G
5%
16V
100PF
01005
NP0-C0G
10V
5%
100PF
100PF
01005
5%
01005
16V
5%
47PF
47PF
5%
16V
CERM
01005
LGA
TQF6410
8.2NH-3%-0.19A-1.6OHM
01005
01005
7.5NH+/-3%-0.2A
01005-1
18NH-3%-0.140A
+/-0.05PF
16V
0.9PF
CERM
01005
01005
15NH-3%-0.140A
01005
5.1NH-3%-0.250A
01005
16V
1.0PF
NP0-C0G
+/-0.1PF
1.5PF
NP0-C0G
+/-0.1PF
16V
01005
01005
3.3NH+/-0.1NH-290MA
5.6NH-3%-0.23A-1.3OHM
01005
18NH-3%-140MA
NOSTUFF
01005
BGA
RADIO_LB_PAD
CXA2973GC
15 
15 
15 
15 
18 
17 16 14 12 
9 
15 
15 
18 
9 
18 
9 
15 
14 
17 16 14 13 12 8 3 
17 16 14 12 
15 
15 
15 
17 16 14 13 12 8 3 
15 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PAD
THRM
VCC1
B20IN
SW1
SW2
B20RX
B20ANT
B26RX
B26ANT
B8ANT
B8RX
VCC2
GND
VIO
SDATA
SCLK
B8IN
B26IN
VBATT
GND
RF3
RF1
RF2
RF4
V1
VDD
V2
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
MID BAND PAD (B1, B25, B3, B4, B34, B39)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. L4409_RF
U1501
R1500
C4426_RF
051-00648
44 OF 55
49 OF 60
4.0.0
C4425_RF
FL_B39LP_RF
C4423_RF
C4408_RF
C4407_RF
L4401_RF
L4402_RF
L4405_RF
C4413_RF
L4408_RF
L4421_RF
L4403_RF
L4404_RF
L4407_RF
C4418_RF
L4409_RF
L4406_RF
U_MBPAD_RF
2 1
2
1
21
2
1
21
21
21
21
2
1
21
21
21
24
31
21
2
1
2
1
1
26
2736
484746454443424140393837
3
2
33323130292825232221201918171514 13119764
24
5
8
1235
34
10
16
2.2NH+/-0.1NH-200MA
01005
1.2NH+/-0.1NH-220MA
01005
3.6NH+/-0.1NH-180MA
01005
2.5NH+/-0.1NH-0.2A
01005
01005
16V
NP0-C0G
50_B25_ASM_MATCH
1.4PF
+/-0.1PF
50_B1_B25_B34_B39_WTR_TX_OUT
VPA_BATT
RFFE_VIO
50_B25_PRX_WFR_IN
50_B25_PRX_MATCH
50_B34_B39_HB_SWITCH_IN
VPA_ET
50_B3_PAD_RX
50_B3_PRX_WFR_IN
50_B3_PRX_MATCH
50_B3_B4_WTR_TX_OUT
50_B25_ASM_TRX
50_B34_B39_PAD_ANT
50_B34_B39_LPF_IN
50_B1_B4_PAD_RX
50_B25_PAD_RX
RFFE1_CLK
RFFE1_DATA
50_B1_B3_B4_ASM_TRX
50_B1_B3_B4_PAD_ANT
50_B25_PAD_ANT
50_B1_B4_PRX_WFR_IN
MID BAND PAD
33PF
01005
NP0-C0G-CERM
16V
5%
RADIO_WFR
0402
OMIT_TABLE
LFL151G95TCSD734
BAND34-39
16V
33PF
01005
NP0-C0G-CERM
5%
RADIO_WFR
47PF
CERM
16V
5%
01005
RADIO_MB_PAD
X5R-CERM
10V
1.0UF
20%
0201-1
RADIO_MB_PAD
1.5NH+/-0.1NH-0.400A
01005
0.8NH+/-0.1NH-0.630A
OMIT_TABLE
01005
01005
3.6NH+/-0.1NH-0.280A
2.2NH+/-0.1NH-0.380A
01005
01005
1.3NH+/-0.1NH-0.400A
+/-0.1PF
16V
01005
NOSTUFF
0.2PF
NP0-C0G
2.7NH+/-0.1NH-0.370A
RADIO_WFR
01005
LGA
RADIO_MB_PAD
AFEM-8020-AP1
9 
17 15 14 12 
21 
19 18 1714 13 8 
11 
19 
17 15 14 12 
11 
9 
18 
17 15 14 
1312 8 3 
17 15 14 
1312 8 3 
18 
11 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
GND
OUTIN
VB
AT
T
VC
C1
B34_39_OUT
B25RX
B1/4RX
B3RXV
CC
2
VIO
B25ANT
B1/3/4ANT
SCLK
SDATA
G
ND
G
ND
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
EP
AD
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
B3/4IN
B1/25/34/39IN
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
C4533_RF
L1616
R1600
U1601
HIGH BAND PAD (B7, B38, B40, B41, XGP)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
051-00648
4.0.0
50 OF 60
45 OF 55
FT_41BC_RF
C4502_RF
U_HBPAD_RF
C4503_RF
C4522_RF
C4505_RF
C4500_RF
C4521_RFL4516_RFL4517_RF
FTB40A41A_RF
C4506_RF
C4507_RF
L4528_RF
L4525_RF
L4515_RF
C4532_RF
L4522_RF
C4520_RF
L4526_RF
R4509_RF
C4533_RF
L4524_RF
L4523_RFL4527_RF
L4520_RF
L4507_RF
R4531_RF
L4506_RF
C4528_RF
FT_B40_RF
C4501_RF
L4512_RF
21
2
1
21
2
1
2
1
21
2
1
2
1
10 9 6 5 2 3
1
4
8
7
2
1
2
1
2
1
2
1
2
1
2121
21
2
1
2
1
21
2
1
2
1
41
532
21
21
6 4
9 1
10 8 7 5 3 2
2
1
2
1
2
1
OMIT_TABLE
16V
01005
NP0-C0G
+/-0.1PF
0.7PF
50_B7_ASM_TRX
OMIT_TABLE
0%
0.00
01005
1/32W
MF
OMIT_TABLE0.3PF
+/-0.1PF
16V
NP0-C0G
01005
OMIT_TABLE
3.1NH-+/-0.1NH-0.29A
2.7NH+/-0.1NH-0.6A
50_B40B_TX_PAD
50_B41C_TX_PAD
50_B40A_B41A_TX_PAD
RFFE_VIO
RFFE1_CLK
50_B41C_FILTER_IN
50_B40A_B41A_FILTER_IN
50_B41A_TX_HB_SWITCH_IN
OMIT_TABLE
50_B40A_TX_HB_SWITCH_IN
7.5NH-5NH%-140MA
4.3NH-3%-0.270A
+/-0.1PF
NP0-C0G
50_B40A_TX_HB_SWITCH_MCH
OMIT_TABLE
1/32W
MF
0.00
0%
01005
OMIT_TABLE
1PF
01005
OMIT_TABLE
OMIT_TABLE
16V
SAW-BAND-40A-41A-TDD-LX
9.1NH-3%-0.17A-1.7OHM
01005
OMIT_TABLE
0201
+/-0.5PF
0.3PF
CERM
OMIT_TABLE
01005
16V
OMIT_TABLE
50_B41C_FILTER_IN
50_B41B_FILTER_IN 50_B41B_TX_HB_SWITCH_MCH
50_B7_PRX_WTR_IN
50_B40B_TX_FILTER_OUT 50_B40B_TX_HB_SWITCH_IN
50_B41B_TX_HB_SWITCH_IN
50_B7_WTR_TX_OUT
50_B7_PAD_IN
50_B41C_TX_HB_SWITCH_MCH 50_B41C_TX_HB_SWITCH_IN
VPA_BATT
50_B40B_TX_FILTER_IN
50_B40_B38_B41_WTR_TX_OUT
50_B38_B40_B41_PAD_IN
VPA_ET
VPA_APT
50_B40A_B41A_FILTER_IN
50_B41B_FILTER_IN
RFFE1_DATA
50_B7_RX_PAD
50_B41B_TX_PAD
50_B7_ANT_PAD
HIGH BAND PAD
SAWEN2G58QA0F57
OMIT_TABLE
SAW-BAND-41B-41C-TDD-TX
LGA
RADIO_HB_PAD
RADIO_HB_PAD
LGA
OMIT_TABLE
RADIO_HB_PAD
TQF6430
OMIT_TABLE
1.0PF
01005
NP0-C0G
16V
+/-0.1PF
RADIO_HB_PAD
OMIT_TABLE
RADIO_WTR
1.8PF
01005
NP0-C0G
16V
+/-0.1PF
1.0UF
20%
OMIT_TABLE
RADIO_HB_PAD
10V
X5R-CERM
0201-1
3.0PF
01005
NP0-C0G
16V
+/-0.1PF
01005
OMIT_TABLE
OMIT_TABLE
01005
1.5NH+/-0.1NH-0.400A
LGA
OMIT_TABLE
885058
0201-1
X5R-CERM
OMIT_TABLE
20%
1.0UF
10V
RADIO_HB_PAD
OMIT_TABLE
16V
5%
68PF
01005
NP0-C0G
OMIT_TABLE
1.4NH+/-0.1NH-1.1A
0201
OMIT_TABLE
68PF
NP0-C0G-CERM
01005
25V
5%
0201
OMIT_TABLE
2.7NH+/-0.1NH-0.6A
OMIT_TABLE
2.2NH+/-0.1NH-0.380A
01005
01005
NP0-C0G
OMIT_TABLE
RADIO_HB_PAD
5%
16V
100PF
OMIT_TABLE
1.8NH+/-0.1%-0.380A
01005
OMIT_TABLE
01005
9.1NH-3%-0.17A-1.7OHM
OMIT_TABLE
01005
1.3NH+/-0.1NH-0.400A
OMIT_TABLE
01005
01005
7.5NH+/-3%-0.2A
01005
LGA
SAFFU2G35MA0F57
TX-BAND40-LTE
OMIT_TABLE
18PF
RADIO_HB_PAD
16V
CERM
2%
01005
OMIT_TABLE
01005
3.3NH+/-0.1NH-290MA
18 
14 
17 
14 
19 
17 
17 
9 
9 
16 15 14 12 
9 
16 15 14 12 
13 12 
17 
17 
16
1513 
12 8 3 
16
1514 13 
12 8 3 
21 
1918 16 
13 8 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
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SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
B41COUT
B41BOUT
B41CIN
B41BIN
RF3/
RF1/RF2/
RF4/
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
VA
PT
VC
C2
VC
C1
VB
AT
T
B7IN
B38_40_41
EP
AD
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
SDATA
VIO
SCLK
B41C
B40A/B41A
B7RX
B7ANT
B41B
G
ND
G
ND
G
ND
G
ND
B40B
B41A_PORT
B40A_PORT
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
ANT_B41A
ANT_B40A
UNBAL_PRT1 UNBAL_PRT4
G
ND
G
ND
G
ND
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TO DIVERSITY MODULE
U1702
C1702
R1700
L4608_RFANTENNA SWITCHCONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
TO DIVERSITY MODULE
46 OF 55
51 OF 60
051-00648
4.0.0
L4601_RF
FRX34B39_RF U_ASM_RF_RF
C4602_RF
L4603_RF L4604_RF
R4607_RF
C4606_RF
L4602_RF
21
2
1
2
1
21
6
91
10875432
26
29
11
24
23
22
17
16
18
8
10
9
27
28
7
4
3
2
1
14
19
12
20
3331630251513
32
21
5
2
1
2
1
2
1
50_HB_SWITCH_TX
50_HB_SWITCH_RX
VCC_ASM_FILTERED
50_B20_ASM_TRX
50_HB_DIVERSITY_ASM
50_B1_B3_B4_ASM_TRX
50_B34_RX_ASM_OUT
50_B39_RX_ASM_OUT
50_B7_ASM_TRX
50_B25_ASM_TRX
50_FWD_OR_REV_RF
50_ANT2_CONN
50_ANT1_CONN
RFFE_VIO
RFFE2_DATA
RFFE2_CLK
50_HB_2G_ASM_IN
50_B17_ASM_TRX
50_B8_ASM_TRX
50_B28A_ASM_TRX
50_B28B_ASM_TRX
50_B26_ASM_TRX
50_B13_ASM_TRX
50_B29_ASM_TRX
50_LB_DIVERSITY_ASM
50_LB_2G_ASM_IN
RF5159
LGA2.4NH+/-0.1NH-200MA
PP_BATT_VCC
50_B34_B39_FILT_RX50_B34_B39_PRX_WTR_IN
ANTENNA SWITCH
OMIT_TABLE
01005
BAND34-39
LGA
SAWFD1G90LC0F57
OMIT_TABLE
47PF
01005
CERM
5%
16V
1.0NH+/-0.1NH-0.22A-0.9OHM
01005
NOSTUFF
1.0NH+/-0.1NH-0.22A-0.9OHM
NOSTUFF
01005
0.00
MF
0%
1/32W
01005
22PF
5%
16V
01005
CERM
OMIT_TABLE
3.3NH+/-0.1NH-180MA
01005
19 
19 
21 
14 
14 
15 
14 
14 
15 
14 
13 
3 8 19 21 
8 19 21 
8 13 14 16 17 19 21 
23 
23 
9 
16 
17 
16 
21 
15 
27 21 19 12 
9 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
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PAGE TITLE
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PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
GND
OUT_FIL2
OUT_FIL1INPUT
VDD
TRX11
HBRF2
TRX7
TRX6
RX1
RF7
TRX8
FWD/REV
A2
A1
VIO
SDATA
SCLK
GND
RF1
RF3
HBTX
TRX2
TRX3
TRX0
TRX1
TRX4
TRX5
RX2
LBRF2
LBTX
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CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
HIGH BAND SWITCH
52 OF 60
C4703_RF
L4713_RF
L4704_RF L4708_RFL4712_RF
L4706_RF
L4705_RF
U_HBS_RF
L4710_RF
L4709_RF
C4720_RF
C4701_RF
FR38X40B_RF
FR40A41A_RF
R4700_RF
XW4700_RF
C4710_RF
47 OF 55
4.0.0
051-00648
21
21
21
2
1
2
1
2
1
2
1
2
1
4
1
5
10
9
8
7
12
11
17
2
3
16
15
13
14
6
2
1
2
1
21
21
9
62
10875431
6
9
10 8 7 5 4 3 1
2
2
1
50_HB_SWITCH_RX
50_HB_SWITCH_TX
OMIT_TABLE
50_B40B_RX
50_B40B_B38X_PRX_FILTER
2.2NH+/-0.1NH-200MA
01005
OMIT_TABLE
SAW-BAND-40A-41A-TDD-RX
50_B40B_TX_HB_SWITCH_IN
50_B41B_TX_HB_SWITCH_IN
50_B34_B39_HB_SWITCH_IN
50_B40A_TX_HB_SWITCH_IN
50_B41C_TX_HB_SWITCH_IN
50_B41A_TX_HB_SWITCH_IN
50_B41A_PRX_WTR_IN 50_B41A_PRX_MATCH 50_B41A_PRX_FILTER
RFFE2_CLK
RFFE2_DATA
50_B40B_B38X_PRX_MATCH2
0.00
OMIT_TABLE
0%
01005
1/32W
MF
1.4NH+/-0.1NH-0.4A
OMIT_TABLE
01005
OMIT_TABLE
01005
5%
100PF
CERM
6.3V
2.7NH+/-0.1NH-0.370A
2.7NH+/-0.1NH-0.370A
16V
5%
CERM
47PF
01005
SHORT-10L-0.1MM-SM
LGA
885055
OMIT_TABLE
OMIT_TABLE
LGA
885056
SAW-BAND-40B-38X-TDD-RX
RADIO_HBSWITCH
OMIT_TABLE
NP0-C0G
100PF
10V
01005
5%
OMIT_TABLE
12NH-3%-0.140A
01005
CXM3652UR
UQFN
OMIT_TABLE
OMIT_TABLE
01005
2.0NH+/-0.1NH-0.380A
OMIT_TABLE
01005
OMIT_TABLE
2.9NH-+/-0.1NH-0.36A
01005
OMIT_TABLE
3.7NH-+/-0.1NH-0.27A
01005
OMIT_TABLE
01005
OMIT_TABLE
5%
18PF
CERM
16V
01005
HIGH BAND SWITCH
VCC_HBS PP_BATT_VCC
50_B40A_PRX_FILTER
50_B40A_B41A_RX
50_B40B_B38X_PRX_WTR_IN
50_B38X_RX
50_B40A_PRX_WTR_IN
50_B40B_RX
RFFE_VIO
50_B40A_B41A_RX
50_B38X_RX
18 
12 
17 
9 
18 
18 21 27 
19 
3 8 18 21 
9 
19 
9 
19 
8 13 14 16 17 18 21 
8 21 
19 
19 
19 
17 
17 
17 
16 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
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SHEET
PAGE TITLE
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PAD
VBATT
GND
THRM
SDATA
SCLK
VIO
TX RF1
TX3
TX4
TX5
TX6
TX1
TX2
RX2
RX1
RX3RX RF1
RF3/RX_B40B
RF2/RX_B38X
RF1/ANT
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
RX_B40A
RX_B41A
ANT
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
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CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
LOWBAND DIVERSITY - WTR
PLACE AT WTR END OF TRACE
R1800
L1829
U1801
C4826_RF
MIDBAND DIVERSITY - WTR
PLACE AT WTR END OF TRACE
MIDBAND
MIDBAND DIVERSITY - WFR
RX DIVERSITY (1)
HIGHBAND DIVERSITY - WTR
051-00648
4.0.0
48 OF 55
53 OF 60
C4818_RF
C4817_RF
C4808_RF
C4816_RF
L4808_RF
C4804_RF
C4805_RF
L4817_RF
L4816_RF
C4827_RF
L4827_RF
L4825_RF
L4821_RF
L4822_RF
L4820_RF
L4813_RF
L4810_RF
L4802_RF
L4804_RF
L4801_RF
L4805_RF
C4803_RF
L4806_RF
L4829_RF
C4820_RF
R4815_RF
L4814_RF
L4830_RF
C4831_RF
C4832_RF
L4826_RF
C4826_RF
L4819_RF
L4823_RF
L4809_RF
L4807_RF
C4809_RF
21
2
1
21
21
21
2
1
21
21
21
21
21
21
21
21
21
21
21
21
2
1
21
21
2
1
2
1
21
21
21
21
21
21
21
21
21
21
21
21
21
21
NOSTUFF
0.3PF
16V
+/-0.05PF
C0G-CERM
01005
22NH-5%-0.1A
01005
01005
16V
2.0NH+/-0.1NH-0.380A
01005
2.4NH+/-0.1NH-0.370A
01005
2.2NH+/-0.1NH-0.380A
16V
100PF
NP0-C0G
5%
01005
0.8PF
+/-0.05PF
01005
C0G-CERM
01005
0.4NH+/-0.1NH-0.990A
01005
0.00
0%
MF
1/32W
01005
8.2NH-3%-0.19A-1.6OHM
01005
16V
NP0-C0G
01005-1
2.2PF
+/-0.1PF
1.8NH+/-0.1%-0.380A
2.4NH+/-0.1NH-0.370A
01005
1.6NH+/-0.1NH-0.390A
01005
2.3NH+/-0.1NH-0.370A
01005
01005
2.2NH+/-0.1NH-0.380A
2.7NH+/-0.1NH-0.370A
01005
2.2NH+/-0.1NH-0.380A
01005
5.6NH-3%-0.23A-1.3OHM
01005
10NH-3%-0.170A
01005
10V
5%
100PF
2.4NH+/-0.1NH-200MA
01005
1.3NH+/-0.1NH-0.400A
01005
100PF
01005
16V
5%
NP0-C0G
01005
5%
16V
NP0-C0G
100PF
3.6NH+/-0.1NH-180MA
NOSTUFF
01005
100PF
NP0-C0G
5%
01005
16V
5%
16V
NP0-C0G
01005
100PF 16VNP0-C0G
01005
100PF
5%
5%
16V
NP0-C0G
01005
100PF
RX DIVERSITY
50_B41A_DRX_FILTER50_B41A_DRX_WTR_IN
50_B41A_DRX_WTR_MCH
50_B1_B4_DRX_DSM
50_B40_DRX_FILTER
50_B3_DRX_MATCH
50_B7_DRX_DSM
50_B26_B28A_DRX_WTR_MCH
50_B39_DRX_MATCH
50_B39_DRX_WTR_IN
50_PCS_WTR_IN
50_B3_DRX_WFR_IN
50_B25_DRX_DSM
50_B13_B17_DRX_DSM
50_B8_B28B_DRX_DSM
50_B34_DRX_DSM
50_B26_B28A_DRX_DSM
50_B34_DRX_WTR_IN
50_B26_B28A_DRX_WTR_IN
50_B7_DRX_WTR_IN
50_B25_DRX_WFR_IN
50_B20_B29_DRX_DSM
50_B38X_DRX_WTR_IN
50_PCS_DRX_MATCH
50_DCS_DSM_OUT
50_DCS_WTR_IN
50_DCS_DRX_MATCH
50_PCS_DSM_OUT
50_B38X_DRX_DSM
50_B25_DRX_MATCH
50_B3_DRX_DSM
50_B39_DRX_DSM
01005
50_B40_DRX_WTR_IN
01005
3.3NH+/-0.1NH-290MA
01005
NP0-C0G
+/-0.1PF
1.1PF
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
OMIT_TABLE
01005
1.8NH+/-0.1%-0.380A
01005
C0G-CERM
16V
01005
22NH-5%-0.1A
NP0-C0G
50_B13_B17_DRX_WTR_IN 01005
22NH-5%-0.1A
16V
+/-0.05PF
0.8PF
50_B8_B28B_DRX_WTR_IN
01005
1.1NH+/-0.1NH-220MA
50_B1_B4_DRX_WFR_IN
50_B20_B29_DRX_WTR_IN
9 
21 9 
21 
21 
21 
21 
9 21 
9 
11 
21 
21 
21 
21 
21 
9 
9 
9 
9 
11 21 
9 
21 9 
21 
9 
21 
11 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
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REVISION
DRAWING NUMBER SIZE
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SHEET
PAGE TITLE
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NOTICE OF PROPRIETARY PROPERTY:
A
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C
345678
D
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
w 
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RX DIVERSITY (2) C1900R1900L1900
U1901
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
54 OF 60
49 OF 55
4.0.0
051-00648
U_DSM_RF
C4901_RF
L4905_RF
L4902_RF L4904_RFL4901_RF L4903_RF
FD40B41A_RF
21
25
19
3
2
403938373635
4
5
15
14
13
17
12
34
23
16
33
32
29
31282726242220181110861
30
7
9
2
1
21
2
1
2
1
2
1
2
1
10 8 7 5 3 2
9 1
6 4
VCC_DSM PP_BATT_VCC
50_B41A_DRX_FILTER
50_B13_B17_DRX_DSM
50_B20_B29_DRX_DSM
50_DCS_DSM_OUT
50_B8_B28B_DRX_DSM
50_B34_DRX_DSM
50_B38X_DRX_DSM
50_B39_DRX_DSM
50_B41A_DRX_DSM
50_B7_DRX_DSM
50_B25_DRX_DSM 50_HB_DIVERSITY_ASM
50_LB_DIVERSITY_ASM
RFFE2_DATA
RFFE_VIO
RFFE2_CLK
50_B3_DRX_DSM
50_B1_B4_DRX_DSM
50_B40_DRX_DSM
50_PCS_DSM_OUT
50_B26_B28A_DRX_DSM
50_B40_DRX_FILTER
RX DIVERSITY (2)
LGA
OMIT_TABLE
M472B
NP0-C0G-CERM
01005
15PF
16V
5%
01005
22-OHM-25%-0.2A-0.9DCR
5.6NH-3%-0.23A-1.3OHM
OMIT_TABLE
01005
OMIT_TABLE
5.1NH-3%-0.250A
01005
01005
OMIT_TABLE
15NH-3%-0.140A
01005
OMIT_TABLE
5.6NH-3%-140MA
OMIT_TABLE
SAW-2-1-BAND-40-41A-DRX
LGA
B39252B9920P810
27 19 18 12 
20 
20 
20 
20 
20 
20 
20 
20 
20 
20 18 
18 
19 18 8 
19 18 17 16 14 13 8 
19 18 8 3 
20 
20 
20 
20 
20 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
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DRAWING NUMBER SIZE
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PAGE TITLE
C
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2 1
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
PAD
RX_BAND_1_4
RX_BAND_3
SCLK
VD
D
VIO
SDATA
ANT_LB
ANT_HB
G
ND
G
ND THRM
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
RX_BAND_25
RX_BAND_7
RX_BAND_40
RX_BAND_41A
RX_BAND_39
RX_BAND_38X
RX_BAND_34
PCS
DCS
RX_BAND_20
RX_BAND_8+28B
RX_BAND_26+28A
RX_BAND_12+13
B40IN
B41AINB41AOUT
B40OUT
G
ND
G
ND
G
ND
G
ND
G
ND
G
ND
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CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1900
R1900
L1900
U1901
GPS
55 OF 60
50 OF 55
4.0.0
051-00648
FL_GPSRF_RF
L5003_RF
L5002_RF
C5001_RF1
52
4
3
21
21
2
1
100_GPS_WTR_IN_P
50_GPS_DSM_IN
100_GPS_FIL_OUT_P
100_GPS_FIL_OUT_N 100_GPS_WTR_IN_N
GPS
LNA-GNSS-BAL
B8821
LGA
10NH-3%-0.170A
01005
10NH-3%-0.170A
01005
RADIO_GPS
01005
16V
+/-0.1PF
1.0PF
NP0-C0G
9 
23 
9 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
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DRAWING NUMBER SIZE
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NOTICE OF PROPRIETARY PROPERTY:
A
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C
345678
D
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
G
ND
BAL_PORT
BAL_PORT
G
ND
UNBAL_PORT
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BYPASS CAPS FOR ALTERNATE ANTENNA WITHOUT U_ASWNT
MODULE INCLUDES INTERNAL DECOUPLING
ANTENNA FEEDS
1=UPPER_HB_ANT
ANT & COAX CONNECTOR FOR LOWER & UPPER SECTION OF MLB
GPS FEED
0=UPPER_LBMB_ANT
P2 DOE
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
TO THE PAC FOR LBMB
56 OF 60
4.0.0
51 OF 55
051-00648
LOW_COAX_RF
L5111_RFC5110_RF
L5109_RF
R5
10
2_
RF
C5101_RF
C5102_RF
L5102_RF
UPPER_HB_ANT_RF
XW5100_RF
57 
FLWIFDIP_RF
L5135_RF
UPPER_LBMB_ANT_RF
C5139_RF
C5
13
8_
RF
L5123_RF
C5109_RF
SP3_RF
R5101_RF
R5137_RF
C5136_RF LOW_ANT_RF
C5104_RFC5103_RF
L5103_RF
U_ANTPAC_RF
R5135_RF
GPS_SP1_RF
UP_COAX_RF
FL5146_RF
C5107_RF
C5105_RF
L5108_RF
C5106_RF
L5107_RF
L5101_RF
R5105_RF
R5104_RF
L5106_RF
L5121_RF
L5120_RF
R5136_RF
L5129_RF
C5128_RF
C5130_RF
L5122_RF
FLCELWIF_RF
C5129_RF
U_GPSLNA_RF
57 
U_SWUANT_RF
VOLTAGE=2.95V
2
1
2121
2
1
2
1
2
1
2
1
1
432
6
4
5 3 1
2
2
1
1
2
1
21
1
21
21
1
4 3 2
2
1
2
1
211
3
2
1
2
1
2
1
2
1
21
21
2
1
2
1
21
2
1
2
1
7
6
1
4
9
10 8 5 3 2
2
1
7.5NH-+/-0.2NH-440MA
03015
2.5NH+/-0.1NH-500MA
NOSTUFF
1%
201
XFLGA
50_UAT_CELL_F
50_UAT_CELL_LPF
2.5NH+/-0.1NH-500MA
0201
1.1PF
25V
C0G-CERM
0201
+/-0.05PF
CXA4011GC
50_UAT_CELL
0201
50_UAT_CELL_FX5R
0.00
5.6NH-3%-0.23A-1.3OHM
50_WICE_CELL2_IN
49.9
1/20W
50_WIFI_2G_NOTCHPLEXER_IN2
885072
1.7NH-+/-0.1NH-0.8A-0.07OHM
1/20W
MF
1%
1/20W
RADIO_LOW_ANT
50_ANT2_UPPER_COAX_CONN
RFFE2_PAC_CLK_FILT
50_WICE_ANT2_GND
01005
12NH-3%-0.140A
NOSTUFF
LGA
DIPLEXER-CELL-WIFI
50_WIFI_2G_DIPLEXER_IN
2.4NH+/-0.2NH-0.57A-0.07OHM
50_NTCH_FILT_OUT
OMIT_TABLE
22PF
CERM
5%
16V
NOSTUFF
01005
01005
NOSTUFF
20%
6.3V
X5R
2.2UF
0201-2
NOSTUFF
+/-0.05PF
25V
C0G-CERM
0201
0.3PF
1.4NH+/-0.1NH-1.1A
0201
0201
0.00
MF
1/20W
1%
3.0NH+/-0.1NH-0.6A
0201
MF
1/32W
01005
0.00
0%
MF
01005
0.00
03015
20NH-3%-.14A-2.9OHM
01005
16V
01005
5%
NP0-C0G-CERM
33PF
16V
0.8PF
01005
+/-0.05PF
C0G-CERM
01005
10%
6.3V
FLTR-GPS-0603
LFE18832MHC1D449
F-ST-SM1
MM5829-2700
SM-NSP
1.6X1.21MM
1/20W
1%
0201
MF
RF1346
WLCSP
20NH-3%-.14A-2.9OHM
01005
0.01UF
X5R
10%
6.3V
01005
33PF
NP0-C0G-CERM
5%
01005
16V
F-ST-SM1
MM5829-27001.8PF
25V
C0G-CERM
0201
+/-0.05PF
OMIT_TABLE
0.00
MF
MF
0201
1%
SPRING-OVERPASS-GND-NORTH-X145
CLIP-SM
0201
SM-NSP
1.6X1.21MM
22NH-100MA
0201
NOSTUFF
I248
SM
F-ST-SM1
MM5829-2700
ANTENNA FEEDS50_ANT1_CONN_R
50_WIFI_2G_NOTCHPLEXER_IN
50_UPPER_HB_CELL
PP_LDO13_GPS
50_ANT2_CONN50_UAT_PAC50_UPPER_LBMB
50_GPS_DSM_IN
PP_LDO13
50_WIFI_5G_IN_OUT
UAT_SELECT
VIO_FILT
50_GPS_ANT
50_ANT1_CONN
VIO_FILT
RFFE2_PAC_DATA_FILT
RFFE_VIO_S2R
50_GPS_ANT_FEED 50_GPS_ANT_MATCH
25V
0201
COG-CERM
+/-0.05PF
0.2PF
+/
-0
.1
PF
8.
2P
F
25
V
CE
R
02
01
RADIO_LOW_ANT
MM5829-2700
50_UPPER_HB_ANT_FEED
F-ST-SM1
SKY65736
LGA
1.2NH-+/-0.05NH-1.1A-0.04OHM
50_UPPER_HB_ANT_FEED2 50_UPPER_HB_ANT_FEED1
0201
NOSTUFF
DPX165950DT-8030D1
1/32W
0%
RFFE2_CLK_BUFFER
50_WIFI_2G_DIPLEXER_IN2 0.00
RFFE2_PAC_DATA_FILT
10V
10%
120PF
01005
RFFE2_PAC_CLK_FILT
10V
10%
120PF
01005
CER-X7R
RFFE2_DATA_BUFFER
PAC_VDD_3V0
0.01UF
PAC_VDD_3V0_IN
4.3NH+/-3%-0.5A
0201
RADIO_LOW_ANT
CER-X7R
0201
SHORT-10L-0.1MM-SM
47PF
01005
CERM
16V
VCC_SWANT
5%
PP_LDO14_RFSW
23 
23 
18 
22 
4 6 
23 
8 
8 
8 
23 
18 
23 
23 
27 
4 14 15 23 
23 
23 15 14 4 
23 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
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SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
BI
GND
COMMON
HIGH_BAND
LOW_BAND
NC
NC
NC
NC
GND
NC
RF2
VBAT
NC
VIO
SCLK
SDATA
NC
RF1OUTIN
NC
RF1 RF3
RF2
SMD1_RF2
GND
SMD2_RF1/SMD4_GND
RFIN
GND THRM_PAD
RFOUT
VCC
BI
GND
VC1
RF
RF2
RF1
VDD
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
MODULE BOOT-STRAPPED TO PCIE INTERNALLYMODULE BOOT-STRAPPED TO HSIC BY GPIO6/SDIO2/SDIO1=110
SWIZZLE DATA LANE ON TOP-LEVEL
DC BLOCKS LOCATED ON AP SIDE
32K INTERFACE TO AP
WLAN/BT
57 OF 60
L5216_RF
33 60 
C5222_RFC5220_RFC5221_RF
56 
56 
R5214_RF
C5211_RF
33 36 60 
FL5201_RF
C5213_RF
C5212_RFL5208_RF
33 36 60 
R5210_RF
33 36 60 
33 60 
33 60 36 
33 36 
60 
33 36 
60 
33 36 
60 
33 36 
60 
R5205_RF
R5206_RF
33 60 36 
33 36 60 
33 60 36 
33 60 36 
33 60 36 
33 36 60 
33 36 60 
33 36 60 
33 36 60 
U5201_RF
33 36 60 
C5203_RF
C5205_RF
C5202_RF
C5204_RF
R5208_RF
R5201_RF
33 37 46 58 60 
33 60 
33 36 60 
33 36 60 
33 36 60 
L5201_RF
C5215_RF
36 
36 
R5202_RF
33 60 36 
33 60 36 
33 36 60 
33 60 
33 57 60 
33 60 
33 60 
C5201_RF
VOLTAGE=1.80V
52 OF 55
4.0.0
051-00648
2
1
21
2
1
24
31
2
1
2
1
2
1
2
1
21
21
9
26
22 55542423
2
3
56
4
98979695949392919089888786858483828180797877767574737271706968676665646362616059
28
6
5
7
12
19
18
17
16
21
20
14
13
33
34
35
32
31
11
8
30
57535251464437292725151
36
40
41
39
38
10
50
47
48
49
43
42
58
45
2
1
2
1
2
1
2
1
21
21
2
1
4
3
2
1
2
1
2
1
BT_UART_RXD
BT_UART_CTS_L
BT_UART_RTS_L
BT_UART_TXD
PP_WLAN_VDDIO_1V8
4.7UF
WIFI_BTWIFI_BT
0.01UF
0%
WIFI_BT
PP_WL_BT_VDDIO_AP
1/32W
01005 27PF
BT_REG_ON
90_WLAN_PCIE_RDN
90_WLAN_PCIE_REFCLK_N
WLAN_PCIE_CLKREQ_L
CERM
90_WLAN_PCIE_TDP
OSCAR_CONTEXT_A
OSCAR_CONTEXT_B
WLAN_JTAG_SWDIO
WLAN_PCIE_PERST_L
5%
01005
16V
100PF
NP0-C0G
PP_WLAN_VDDIO_1V8
NOSTUFF
25V
0.2PF
WIFI_BT
NP0-C0G
50_WIFI_5G_BPF_RADIO
1.3NH+/-0.1NH-1.1A
0201
2.7NH+/-0.1NH-0.50A
50_WIFI_5G_IN_OUT
NOSTUFF
WIFI_BT
+/-0.05PF
COG-CERM
0201
SM
LFH185G53RG1D868
50_WLAN_G_ANT
NP0-C0G
20%
WLAN_SR_LC
90_WLAN_PCIE_TDN
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDP
WLAN_PCIE_WAKE_L
HOST_WAKE_WLAN
JTAG_SEL
WLAN_JTAG_SWDCLK
CLK32K_AP
WLAN_REG_ON
WLAN_UART_TXD
WLAN_UART_RXD
WLAN_COEX_RXD
WLAN_UART_RTS_L
WLAN_UART_CTS_L
BT_PCM_OUT
BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_IN
PCIE_DEV_WAKE
WLAN_COEX_TXD
BB_COEX_UART_TXD
BB_COEX_UART_RXD
50_WIFI_2G_NOTCHPLEXER_IN
JTAG_SEL
WAKE_BT
WLAN_BUCK_OUT
WLAN_PCIE_PERST_L
WLAN_SR_VLX
50_WLAN_A_ANT
HOST_WAKE_BT
PP_VCC_MAIN
SYNC_MASTER=N/A
WIFI/BT: MODULE AND FRONT END
SYNC_DATE=N/A
27PF
WIFI_BT
16V
01005
5%
NP0-C0G
4.7UF
CER-X5R
6.3V
0402
20%
X5R-CERM
6.3V
0201
2.2UF
WIFI_BT
MF
1/20W
5%
201
0
+/-0.1PF
16V
WIFI_BT
0.2PF
01005
NOSTUFFNOSTUFF
+/-0.1PF
16V
WIFI_BT
0.2PF
01005
0201
WIFI_BT
WIFI_BT
100K
01005
MF
1/32W
5%
0.00
0%
1/32W
01005
WIFI_BT
MF
0%
1/32W
0.00
01005
MF
WIFI_BT
LBEE5U8ZKC-646
LGA
WIFI_BT
01005
NP0-C0G
16V
5%
WIFI_BT
27PF
16V
5%
NP0-C0G
01005
6.3V
20%
CER-X5R
0402
WIFI_BT
10%
01005
6.3V
X5R
0.00
MF
MF
5%
10K
01005
NOSTUFF
WIFI_BT
1/32W
WIFI_BT
WIFI_BT
WIFI_BT
2.2UH-20%-0.3A-0.38OHM
0603
10K
1/32W
5%
MF
01005
WIFI_BT
7.5UF
20%
WIFI_BT
4V
0402
24 
24 27 
24 
8 3 
8 3 
24 
24 
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
IN
BI
BI
IN
IN
GND
OUT
IN
IN
IN
OUT
IN
IN
OUT
OUT
BI
OUT
BI
IN
OUT
OUT
IN
IN
OUT
PCIE_REFCLK_P
PCIE_REFCLK_N
GPIO_0
PCIE_WAKE*
PCIE_CLKREQ*
PCIE_RDN
RF_SW_CTRL_8
BT_PCM_CLK
BT_PCM_SYNC
BT_PCM_OUT
BT_UART_TXD
BT_UART_RXD
BT_UART_RTS*
BT_UART_CTS*
BT_DEV_WAKE
BT_HOST_WAKE
5G_ANT
BT_PCM_IN
GND THRM_PAD
CLK32K
VIN_LDO
SR_VLX
WL_REG_ON
BT_REG_ON
PCIE_PRST*
JTAG_SEL
JTAG_TCK(GPIO_2)
PCIE_TDP
PCIE_TDN
PCIE_RDP
JTAG_TMS(GPIO_3)
JTAG_TRST(GPIO_6)
JTAG_TDO(GPIO_5)
JTAG_TDI(GPIO_4)
VB
AT
T_
RF
_V
CC
VB
AT
T_
RF
_V
CC
VB
AT
T
VB
AT
T
VD
DI
O
_1
P8
V
GPIO_1
2G_ANT
SECI_RX(GPIO_14)
SECI_TX(GPIO_13)
UART_TX(GPIO_10)
UART_RX(GPIO_9)
UART_CTS(GPIO_8)
UART_RTS(GPIO_7)
NC
OUT
IN
IN
IN
IN
IN
NC
IN
BI
IN
IN
OUT
OUT
IN
BI
IN
w 
w 
w 
. c
 h
 i n
 a
 f 
i x
 . 
c o
 m
PU FOR MAUI IO WAKE GLITCH
USE FIDUCIAL FOR SH ANTENNA GND
USE LDO11 TO MATCH IMPLEMENTATION OF N71/66
R2100
C2101
L2102
U2100
STOCKHOLM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
53 OF 55
58 OF 60
051-00648
4.0.0
C5319_RF
C5323_RFC5322_RF
U5302_RF
3336 
60 
58 
L5303_RF
C5321_RF
C5315_RF
C5312_RF
33 36 60 
R5303_RF
T5
30
1_
RF
C5314_RF
R5304_RF
C5310_RF
C5308_RF
3336 
60 
58 
C5311_RF
C5309_RF
L5302_RF
R5309_RF
R5301_RF
R5302_RF
R5305_RF
33 36 60 
33 36 58 60 
33 36 58 60 
33 58 60 
C5304_RF
C5303_RF
36 
33 58 60 
C5330_RF
R5310_RF
C5317_RF
3336 58 
60 
C5324_RF
C5302_RF
33 36 58 60 
R5307_RF
33 36 58 60 
R5306_RF
U5301_RF
PP5304_RF
33 36 60 
R5316_RF
PP5303_RFPP5302_RF
R5313_RF
3336 58 
60 
TP5301_RF
36 38 
L5301_RF
C5318_RFC5316_RF
C5313_RF
TP5303_RF
36 38 
VOLTAGE=1.80V
VOLTAGE=1.80V
2
1
2
1
C3
E5
G
2
E2
F7
E1
C6 C7
D5
G5
G3
B1
G
4
E7
A5
B7
E6
A6
B3
B4
F1
E3
E4
A4
B5
G1
F2
F6
F5
C1
A1
C2
D3
A3
D1
A7
C5
F4
G6
G7
B2
C4B6
D2
A2
F3D6D4
D7
1
21
1
1
21
1
21
2
1
2
1
21
1
2
1
2
1
2
1
A2
A1A3
B2
B1
C2C1
B3
C3
21
2
1
2
1
21
21
4
1
3
2
21
21
2
1
21
2
1
21
21
21
2
1
2
1
2
1
2
1
2
1
2
1
21
2
1
2
1
2
1
P2MM-NSM
STOCKHOLM
SM
P2MM-NSM
SM
STOCKHOLM
P2MM-NSM
SM
STOCKHOLM
RADIO_STOCKHOLM
STOCKHOLM_RXN
AP_TO_STOCKHOLM_DEV_WAKE
RADIO_STOCKHOLM
PP_STOCKHOLM_1V8_S2R
RADIO_STOCKHOLM
STOCKHOLM_UART_RXD
NOSTUFF
STOCKHOLM_UART_CTS
PP_STOCKHOLM_1V8_S2R
1/32W
100K
01005
MF
5%
1/32W
100K
01005
MF
5%
AP_TO_STOCKHOLM_DEV_WAKE
AP_TO_STOCKHOLM_EN
AP_TO_STOCKHOLM_FW_DWLD_REQ
PP_STOCKHOLM_1V8_S2R
5%
01005
1/32W
RADIO_STOCKHOLM
MF
100K
MF
1/32W
100K
01005
5%
RADIO_STOCKHOLM
1/32W
100K
01005
MF
5%
RADIO_STOCKHOLM
1/32W
X5R-CERM
25V
STOCKHOLM_UART_CTS
STOCKHOLM_UART_RTS
STOCKHOLM_UART_RXD
STOCKHOLM_UART_TXD
AP_TO_STOCKHOLM_EN
PP_STOCKHOLM_ESE
0.1UF
01005
330PF
2%
25V
NPO-COG
0201
C0G-NP0
AT
B2
01
20
6E
-2
00
11
0402
160NH-10%-0.48A-0.33OHM
560PF
NPO-C0G
25V
0201
2%
NOSTUFF
2%
50V
NP0-C0G
STOCKHOLM_ANT_MATCH
01005
0201
NOSTUFF
1000PF
0201
25V
2%
82PF
0201
560PF
NPO-C0G
25V
0201
2%
NPO-C0G
560PF
2%
25V
0201
NOSTUFF
22PF
C0G
0201
5%
50V
STOCKHOLM_VMID
0.00
STOCKHOLM_TO_PMU_HOST_WAKE
45_BBPMU_TO_STOCKHOLM_19P2M_CLK
STOCKHOLM_TO_SIM_SWP
STOCKHOLM_DC_BOOST
STOCKHOLM_SIM_PRES
PN66VEU3-A101D003
STOCKHOLM_TO_BBPMU_CLK_REQ
AP_TO_STOCKHOLM_FW_DWLD_REQ
STOCKHOLM_TX2
STOCKHOLM_TX1
STOCKHOLM_RXP
SH_DWP_M
SH_DWP_S
SE2_SVDD_IN
SE2_PWR_REQ
STOCKHOLM_TVDD
UFLGA
10V
RADIO_STOCKHOLM
1/32W
MF
STOCKHOLM_DVDD
STOCKHOLM_DC_BOOST_EN
TP-P55
PP_STOCKHOLM_ESE
RADIO_STOCKHOLM
0.1UF
STOCKHOLM_SVDD_IN
X5R-CERM
STOCKHOLM_5V
10V
PP_PN66_SIM_PMU
PP_LDO11
0.00
01005
MF
1/32W
0%
0201
RADIO_STOCKHOLM
RADIO_STOCKHOLM
10V
RADIO_STOCKHOLM
STOCKHOLM_SIM_PRES
0.00
PP_STOCKHOLM_1V8_S2R
0%
1/32W
MF
PP_STOCKHOLM_1V8_S2R
PP_VCC_MAIN
6.3V
01005
TP-P55
STOCKHOLM_ANT
STOCKHOLM_RXP_CAP
STOCKHOLM_RXN_CAP
STOCKHOLM_BOOST_SW
STOCKHOLM_BAL0
STOCKHOLM_BAL1
STOCKHOLM_5VPP_VCC_MAIN
SYNC_MASTER=N/A SYNC_DATE=N/A
STOCKHOLM
2%
50V
C0G
100PF
0201
0402-1
20%
15UF
6.3V
X5R
0402-1
20%
15UF
6.3V
X5R
WLCSP
FA
N4
86
14
BU
C5
0X
1.8UH-0.7A
060315UF
0402-1
X5R
6.3V
20%
0201
25V
C0G-NP0
1000PF
2%
201
1/20W
560
5%
MF
08
05
560
MF
201
5%
1/20W
1000PF
2%
0201
25V
C0G-NP0
2%
C0G-NP0
0201
1000PF
0402
160NH-10%-0.48A-0.33OHM
01005
MF
0%
0.00
1UF
20%
10V
X5R
0201
10%
20%
1UF
X5R
0%
20%
20%
X5R
10V
0201
1UF
0201
1UF
X5R
20%
27 
25 27 
25 27 
25 27 
25 
25 
25 
25 
25 
25 27 
25 
25 
25 27 
25 
4 13 24 25 27 
25 27 25 24 13 4 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
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 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
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2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
SW
PG
ND
PG
ND
VIN
SW
VOUT
AG
ND
EN
VOUT
IN
OUT
UN
BA
L
BA
L0
G
ND
BA
L1
IN
OUT
IN
IN
IN
BI
IN
IN
NC
NC
NC
NC
IN
IN
PV
DD
SV
DD
SI
M
_P
M
U_
VC
C
AV
DD
CLK_REQ
SPIM_SCK
SPIM_MISO
SPIM_MOSI
XTAL2
ESE_IO1
NFC_CLK_XTAL1
SMX_RST*
RTS
SMX_CLK
VEN
TX
CTS
RX
SVDD_REQ
DWL
IRQ
AV
SS
AV
SS
AV
SS
DV
SS
VS
S
DV
SS
TV
SS
PV
SS
VMID
TX2
RXN
TX1
RXP
GPIO0
SIM_SWIO
SPIM_IRQ
ESE_DWPM_DBG
ESE_DWPS_DBG
WKUP_REQ
SE2_SVDD_IN
SE2_PWR_REQ
TX_PWR_REQ
SPIM_NSS
VU
P
TV
DD
ES
E_
VD
D
VB
AT
VD
D
PP
OUT
NC
PP
PP
IN
A
NC
NC
OUT
NC
NC
A
IN
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N69N69H
N69 SKU BOM OPTION TABLE
N69H TDD
59 OF 60
54 OF 55
4.0.0
051-00648
118S0652
152S1851
1
162K 1% 01005
2.2PF 0.1PF 01005 COG131S0387
7.5NH 3% 01005 200MA
10NH 01005 170MA
2.5PF 0.1PF 01005 COG
C4211_RF
C4211_RF
152S1853
R4509_RF
R4509_RF
C4500_RF
0R 01005
152S1983
152S1623
CRITICAL
1 CRITICAL117S0161 0R 01005 N69H
117S0161
N69H
1PF 01005 16V
68PF 01005 25V
N69HCRITICAL
CRITICAL
C4520_RF
131S0244
152S00036
152S1989
117S0161
100PF 01005
FILTER SAW BAND 40A B41A
CRITICAL
3.3NH 01005
353S00374
152S1998
1
1
N691 CRITICAL117S0161 0R 01005
01005 49.9R
01005 49.9R
1.1PF 01005
1.0PF 01005 16V
68PF 01005 16V
3.3NH 01005 +/-0.1NH 131S0599
118S0652
2.9NH 01005 360MA
1
L4223_RF CRITICAL
C4213_RF
152S1996
152S1571
152S2061
1
SAW FILTER B40A B41A
1
5.6NH 01005
N69H
4.3NH 01005 3%
131S00042
N69H
CRITICAL
L4517_RF
131S0307
1 0.3PF +-0.05PF 01005 16V
N69H
1UF 0201 10V
N69H
R4531_RF
100PF 01005 16V
155S0906
152S1988 CRITICAL
1 CRITICAL N6901005 49.9R
N69CRITICAL118S0652
N69C4231_RF CRITICAL01005 1.5PF1
N69CRITICAL1
1 N695.1NH 0.1NH 01005 250MA152S1993
N69HCRITICAL
CRITICAL01005 49.9R C4231_RF118S0652
CRITICAL
CRITICAL
CRITICAL
CRITICAL
C4521_RF
L4516_RF
L4515_RF
L4526_RF
L4520_RF
C4532_RF
C4533_RF
L4507_RF
FTB40A41A_RF
L4602_RF
FD40B41A_RF
CRITICAL
N69H
39K 1% 01005
118S0724
N69H
CRITICAL
CRITICAL
L4902_RF
L4901_RF
100PF 01005
N69H
L4830_RF
CRITICAL
N69H
N69H
N69H
CRITICAL
2.2NH 01005 200MA152S1619
C4528_RF
L4506_RF
L4528_RF
C4502_RF
C4506_RF
1.5NH 01005 +/-0.1NH
117S0161 1
152S1977
131S0390
1
2.7NH 0201 +/-0.1NH152S2002
7.5NH 01005 5%152S1408
0.3PF 01005 16V131S00042
L5121_RF
C4213_RF
CRITICAL
N69H
L5120_RF
5.6NH 01005
3.0NH 0201
SWTICH SPDT 1.1X1.1
CRITICAL
1
2.7NH 01005 370MA
CRITICALC4710_RF
L4421_RF
U_DSM_RF
CRITICAL
N69HCRITICAL
1.8NH 01005 380MA
3.1NH 01005 +/-0.1NH
1
0OHM 01005 R4700_RF
131S0307
1
C4720_RF
FR40A41A_RF
N69HCRITICAL1
1 CRITICAL N69H1.4NH 01005 220MA152S1946 L4706_RF
155S0881
18PF 01005 C4703_RF
FL_B39LP_RF
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
2.4NH 01005 370MA
C4701_RF
N69H
N69H
N69HCRITICAL
L4709_RF
152S1917
1
N69HC4827_RF131S0307 1 CRITICAL
L4817_RF
1
131S0214
353S4167
FILTER SAW B40B 38X
CRITICALL4705_RF
CRITICAL
L4704_RF
CRITICAL
R4815_RF
C4816_RF
L4816_RF
152S1720
2.4NH 01005
0R 01005
L4904_RF
L4903_RF
152S1900
3.3NH 01005 290MA1
152S1571
5.1NH 01005L4813_RF
131S0376
CRITICAL
TDK MODULE M472A NO B12/B13/B17
1
CRITICAL N69H
CRITICAL
U_SWUANT_RF CRITICAL
CRITICAL
N69H
SAW DRX B40B41A
CRITICAL353S00390
152S1567
C4809_RF N69H1
1 N69H
IND 0.8NH 630MA 01005
L4217_RF
152S1564
152S1544
131S0307
1.3NH 01005
100PF 01005
0.4NH 01005
1.8NH 01005 L4814_RF
CRITICAL
1 CRITICAL
N69H1
N69H1
N69H1
N69H1 CRITICAL
N69H1
RADIO HIGH BAND PAD
15NH 01005
152S2045
0R 0201
1
353S00331
1 5.6NH 01005
N69HCRITICAL
CRITICAL1155S0908
N69HCRITICAL152S1907
N69HCRITICAL1
1
1 L4601_RF
FLTR SAW DUAL FILTER B34B39 CRITICAL155S0981 FRX34B39_RF1
OMIT_TABLE_RF
N69H
N69H152S2040
N69H1 1.3NH 01005 +/-0.1NH152S1982
1
N69R3312_RF CRITICAL118S0729
N69R5137_RF1 CRITICAL
N69SKY77826 CRITICALU_VLBPAD_RF1
N691 U_DSM_RFDSM M471A NO B7 CRITICAL353S00373
N69HCRITICAL1 FILTER LOW PASS B39
N69HCRITICAL1155S0903 FR38X40B_RF
1
N69H9.1NH 01005 3% L4523_RF152S1853 1
N69H1
N69HCRITICAL3.7NH 01005 270MA
N69HCRITICAL152S1989 2.7NH 01005 370MA L4712_RF1
N69HL4708_RF1152S00034
12NH 01005 140MA L4710_RF1152S1576
47PF 010051131S0216
N69HCRITICAL1152S1853 L4527_RF9.1NH 01005 3%
N69HCRITICAL155S0900 1 FILTER SAW BAND 41B 41C FT_41BC_RF
N69HCRITICAL152S1965 L4524_RF1
N69H152S2024 1.4NH 0201 1.1A L4525_RF1
N69H2.0NH 01005 380MA
N69HCRITICALL4713_RF1
131S0214 18PF 010051
N69H1
N69HCRITICAL155S0902
N69H1152S00035N69HCRITICAL1
N69HSWITCH IC LGA161 U_HBS_RF
N69HCRITICAL1131S0395 3.0PF 01005 +/-0.1PF
N69H1
N69H1138S0706
1
N69H1
N69H7.5NH 01005 3%1
N69H2.2NH 01005 +/-0.1NH1152S1986
N69H1 FILTER B40155S0982 FT_B40_RF
N69H152S2002 L4522_RF2.7NH 0201 +/-0.1NH
1
N69H1 CRITICAL131S0644
N69H
SKY77827 U_VLBPAD_RF N69H1
CRITICAL1353S4180 U_HBPAD_RF
N69H1 CRITICAL131S0417 18PF 01005 16V C4501_RF
N69HCRITICAL1131S0375 C4503_RF
N69H1 CRITICAL131S0635 C4507_RF
N69H1UF 0201 10V138S0706 1 CRITICALC4505_RF
N69HCRITICAL1152S1907 L4512_RF
CRITICAL N69H1.8PF 01005 16V131S0247 C4522_RF
CRITICAL N69H1
CRITICAL1 N69H
N69H1 CRITICAL
N69H1 L4216_RF CRITICAL
353S3876 1
N69HCRITICAL
1 R3312_RF118S0726 N69H
CRITICAL1
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 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
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SHEET
PAGE TITLE
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NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
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8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
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REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
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STOCKHOLM INTERFACES
BB DEBUG INTERFACES
WLAN/BT HOUSE KEEPING
RADIO SYMBOL(HEIARCHY)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
FCT TESTING
HSIC IPC
AUDIO I2S
WLAN PCIE IPC
WLAN/BT UART
ANTENNA CONTROL
WLAN/OWL UART
OSCAR UART
CELLULAR HOUSE KEEPING
BT AUDIO PCM
BB UART
60 OF 60
57 33 
57 36 33 
57 36 33 
57 33 
57 33 
57 33 
57 36 33 
57 36 33 
57 33 
38 36 33 
60 57 36 33 
58 36 33 
58 36 33 
58 33 
58 36 33 
58 36 33 
58 36 33 
58 36 33 
58 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
60 57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
57 36 33 
36 33 
36 33 
36 33 
36 33 
40 36 33 
40 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
40 36 33 
40 36 33 
41 33 
41 33 
41 36 33 
41 36 33 
41 33 
38 36 33 
41 36 33 
41 36 33 
41 36 33 
41 36 33 
38 36 33 
40 36 33 
40 33 
38 36 33 
41 33 
41 33 
57 33 
57 36 33 
57 36 33 
41 36 33 
55 OF 55
4.0.0
051-00648
PAC_VDD_3V0
RFFE_VIO_S2R
PP_STOCKHOLM_1V8_S2R
AP_TO_STOCKHOLM_EN
STOCKHOLM_TO_PMU_HOST_WAKE
AP_TO_STOCKHOLM_DEV_WAKE
AP_TO_STOCKHOLM_FW_DWLD_REQ
WLAN_PCIE_CLKREQ_L
90_WLAN_PCIE_RDP
90_WLAN_PCIE_RDN
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_REFCLK_N
WLAN_PCIE_PERST_L
90_WLAN_PCIE_TDP
90_WLAN_PCIE_TDN
WLAN_PCIE_WAKE_L
RADIO_ON_L
HOST_WAKE_WLAN
PP_VCC_MAIN
OSCAR_CONTEXT_B
OSCAR_CONTEXT_A
BT_PCM_SYNC
BT_PCM_OUT
BT_PCM_IN
BT_PCM_CLK
BT_UART_CTS_L
BT_UART_RTS_L
BT_UART_RXD
WLAN_UART_RXD
WLAN_UART_TXD
HOST_WAKE_WLAN
HOST_WAKE_BT
WAKE_BT
BT_REG_ON
WLAN_REG_ON
CLK32K_AP
PP_WL_BT_VDDIO_AP
ADC_SMPS4
ADC_PP_LDO5
ADC_PP_LDO11
ADC_SMPS1
BB_USB_VBUS
90_BB_USB_P
90_BB_USB_N
BB_CORE_DUMP
BB_OTHER_TXD
BB_OTHER_RXD
BB_I2S_WS
PP_BATT_VCC
BB_I2S_CLK
BB_I2S_RXD
BB_I2S_TXD
BB_GPS_SYNC
BB_DEVICE_RDY
BB_HOST_RDY
50_BB_HSIC_STROBE
50_BB_HSIC_DATA
BB_IPC_GPIO1
GSM_TXBURST_IND
AP_TO_BB_MESA_ON
BB_WAKE_HOST_L
AP_WAKE_MODEM
BB_RST_L
BB_UART_RTS_L
BB_UART_CTS_L
BB_UART_RXD
BB_UART_TXD
RF_PMIC_RESET_L
BB_JTAG_TMS
BB_JTAG_TCK
BB_FORCE_PWM
BB_LAT_GPIO2
BB_LAT_GPIO1
PCIE_DEV_WAKE
WLAN_UART_RTS_L
WLAN_UART_CTS_L
BB_RESET_DET_L
BT_UART_TXD
STOCKHOLM_UART_CTS
STOCKHOLM_UART_RTS
STOCKHOLM_UART_TXD
STOCKHOLM_UART_RXD
Radio Subdesign Ports
25 
23 
23 15 14 4 
24 
25 3 
25 3 
25 
25 3 
24 
24 3 
24 3 
24 
24 
24 
24 3 
24 3 
24 
5 3 
27 24 3 
25 24 13 4 
24 
24 
24 
24 
24 
24 
24 3 
24 3 
24 3 
24 3 
24 3 
27 24 3 
24 
24 3 
24 3 
24 3 
24 3 
3 
3 
3 
3 
7 3 
7 3 
7 3 
8 3 
8 3 
8 3 
8 3 
21 19 18 12 
8 
8 3 
8 3 
8 3 
8 3 
8 3 
7 3 
7 3 
8 
8 
8 3 
8 3 
8 
5 3 
8 3 
8 3 
8 3 
8 3 
5 3 
7 3 
7 3 
5 3 
8 
8 
24 
24 3 
24 3 
8 3 
24 3 
25 3 
25 3 
25 3 
25 3 
 II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
36
BRANCH
REVISION
DRAWING NUMBER SIZE
D
R
 IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PROPRIETARY PROPERTY OF APPLE INC.
THE INFORMATION CONTAINED HEREIN IS THE
Apple Inc.
OUT
IN
IN
IN
IN
IN
OUT
OUT
OUT
IN
OUT
IN
OUT
IN
IN
IN
OUT
OUT
IO
IN
IN
IN
IN
OUT
IN
IN
IN
OUT
OUT
IN
IN
OUT
OUT
OUT
IN
IN
IN
IN
IO
IO
IO
OUT
OUT
OUT
OUT
IO
OUT
OUT
IN
OUT
IN
IN
IO
IN
IN
OUT
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
IN
IO
OUT
IN
IN
OUT
IN
IN
IN
IN
OUT
OUT
IN
OUT
IN
OUT