PNY 277PN

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Application Device Power Output Input Voltage Output Voltage Topology
Set Top Box TNY277PN 15 W 85 – 300 VAC 3.3 V, 5 V, 8 V, 22 V Flyback
DI-163 Design Idea 
TinySwitch-III
www.powerint.com February 2008
Wide Range Set Top Box Power Supply with Latching 
Overvoltage (OVP) Shutdown Protection
®
Design Highlights
Multiple output power supply
Excellent cross regulation
Two outputs sum-regulated
Highly energy effi cient
Meets CEC/ENERGY STAR 2008 requirements for active mode 
effi ciency (77 % vs 68.1% requirement)
Low no-load power consumption (<150 mW at 230 VAC)
Meets CISPR-22/EN55022B conducted EMI limits 
Auto-restart withstands shorted output condition indefi nitely
Operation
The TinySwitch-III multiple output power supply shown in Figure 1 
provides 15 W of output power. Typical applications include set-
top boxes or DVD players where a multiple output fl yback supply 
is required. 
Diodes D1, D2, D3 and D4 and capacitors C2 and C3 rectify and 
smooth the AC input. Capacitors C2, C3, C8 and inductor L2 
provide differential as well as common-mode EMI fi ltering. The 
controller in U1 receives feedback from the secondary through 
optocoupler U2, and based on that feedback, it enables or 
disables the switching of its integrated MOSFET to maintain 
output regulation. A portion of both the 3.3 V and the 5 V outputs 
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Figure 1. Schematic of a 15 W, Set Top Box Power Supply Using TinySwitch-III.
are fed into the shunt regulator (U3), which controls the current 
through the LED in U2. A proportional current is then pulled out of 
the EN/UV pin. Switching cycles are skipped once the EN/UV 
disable threshold current (115 μA) is exceeded. When the current 
out of the EN/UV pin falls below the disable threshold, switching 
cycles are re-enabled. The disable threshold is modulated to 
reduce group pulsing and ensure evenly spaced current pulses 
thereby improving output ripple and overall effi ciency. 
Output overvoltage protection is provided via the latching shut-
down feature of U1. Should the feedback loop open due to 
component failure, the resulting rise in output voltage is refl ected 
through the bias winding output voltage across C6. Once the 
output voltage is above the sum of the rating of VR1 and the 
BP/M pin voltage (~53 V), current fl ows into the BP/M pin. 
Latching shutdown is triggered when this current exceeds 7 mA. 
MOSFET switching is disabled until the BP/M pin capacitor (C4) is 
discharged below 4.8 V after removal of input AC.
Good cross-regulation on 5 V and 3.3 V outputs is achieved by 
minimizing secondary leakage by placing the 3.3 V and 5 V 
windings on the same layer next to the primary and by sum 
regulating (obtaining feedback from both outputs). 
D
S
EN/UV
BP/M
PI-4872-020708
U1
TNY277PN
NC
1
2
10
9
8
7
6
4
5
TinySwitch-III
R1
47 kΩ
2 W
R2
220 Ω
0.5 W
R15
100 Ω
R14
1 kΩ R18
15 kΩ
 1%
R8
10 kΩ
U2A
U2B
PC817D
R12
47 Ω
R17
10 kΩ
 1%
R16
10 kΩ
1%
C3
22 μF
450V
C7
10 nF
1 kV
C4
10 μF
C6
1 μF
63 V
C15
470 μF
35 V
C11
100 μF
35 V
C9
470 μF
35 V
L2
3.3 μH
L2
1.0 mH
L3
3.3 μH
C10
100 μF
35 V
D9
BYV27-200
D5
BA159
U3
TL431
2%
D10
1N5822
D8
MUR120
D7 MUR120
D6
UF4003
EF25
T1
C17
100 nF
C12
100 μF
35 V
C18
470 pF
500 V
C8
1.0 nF
250 VAC
C13
470 μF
35 V
C2
22 μF
450V
D1, D2
1N4007
D3, D4
1N4007
85-300
VAC
22 V, 0.4 A
8 V, 0.1 A
RTN
5 V, 0.45 A
3.3 V, 0.75 AF1
2A
MOV1
320 VAC
L4
3.3 μH
L5
3.3 μH
C14
470 μF
35 V
R4
20 Ω
C16
470 μF
35 V
R5
47 Ω
R6
21 kΩ
VR1
47 V
3
C5
100 nF
50 V
Power Integrations
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San Jose, CA 95138, USA.
Main: +1 408-414-9200
Customer Service 
Phone: +1-408-414-9665
Fax: +1-408-414-9765
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On the Web
www.powerint.com
C
02/08
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power 
Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS 
MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED 
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. 
The products and applications illustrated herein (transformer construction and circuits external to the products) may be covered by 
one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. 
A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants 
i ts customers a l icense under certa in patent r ights as set for th at ht tp://www.powerint .com/ip.htm.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StackFET, 
PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. 
©2007, Power Integrations, Inc. 
DI-163
Key Design Points
Components D5, R1 and C7 form an RCD clamp circuit, 
absorbing leakage inductance energy during turn off. This 
energy is partly recovered when C7 resonates with the 
transformer primary leakage inductance and couples into the 
secondary side. Resistor R2 damps this resonant ring and 
improves EMI. 
Diode D5 is a fast diode with reverse recovery t
RR
 of 250 ns. 
It may be substituted with a cheaper 1N4007GP (glass 
passivated) diode
The selectable current limit of U1 allows the current limit and 
device size to be optimized for the thermal environment. For 
example, in open frame applications, the TNY276PN part could 
be used by changing the value of C5 from 0.1 μF to 10 μF.
To prevent an increase in no-load consumption or false OVP 
triggering, VR1 should be selected to conduct only when the 
output voltage is outside the normal regulation range. Resistor 
R5 prevents excessive current from fl owing into the BP/M pin.
To increase coupling between primary and secondary windings, 
the 3.3 V, 5 V and 8 V windings are all placed on the same layer
To route currents away from U1 during common-mode surges, 
the Y1 capacitor C8 is connected between secondary return 
and the DC bus.
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Transformer Parameters
Core Material
 EF25
 NC-2H or equivalent, 
 gapped for ALG of 420 nH/t2
Bobbin EF25, 10 pin, Horizontal
Winding Details
3 mm margins on both sides of bobbin to meet 
safety
Shield: 14T × 2, AWG29, tape
Primary-1: 29T × 1, AWG29, tape
Bias: 11T × 2, AWG29, 3 layers tape
3.3 V: 2T × 2, AWG25
5 V: 1T × 1, AWG25 (same layer as 3.3 V)
8 V: 1T × 1, AWG25 (same layer as 3.3 V), 
1 layer tape
22 V: 8T × 2, AWG29, 3 layers tape
Shield: 1T Foil 2 mils thick, tape
Primary-2: 29T × 1, AWG29, 2 layers tape
Winding Order
Shield (1 - NC), Primary-1 (3-2), Bias (4-5), 3.3 V 
(7-6), 5 V (8-7), 8 V (9-8), 22 V (10-9), Shield 
(NC-1), Primary-2 (2-1)
Primary Inductance 1547 μH, ±10%
Primary Resonant
Frequency
 500 kHz (minimum)
Leakage 
Inductance 40 μH (maximum)
Table 1. Transformer Parameters. (NC = No Connection, 
TIW = Triple Insulated Wire).
Figure 2. Full Load Effi ciency vs Line Voltage.
Figure 3. Worst Case Conducted EMI at 230 VAC With Output Grounded 
 (CISPR-22 Limit Lines Shown).
135 18085 115 300230
Line Voltage (VAC)
E
ff
ic
ie
n
cy
 (
%
)
85
80
83
75
78
73
70
P
I-
48
71
-1
02
50
7
P
I-
48
77
-1
02
50
7
1.0 0.15 10.0 100.0 
0
10
20
30
40
50
60
70
80
100
90
MHz 
d
B
μV